1*e4624435SJonathan Corbet===========
2*e4624435SJonathan CorbetACPI Tables
3*e4624435SJonathan Corbet===========
4*e4624435SJonathan Corbet
5*e4624435SJonathan CorbetThe expectations of individual ACPI tables are discussed in the list that
6*e4624435SJonathan Corbetfollows.
7*e4624435SJonathan Corbet
8*e4624435SJonathan CorbetIf a section number is used, it refers to a section number in the ACPI
9*e4624435SJonathan Corbetspecification where the object is defined.  If "Signature Reserved" is used,
10*e4624435SJonathan Corbetthe table signature (the first four bytes of the table) is the only portion
11*e4624435SJonathan Corbetof the table recognized by the specification, and the actual table is defined
12*e4624435SJonathan Corbetoutside of the UEFI Forum (see Section 5.2.6 of the specification).
13*e4624435SJonathan Corbet
14*e4624435SJonathan CorbetFor ACPI on arm64, tables also fall into the following categories:
15*e4624435SJonathan Corbet
16*e4624435SJonathan Corbet       -  Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
17*e4624435SJonathan Corbet
18*e4624435SJonathan Corbet       -  Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
19*e4624435SJonathan Corbet
20*e4624435SJonathan Corbet       -  Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, IBFT,
21*e4624435SJonathan Corbet          IORT, MCHI, MPST, MSCT, NFIT, PMTT, RASF, SBST, SLIT, SPMI, SRAT,
22*e4624435SJonathan Corbet          STAO, TCPA, TPM2, UEFI, XENV
23*e4624435SJonathan Corbet
24*e4624435SJonathan Corbet       -  Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, MSDM, OEMx,
25*e4624435SJonathan Corbet          PSDT, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
26*e4624435SJonathan Corbet
27*e4624435SJonathan Corbet====== ========================================================================
28*e4624435SJonathan CorbetTable  Usage for ARMv8 Linux
29*e4624435SJonathan Corbet====== ========================================================================
30*e4624435SJonathan CorbetBERT   Section 18.3 (signature == "BERT")
31*e4624435SJonathan Corbet
32*e4624435SJonathan Corbet       **Boot Error Record Table**
33*e4624435SJonathan Corbet
34*e4624435SJonathan Corbet       Must be supplied if RAS support is provided by the platform.  It
35*e4624435SJonathan Corbet       is recommended this table be supplied.
36*e4624435SJonathan Corbet
37*e4624435SJonathan CorbetBOOT   Signature Reserved (signature == "BOOT")
38*e4624435SJonathan Corbet
39*e4624435SJonathan Corbet       **simple BOOT flag table**
40*e4624435SJonathan Corbet
41*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
42*e4624435SJonathan Corbet
43*e4624435SJonathan CorbetBGRT   Section 5.2.22 (signature == "BGRT")
44*e4624435SJonathan Corbet
45*e4624435SJonathan Corbet       **Boot Graphics Resource Table**
46*e4624435SJonathan Corbet
47*e4624435SJonathan Corbet       Optional, not currently supported, with no real use-case for an
48*e4624435SJonathan Corbet       ARM server.
49*e4624435SJonathan Corbet
50*e4624435SJonathan CorbetCPEP   Section 5.2.18 (signature == "CPEP")
51*e4624435SJonathan Corbet
52*e4624435SJonathan Corbet       **Corrected Platform Error Polling table**
53*e4624435SJonathan Corbet
54*e4624435SJonathan Corbet       Optional, not currently supported, and not recommended until such
55*e4624435SJonathan Corbet       time as ARM-compatible hardware is available, and the specification
56*e4624435SJonathan Corbet       suitably modified.
57*e4624435SJonathan Corbet
58*e4624435SJonathan CorbetCSRT   Signature Reserved (signature == "CSRT")
59*e4624435SJonathan Corbet
60*e4624435SJonathan Corbet       **Core System Resources Table**
61*e4624435SJonathan Corbet
62*e4624435SJonathan Corbet       Optional, not currently supported.
63*e4624435SJonathan Corbet
64*e4624435SJonathan CorbetDBG2   Signature Reserved (signature == "DBG2")
65*e4624435SJonathan Corbet
66*e4624435SJonathan Corbet       **DeBuG port table 2**
67*e4624435SJonathan Corbet
68*e4624435SJonathan Corbet       License has changed and should be usable.  Optional if used instead
69*e4624435SJonathan Corbet       of earlycon=<device> on the command line.
70*e4624435SJonathan Corbet
71*e4624435SJonathan CorbetDBGP   Signature Reserved (signature == "DBGP")
72*e4624435SJonathan Corbet
73*e4624435SJonathan Corbet       **DeBuG Port table**
74*e4624435SJonathan Corbet
75*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
76*e4624435SJonathan Corbet
77*e4624435SJonathan CorbetDSDT   Section 5.2.11.1 (signature == "DSDT")
78*e4624435SJonathan Corbet
79*e4624435SJonathan Corbet       **Differentiated System Description Table**
80*e4624435SJonathan Corbet
81*e4624435SJonathan Corbet       A DSDT is required; see also SSDT.
82*e4624435SJonathan Corbet
83*e4624435SJonathan Corbet       ACPI tables contain only one DSDT but can contain one or more SSDTs,
84*e4624435SJonathan Corbet       which are optional.  Each SSDT can only add to the ACPI namespace,
85*e4624435SJonathan Corbet       but cannot modify or replace anything in the DSDT.
86*e4624435SJonathan Corbet
87*e4624435SJonathan CorbetDMAR   Signature Reserved (signature == "DMAR")
88*e4624435SJonathan Corbet
89*e4624435SJonathan Corbet       **DMA Remapping table**
90*e4624435SJonathan Corbet
91*e4624435SJonathan Corbet       x86 only table, will not be supported.
92*e4624435SJonathan Corbet
93*e4624435SJonathan CorbetDRTM   Signature Reserved (signature == "DRTM")
94*e4624435SJonathan Corbet
95*e4624435SJonathan Corbet       **Dynamic Root of Trust for Measurement table**
96*e4624435SJonathan Corbet
97*e4624435SJonathan Corbet       Optional, not currently supported.
98*e4624435SJonathan Corbet
99*e4624435SJonathan CorbetECDT   Section 5.2.16 (signature == "ECDT")
100*e4624435SJonathan Corbet
101*e4624435SJonathan Corbet       **Embedded Controller Description Table**
102*e4624435SJonathan Corbet
103*e4624435SJonathan Corbet       Optional, not currently supported, but could be used on ARM if and
104*e4624435SJonathan Corbet       only if one uses the GPE_BIT field to represent an IRQ number, since
105*e4624435SJonathan Corbet       there are no GPE blocks defined in hardware reduced mode.  This would
106*e4624435SJonathan Corbet       need to be modified in the ACPI specification.
107*e4624435SJonathan Corbet
108*e4624435SJonathan CorbetEINJ   Section 18.6 (signature == "EINJ")
109*e4624435SJonathan Corbet
110*e4624435SJonathan Corbet       **Error Injection table**
111*e4624435SJonathan Corbet
112*e4624435SJonathan Corbet       This table is very useful for testing platform response to error
113*e4624435SJonathan Corbet       conditions; it allows one to inject an error into the system as
114*e4624435SJonathan Corbet       if it had actually occurred.  However, this table should not be
115*e4624435SJonathan Corbet       shipped with a production system; it should be dynamically loaded
116*e4624435SJonathan Corbet       and executed with the ACPICA tools only during testing.
117*e4624435SJonathan Corbet
118*e4624435SJonathan CorbetERST   Section 18.5 (signature == "ERST")
119*e4624435SJonathan Corbet
120*e4624435SJonathan Corbet       **Error Record Serialization Table**
121*e4624435SJonathan Corbet
122*e4624435SJonathan Corbet       On a platform supports RAS, this table must be supplied if it is not
123*e4624435SJonathan Corbet       UEFI-based; if it is UEFI-based, this table may be supplied. When this
124*e4624435SJonathan Corbet       table is not present, UEFI run time service will be utilized to save
125*e4624435SJonathan Corbet       and retrieve hardware error information to and from a persistent store.
126*e4624435SJonathan Corbet
127*e4624435SJonathan CorbetETDT   Signature Reserved (signature == "ETDT")
128*e4624435SJonathan Corbet
129*e4624435SJonathan Corbet       **Event Timer Description Table**
130*e4624435SJonathan Corbet
131*e4624435SJonathan Corbet       Obsolete table, will not be supported.
132*e4624435SJonathan Corbet
133*e4624435SJonathan CorbetFACS   Section 5.2.10 (signature == "FACS")
134*e4624435SJonathan Corbet
135*e4624435SJonathan Corbet       **Firmware ACPI Control Structure**
136*e4624435SJonathan Corbet
137*e4624435SJonathan Corbet       It is unlikely that this table will be terribly useful.  If it is
138*e4624435SJonathan Corbet       provided, the Global Lock will NOT be used since it is not part of
139*e4624435SJonathan Corbet       the hardware reduced profile, and only 64-bit address fields will
140*e4624435SJonathan Corbet       be considered valid.
141*e4624435SJonathan Corbet
142*e4624435SJonathan CorbetFADT   Section 5.2.9 (signature == "FACP")
143*e4624435SJonathan Corbet
144*e4624435SJonathan Corbet       **Fixed ACPI Description Table**
145*e4624435SJonathan Corbet       Required for arm64.
146*e4624435SJonathan Corbet
147*e4624435SJonathan Corbet
148*e4624435SJonathan Corbet       The HW_REDUCED_ACPI flag must be set.  All of the fields that are
149*e4624435SJonathan Corbet       to be ignored when HW_REDUCED_ACPI is set are expected to be set to
150*e4624435SJonathan Corbet       zero.
151*e4624435SJonathan Corbet
152*e4624435SJonathan Corbet       If an FACS table is provided, the X_FIRMWARE_CTRL field is to be
153*e4624435SJonathan Corbet       used, not FIRMWARE_CTRL.
154*e4624435SJonathan Corbet
155*e4624435SJonathan Corbet       If PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is
156*e4624435SJonathan Corbet       filled in properly - that the PSCI_COMPLIANT flag is set and that
157*e4624435SJonathan Corbet       PSCI_USE_HVC is set or unset as needed (see table 5-37).
158*e4624435SJonathan Corbet
159*e4624435SJonathan Corbet       For the DSDT that is also required, the X_DSDT field is to be used,
160*e4624435SJonathan Corbet       not the DSDT field.
161*e4624435SJonathan Corbet
162*e4624435SJonathan CorbetFPDT   Section 5.2.23 (signature == "FPDT")
163*e4624435SJonathan Corbet
164*e4624435SJonathan Corbet       **Firmware Performance Data Table**
165*e4624435SJonathan Corbet
166*e4624435SJonathan Corbet       Optional, useful for boot performance profiling.
167*e4624435SJonathan Corbet
168*e4624435SJonathan CorbetGTDT   Section 5.2.24 (signature == "GTDT")
169*e4624435SJonathan Corbet
170*e4624435SJonathan Corbet       **Generic Timer Description Table**
171*e4624435SJonathan Corbet
172*e4624435SJonathan Corbet       Required for arm64.
173*e4624435SJonathan Corbet
174*e4624435SJonathan CorbetHEST   Section 18.3.2 (signature == "HEST")
175*e4624435SJonathan Corbet
176*e4624435SJonathan Corbet       **Hardware Error Source Table**
177*e4624435SJonathan Corbet
178*e4624435SJonathan Corbet       ARM-specific error sources have been defined; please use those or the
179*e4624435SJonathan Corbet       PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER
180*e4624435SJonathan Corbet       Bridge), or use type 9 (Generic Hardware Error Source).  Firmware first
181*e4624435SJonathan Corbet       error handling is possible if and only if Trusted Firmware is being
182*e4624435SJonathan Corbet       used on arm64.
183*e4624435SJonathan Corbet
184*e4624435SJonathan Corbet       Must be supplied if RAS support is provided by the platform.  It
185*e4624435SJonathan Corbet       is recommended this table be supplied.
186*e4624435SJonathan Corbet
187*e4624435SJonathan CorbetHPET   Signature Reserved (signature == "HPET")
188*e4624435SJonathan Corbet
189*e4624435SJonathan Corbet       **High Precision Event timer Table**
190*e4624435SJonathan Corbet
191*e4624435SJonathan Corbet       x86 only table, will not be supported.
192*e4624435SJonathan Corbet
193*e4624435SJonathan CorbetIBFT   Signature Reserved (signature == "IBFT")
194*e4624435SJonathan Corbet
195*e4624435SJonathan Corbet       **iSCSI Boot Firmware Table**
196*e4624435SJonathan Corbet
197*e4624435SJonathan Corbet       Microsoft defined table, support TBD.
198*e4624435SJonathan Corbet
199*e4624435SJonathan CorbetIORT   Signature Reserved (signature == "IORT")
200*e4624435SJonathan Corbet
201*e4624435SJonathan Corbet       **Input Output Remapping Table**
202*e4624435SJonathan Corbet
203*e4624435SJonathan Corbet       arm64 only table, required in order to describe IO topology, SMMUs,
204*e4624435SJonathan Corbet       and GIC ITSs, and how those various components are connected together,
205*e4624435SJonathan Corbet       such as identifying which components are behind which SMMUs/ITSs.
206*e4624435SJonathan Corbet       This table will only be required on certain SBSA platforms (e.g.,
207*e4624435SJonathan Corbet       when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it
208*e4624435SJonathan Corbet       remains optional.
209*e4624435SJonathan Corbet
210*e4624435SJonathan CorbetIVRS   Signature Reserved (signature == "IVRS")
211*e4624435SJonathan Corbet
212*e4624435SJonathan Corbet       **I/O Virtualization Reporting Structure**
213*e4624435SJonathan Corbet
214*e4624435SJonathan Corbet       x86_64 (AMD) only table, will not be supported.
215*e4624435SJonathan Corbet
216*e4624435SJonathan CorbetLPIT   Signature Reserved (signature == "LPIT")
217*e4624435SJonathan Corbet
218*e4624435SJonathan Corbet       **Low Power Idle Table**
219*e4624435SJonathan Corbet
220*e4624435SJonathan Corbet       x86 only table as of ACPI 5.1; starting with ACPI 6.0, processor
221*e4624435SJonathan Corbet       descriptions and power states on ARM platforms should use the DSDT
222*e4624435SJonathan Corbet       and define processor container devices (_HID ACPI0010, Section 8.4,
223*e4624435SJonathan Corbet       and more specifically 8.4.3 and 8.4.4).
224*e4624435SJonathan Corbet
225*e4624435SJonathan CorbetMADT   Section 5.2.12 (signature == "APIC")
226*e4624435SJonathan Corbet
227*e4624435SJonathan Corbet       **Multiple APIC Description Table**
228*e4624435SJonathan Corbet
229*e4624435SJonathan Corbet       Required for arm64.  Only the GIC interrupt controller structures
230*e4624435SJonathan Corbet       should be used (types 0xA - 0xF).
231*e4624435SJonathan Corbet
232*e4624435SJonathan CorbetMCFG   Signature Reserved (signature == "MCFG")
233*e4624435SJonathan Corbet
234*e4624435SJonathan Corbet       **Memory-mapped ConFiGuration space**
235*e4624435SJonathan Corbet
236*e4624435SJonathan Corbet       If the platform supports PCI/PCIe, an MCFG table is required.
237*e4624435SJonathan Corbet
238*e4624435SJonathan CorbetMCHI   Signature Reserved (signature == "MCHI")
239*e4624435SJonathan Corbet
240*e4624435SJonathan Corbet       **Management Controller Host Interface table**
241*e4624435SJonathan Corbet
242*e4624435SJonathan Corbet       Optional, not currently supported.
243*e4624435SJonathan Corbet
244*e4624435SJonathan CorbetMPST   Section 5.2.21 (signature == "MPST")
245*e4624435SJonathan Corbet
246*e4624435SJonathan Corbet       **Memory Power State Table**
247*e4624435SJonathan Corbet
248*e4624435SJonathan Corbet       Optional, not currently supported.
249*e4624435SJonathan Corbet
250*e4624435SJonathan CorbetMSCT   Section 5.2.19 (signature == "MSCT")
251*e4624435SJonathan Corbet
252*e4624435SJonathan Corbet       **Maximum System Characteristic Table**
253*e4624435SJonathan Corbet
254*e4624435SJonathan Corbet       Optional, not currently supported.
255*e4624435SJonathan Corbet
256*e4624435SJonathan CorbetMSDM   Signature Reserved (signature == "MSDM")
257*e4624435SJonathan Corbet
258*e4624435SJonathan Corbet       **Microsoft Data Management table**
259*e4624435SJonathan Corbet
260*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
261*e4624435SJonathan Corbet
262*e4624435SJonathan CorbetNFIT   Section 5.2.25 (signature == "NFIT")
263*e4624435SJonathan Corbet
264*e4624435SJonathan Corbet       **NVDIMM Firmware Interface Table**
265*e4624435SJonathan Corbet
266*e4624435SJonathan Corbet       Optional, not currently supported.
267*e4624435SJonathan Corbet
268*e4624435SJonathan CorbetOEMx   Signature of "OEMx" only
269*e4624435SJonathan Corbet
270*e4624435SJonathan Corbet       **OEM Specific Tables**
271*e4624435SJonathan Corbet
272*e4624435SJonathan Corbet       All tables starting with a signature of "OEM" are reserved for OEM
273*e4624435SJonathan Corbet       use.  Since these are not meant to be of general use but are limited
274*e4624435SJonathan Corbet       to very specific end users, they are not recommended for use and are
275*e4624435SJonathan Corbet       not supported by the kernel for arm64.
276*e4624435SJonathan Corbet
277*e4624435SJonathan CorbetPCCT   Section 14.1 (signature == "PCCT)
278*e4624435SJonathan Corbet
279*e4624435SJonathan Corbet       **Platform Communications Channel Table**
280*e4624435SJonathan Corbet
281*e4624435SJonathan Corbet       Recommend for use on arm64; use of PCC is recommended when using CPPC
282*e4624435SJonathan Corbet       to control performance and power for platform processors.
283*e4624435SJonathan Corbet
284*e4624435SJonathan CorbetPMTT   Section 5.2.21.12 (signature == "PMTT")
285*e4624435SJonathan Corbet
286*e4624435SJonathan Corbet       **Platform Memory Topology Table**
287*e4624435SJonathan Corbet
288*e4624435SJonathan Corbet       Optional, not currently supported.
289*e4624435SJonathan Corbet
290*e4624435SJonathan CorbetPSDT   Section 5.2.11.3 (signature == "PSDT")
291*e4624435SJonathan Corbet
292*e4624435SJonathan Corbet       **Persistent System Description Table**
293*e4624435SJonathan Corbet
294*e4624435SJonathan Corbet       Obsolete table, will not be supported.
295*e4624435SJonathan Corbet
296*e4624435SJonathan CorbetRASF   Section 5.2.20 (signature == "RASF")
297*e4624435SJonathan Corbet
298*e4624435SJonathan Corbet       **RAS Feature table**
299*e4624435SJonathan Corbet
300*e4624435SJonathan Corbet       Optional, not currently supported.
301*e4624435SJonathan Corbet
302*e4624435SJonathan CorbetRSDP   Section 5.2.5 (signature == "RSD PTR")
303*e4624435SJonathan Corbet
304*e4624435SJonathan Corbet       **Root System Description PoinTeR**
305*e4624435SJonathan Corbet
306*e4624435SJonathan Corbet       Required for arm64.
307*e4624435SJonathan Corbet
308*e4624435SJonathan CorbetRSDT   Section 5.2.7 (signature == "RSDT")
309*e4624435SJonathan Corbet
310*e4624435SJonathan Corbet       **Root System Description Table**
311*e4624435SJonathan Corbet
312*e4624435SJonathan Corbet       Since this table can only provide 32-bit addresses, it is deprecated
313*e4624435SJonathan Corbet       on arm64, and will not be used.  If provided, it will be ignored.
314*e4624435SJonathan Corbet
315*e4624435SJonathan CorbetSBST   Section 5.2.14 (signature == "SBST")
316*e4624435SJonathan Corbet
317*e4624435SJonathan Corbet       **Smart Battery Subsystem Table**
318*e4624435SJonathan Corbet
319*e4624435SJonathan Corbet       Optional, not currently supported.
320*e4624435SJonathan Corbet
321*e4624435SJonathan CorbetSLIC   Signature Reserved (signature == "SLIC")
322*e4624435SJonathan Corbet
323*e4624435SJonathan Corbet       **Software LIcensing table**
324*e4624435SJonathan Corbet
325*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
326*e4624435SJonathan Corbet
327*e4624435SJonathan CorbetSLIT   Section 5.2.17 (signature == "SLIT")
328*e4624435SJonathan Corbet
329*e4624435SJonathan Corbet       **System Locality distance Information Table**
330*e4624435SJonathan Corbet
331*e4624435SJonathan Corbet       Optional in general, but required for NUMA systems.
332*e4624435SJonathan Corbet
333*e4624435SJonathan CorbetSPCR   Signature Reserved (signature == "SPCR")
334*e4624435SJonathan Corbet
335*e4624435SJonathan Corbet       **Serial Port Console Redirection table**
336*e4624435SJonathan Corbet
337*e4624435SJonathan Corbet       Required for arm64.
338*e4624435SJonathan Corbet
339*e4624435SJonathan CorbetSPMI   Signature Reserved (signature == "SPMI")
340*e4624435SJonathan Corbet
341*e4624435SJonathan Corbet       **Server Platform Management Interface table**
342*e4624435SJonathan Corbet
343*e4624435SJonathan Corbet       Optional, not currently supported.
344*e4624435SJonathan Corbet
345*e4624435SJonathan CorbetSRAT   Section 5.2.16 (signature == "SRAT")
346*e4624435SJonathan Corbet
347*e4624435SJonathan Corbet       **System Resource Affinity Table**
348*e4624435SJonathan Corbet
349*e4624435SJonathan Corbet       Optional, but if used, only the GICC Affinity structures are read.
350*e4624435SJonathan Corbet       To support arm64 NUMA, this table is required.
351*e4624435SJonathan Corbet
352*e4624435SJonathan CorbetSSDT   Section 5.2.11.2 (signature == "SSDT")
353*e4624435SJonathan Corbet
354*e4624435SJonathan Corbet       **Secondary System Description Table**
355*e4624435SJonathan Corbet
356*e4624435SJonathan Corbet       These tables are a continuation of the DSDT; these are recommended
357*e4624435SJonathan Corbet       for use with devices that can be added to a running system, but can
358*e4624435SJonathan Corbet       also serve the purpose of dividing up device descriptions into more
359*e4624435SJonathan Corbet       manageable pieces.
360*e4624435SJonathan Corbet
361*e4624435SJonathan Corbet       An SSDT can only ADD to the ACPI namespace.  It cannot modify or
362*e4624435SJonathan Corbet       replace existing device descriptions already in the namespace.
363*e4624435SJonathan Corbet
364*e4624435SJonathan Corbet       These tables are optional, however.  ACPI tables should contain only
365*e4624435SJonathan Corbet       one DSDT but can contain many SSDTs.
366*e4624435SJonathan Corbet
367*e4624435SJonathan CorbetSTAO   Signature Reserved (signature == "STAO")
368*e4624435SJonathan Corbet
369*e4624435SJonathan Corbet       **_STA Override table**
370*e4624435SJonathan Corbet
371*e4624435SJonathan Corbet       Optional, but only necessary in virtualized environments in order to
372*e4624435SJonathan Corbet       hide devices from guest OSs.
373*e4624435SJonathan Corbet
374*e4624435SJonathan CorbetTCPA   Signature Reserved (signature == "TCPA")
375*e4624435SJonathan Corbet
376*e4624435SJonathan Corbet       **Trusted Computing Platform Alliance table**
377*e4624435SJonathan Corbet
378*e4624435SJonathan Corbet       Optional, not currently supported, and may need changes to fully
379*e4624435SJonathan Corbet       interoperate with arm64.
380*e4624435SJonathan Corbet
381*e4624435SJonathan CorbetTPM2   Signature Reserved (signature == "TPM2")
382*e4624435SJonathan Corbet
383*e4624435SJonathan Corbet       **Trusted Platform Module 2 table**
384*e4624435SJonathan Corbet
385*e4624435SJonathan Corbet       Optional, not currently supported, and may need changes to fully
386*e4624435SJonathan Corbet       interoperate with arm64.
387*e4624435SJonathan Corbet
388*e4624435SJonathan CorbetUEFI   Signature Reserved (signature == "UEFI")
389*e4624435SJonathan Corbet
390*e4624435SJonathan Corbet       **UEFI ACPI data table**
391*e4624435SJonathan Corbet
392*e4624435SJonathan Corbet       Optional, not currently supported.  No known use case for arm64,
393*e4624435SJonathan Corbet       at present.
394*e4624435SJonathan Corbet
395*e4624435SJonathan CorbetWAET   Signature Reserved (signature == "WAET")
396*e4624435SJonathan Corbet
397*e4624435SJonathan Corbet       **Windows ACPI Emulated devices Table**
398*e4624435SJonathan Corbet
399*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
400*e4624435SJonathan Corbet
401*e4624435SJonathan CorbetWDAT   Signature Reserved (signature == "WDAT")
402*e4624435SJonathan Corbet
403*e4624435SJonathan Corbet       **Watch Dog Action Table**
404*e4624435SJonathan Corbet
405*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
406*e4624435SJonathan Corbet
407*e4624435SJonathan CorbetWDRT   Signature Reserved (signature == "WDRT")
408*e4624435SJonathan Corbet
409*e4624435SJonathan Corbet       **Watch Dog Resource Table**
410*e4624435SJonathan Corbet
411*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
412*e4624435SJonathan Corbet
413*e4624435SJonathan CorbetWPBT   Signature Reserved (signature == "WPBT")
414*e4624435SJonathan Corbet
415*e4624435SJonathan Corbet       **Windows Platform Binary Table**
416*e4624435SJonathan Corbet
417*e4624435SJonathan Corbet       Microsoft only table, will not be supported.
418*e4624435SJonathan Corbet
419*e4624435SJonathan CorbetXENV   Signature Reserved (signature == "XENV")
420*e4624435SJonathan Corbet
421*e4624435SJonathan Corbet       **Xen project table**
422*e4624435SJonathan Corbet
423*e4624435SJonathan Corbet       Optional, used only by Xen at present.
424*e4624435SJonathan Corbet
425*e4624435SJonathan CorbetXSDT   Section 5.2.8 (signature == "XSDT")
426*e4624435SJonathan Corbet
427*e4624435SJonathan Corbet       **eXtended System Description Table**
428*e4624435SJonathan Corbet
429*e4624435SJonathan Corbet       Required for arm64.
430*e4624435SJonathan Corbet====== ========================================================================
431*e4624435SJonathan Corbet
432*e4624435SJonathan CorbetACPI Objects
433*e4624435SJonathan Corbet------------
434*e4624435SJonathan CorbetThe expectations on individual ACPI objects that are likely to be used are
435*e4624435SJonathan Corbetshown in the list that follows; any object not explicitly mentioned below
436*e4624435SJonathan Corbetshould be used as needed for a particular platform or particular subsystem,
437*e4624435SJonathan Corbetsuch as power management or PCI.
438*e4624435SJonathan Corbet
439*e4624435SJonathan Corbet===== ================ ========================================================
440*e4624435SJonathan CorbetName   Section         Usage for ARMv8 Linux
441*e4624435SJonathan Corbet===== ================ ========================================================
442*e4624435SJonathan Corbet_CCA   6.2.17          This method must be defined for all bus masters
443*e4624435SJonathan Corbet                       on arm64 - there are no assumptions made about
444*e4624435SJonathan Corbet                       whether such devices are cache coherent or not.
445*e4624435SJonathan Corbet                       The _CCA value is inherited by all descendants of
446*e4624435SJonathan Corbet                       these devices so it does not need to be repeated.
447*e4624435SJonathan Corbet                       Without _CCA on arm64, the kernel does not know what
448*e4624435SJonathan Corbet                       to do about setting up DMA for the device.
449*e4624435SJonathan Corbet
450*e4624435SJonathan Corbet                       NB: this method provides default cache coherency
451*e4624435SJonathan Corbet                       attributes; the presence of an SMMU can be used to
452*e4624435SJonathan Corbet                       modify that, however.  For example, a master could
453*e4624435SJonathan Corbet                       default to non-coherent, but be made coherent with
454*e4624435SJonathan Corbet                       the appropriate SMMU configuration (see Table 17 of
455*e4624435SJonathan Corbet                       the IORT specification, ARM Document DEN 0049B).
456*e4624435SJonathan Corbet
457*e4624435SJonathan Corbet_CID   6.1.2           Use as needed, see also _HID.
458*e4624435SJonathan Corbet
459*e4624435SJonathan Corbet_CLS   6.1.3           Use as needed, see also _HID.
460*e4624435SJonathan Corbet
461*e4624435SJonathan Corbet_CPC   8.4.7.1         Use as needed, power management specific.  CPPC is
462*e4624435SJonathan Corbet                       recommended on arm64.
463*e4624435SJonathan Corbet
464*e4624435SJonathan Corbet_CRS   6.2.2           Required on arm64.
465*e4624435SJonathan Corbet
466*e4624435SJonathan Corbet_CSD   8.4.2.2         Use as needed, used only in conjunction with _CST.
467*e4624435SJonathan Corbet
468*e4624435SJonathan Corbet_CST   8.4.2.1         Low power idle states (8.4.4) are recommended instead
469*e4624435SJonathan Corbet                       of C-states.
470*e4624435SJonathan Corbet
471*e4624435SJonathan Corbet_DDN   6.1.4           This field can be used for a device name.  However,
472*e4624435SJonathan Corbet                       it is meant for DOS device names (e.g., COM1), so be
473*e4624435SJonathan Corbet                       careful of its use across OSes.
474*e4624435SJonathan Corbet
475*e4624435SJonathan Corbet_DSD   6.2.5           To be used with caution.  If this object is used, try
476*e4624435SJonathan Corbet                       to use it within the constraints already defined by the
477*e4624435SJonathan Corbet                       Device Properties UUID.  Only in rare circumstances
478*e4624435SJonathan Corbet                       should it be necessary to create a new _DSD UUID.
479*e4624435SJonathan Corbet
480*e4624435SJonathan Corbet                       In either case, submit the _DSD definition along with
481*e4624435SJonathan Corbet                       any driver patches for discussion, especially when
482*e4624435SJonathan Corbet                       device properties are used.  A driver will not be
483*e4624435SJonathan Corbet                       considered complete without a corresponding _DSD
484*e4624435SJonathan Corbet                       description.  Once approved by kernel maintainers,
485*e4624435SJonathan Corbet                       the UUID or device properties must then be registered
486*e4624435SJonathan Corbet                       with the UEFI Forum; this may cause some iteration as
487*e4624435SJonathan Corbet                       more than one OS will be registering entries.
488*e4624435SJonathan Corbet
489*e4624435SJonathan Corbet_DSM   9.1.1           Do not use this method.  It is not standardized, the
490*e4624435SJonathan Corbet                       return values are not well documented, and it is
491*e4624435SJonathan Corbet                       currently a frequent source of error.
492*e4624435SJonathan Corbet
493*e4624435SJonathan Corbet\_GL   5.7.1           This object is not to be used in hardware reduced
494*e4624435SJonathan Corbet                       mode, and therefore should not be used on arm64.
495*e4624435SJonathan Corbet
496*e4624435SJonathan Corbet_GLK   6.5.7           This object requires a global lock be defined; there
497*e4624435SJonathan Corbet                       is no global lock on arm64 since it runs in hardware
498*e4624435SJonathan Corbet                       reduced mode.  Hence, do not use this object on arm64.
499*e4624435SJonathan Corbet
500*e4624435SJonathan Corbet\_GPE  5.3.1           This namespace is for x86 use only.  Do not use it
501*e4624435SJonathan Corbet                       on arm64.
502*e4624435SJonathan Corbet
503*e4624435SJonathan Corbet_HID   6.1.5           This is the primary object to use in device probing,
504*e4624435SJonathan Corbet		       though _CID and _CLS may also be used.
505*e4624435SJonathan Corbet
506*e4624435SJonathan Corbet_INI   6.5.1           Not required, but can be useful in setting up devices
507*e4624435SJonathan Corbet                       when UEFI leaves them in a state that may not be what
508*e4624435SJonathan Corbet                       the driver expects before it starts probing.
509*e4624435SJonathan Corbet
510*e4624435SJonathan Corbet_LPI   8.4.4.3         Recommended for use with processor definitions (_HID
511*e4624435SJonathan Corbet		       ACPI0010) on arm64.  See also _RDI.
512*e4624435SJonathan Corbet
513*e4624435SJonathan Corbet_MLS   6.1.7           Highly recommended for use in internationalization.
514*e4624435SJonathan Corbet
515*e4624435SJonathan Corbet_OFF   7.2.2           It is recommended to define this method for any device
516*e4624435SJonathan Corbet                       that can be turned on or off.
517*e4624435SJonathan Corbet
518*e4624435SJonathan Corbet_ON    7.2.3           It is recommended to define this method for any device
519*e4624435SJonathan Corbet                       that can be turned on or off.
520*e4624435SJonathan Corbet
521*e4624435SJonathan Corbet\_OS   5.7.3           This method will return "Linux" by default (this is
522*e4624435SJonathan Corbet                       the value of the macro ACPI_OS_NAME on Linux).  The
523*e4624435SJonathan Corbet                       command line parameter acpi_os=<string> can be used
524*e4624435SJonathan Corbet                       to set it to some other value.
525*e4624435SJonathan Corbet
526*e4624435SJonathan Corbet_OSC   6.2.11          This method can be a global method in ACPI (i.e.,
527*e4624435SJonathan Corbet                       \_SB._OSC), or it may be associated with a specific
528*e4624435SJonathan Corbet                       device (e.g., \_SB.DEV0._OSC), or both.  When used
529*e4624435SJonathan Corbet                       as a global method, only capabilities published in
530*e4624435SJonathan Corbet                       the ACPI specification are allowed.  When used as
531*e4624435SJonathan Corbet                       a device-specific method, the process described for
532*e4624435SJonathan Corbet                       using _DSD MUST be used to create an _OSC definition;
533*e4624435SJonathan Corbet                       out-of-process use of _OSC is not allowed.  That is,
534*e4624435SJonathan Corbet                       submit the device-specific _OSC usage description as
535*e4624435SJonathan Corbet                       part of the kernel driver submission, get it approved
536*e4624435SJonathan Corbet                       by the kernel community, then register it with the
537*e4624435SJonathan Corbet                       UEFI Forum.
538*e4624435SJonathan Corbet
539*e4624435SJonathan Corbet\_OSI  5.7.2           Deprecated on ARM64.  As far as ACPI firmware is
540*e4624435SJonathan Corbet		       concerned, _OSI is not to be used to determine what
541*e4624435SJonathan Corbet		       sort of system is being used or what functionality
542*e4624435SJonathan Corbet		       is provided.  The _OSC method is to be used instead.
543*e4624435SJonathan Corbet
544*e4624435SJonathan Corbet_PDC   8.4.1           Deprecated, do not use on arm64.
545*e4624435SJonathan Corbet
546*e4624435SJonathan Corbet\_PIC  5.8.1           The method should not be used.  On arm64, the only
547*e4624435SJonathan Corbet                       interrupt model available is GIC.
548*e4624435SJonathan Corbet
549*e4624435SJonathan Corbet\_PR   5.3.1           This namespace is for x86 use only on legacy systems.
550*e4624435SJonathan Corbet                       Do not use it on arm64.
551*e4624435SJonathan Corbet
552*e4624435SJonathan Corbet_PRT   6.2.13          Required as part of the definition of all PCI root
553*e4624435SJonathan Corbet                       devices.
554*e4624435SJonathan Corbet
555*e4624435SJonathan Corbet_PRx   7.3.8-11        Use as needed; power management specific.  If _PR0 is
556*e4624435SJonathan Corbet                       defined, _PR3 must also be defined.
557*e4624435SJonathan Corbet
558*e4624435SJonathan Corbet_PSx   7.3.2-5         Use as needed; power management specific.  If _PS0 is
559*e4624435SJonathan Corbet                       defined, _PS3 must also be defined.  If clocks or
560*e4624435SJonathan Corbet                       regulators need adjusting to be consistent with power
561*e4624435SJonathan Corbet                       usage, change them in these methods.
562*e4624435SJonathan Corbet
563*e4624435SJonathan Corbet_RDI   8.4.4.4         Recommended for use with processor definitions (_HID
564*e4624435SJonathan Corbet		       ACPI0010) on arm64.  This should only be used in
565*e4624435SJonathan Corbet		       conjunction with _LPI.
566*e4624435SJonathan Corbet
567*e4624435SJonathan Corbet\_REV  5.7.4           Always returns the latest version of ACPI supported.
568*e4624435SJonathan Corbet
569*e4624435SJonathan Corbet\_SB   5.3.1           Required on arm64; all devices must be defined in this
570*e4624435SJonathan Corbet                       namespace.
571*e4624435SJonathan Corbet
572*e4624435SJonathan Corbet_SLI   6.2.15          Use is recommended when SLIT table is in use.
573*e4624435SJonathan Corbet
574*e4624435SJonathan Corbet_STA   6.3.7,          It is recommended to define this method for any device
575*e4624435SJonathan Corbet       7.2.4           that can be turned on or off.  See also the STAO table
576*e4624435SJonathan Corbet                       that provides overrides to hide devices in virtualized
577*e4624435SJonathan Corbet                       environments.
578*e4624435SJonathan Corbet
579*e4624435SJonathan Corbet_SRS   6.2.16          Use as needed; see also _PRS.
580*e4624435SJonathan Corbet
581*e4624435SJonathan Corbet_STR   6.1.10          Recommended for conveying device names to end users;
582*e4624435SJonathan Corbet                       this is preferred over using _DDN.
583*e4624435SJonathan Corbet
584*e4624435SJonathan Corbet_SUB   6.1.9           Use as needed; _HID or _CID are preferred.
585*e4624435SJonathan Corbet
586*e4624435SJonathan Corbet_SUN   6.1.11          Use as needed, but recommended.
587*e4624435SJonathan Corbet
588*e4624435SJonathan Corbet_SWS   7.4.3           Use as needed; power management specific; this may
589*e4624435SJonathan Corbet                       require specification changes for use on arm64.
590*e4624435SJonathan Corbet
591*e4624435SJonathan Corbet_UID   6.1.12          Recommended for distinguishing devices of the same
592*e4624435SJonathan Corbet                       class; define it if at all possible.
593*e4624435SJonathan Corbet===== ================ ========================================================
594*e4624435SJonathan Corbet
595*e4624435SJonathan Corbet
596*e4624435SJonathan Corbet
597*e4624435SJonathan Corbet
598*e4624435SJonathan CorbetACPI Event Model
599*e4624435SJonathan Corbet----------------
600*e4624435SJonathan CorbetDo not use GPE block devices; these are not supported in the hardware reduced
601*e4624435SJonathan Corbetprofile used by arm64.  Since there are no GPE blocks defined for use on ARM
602*e4624435SJonathan Corbetplatforms, ACPI events must be signaled differently.
603*e4624435SJonathan Corbet
604*e4624435SJonathan CorbetThere are two options: GPIO-signaled interrupts (Section 5.6.5), and
605*e4624435SJonathan Corbetinterrupt-signaled events (Section 5.6.9).  Interrupt-signaled events are a
606*e4624435SJonathan Corbetnew feature in the ACPI 6.1 specification.  Either - or both - can be used
607*e4624435SJonathan Corbeton a given platform, and which to use may be dependent of limitations in any
608*e4624435SJonathan Corbetgiven SoC.  If possible, interrupt-signaled events are recommended.
609*e4624435SJonathan Corbet
610*e4624435SJonathan Corbet
611*e4624435SJonathan CorbetACPI Processor Control
612*e4624435SJonathan Corbet----------------------
613*e4624435SJonathan CorbetSection 8 of the ACPI specification changed significantly in version 6.0.
614*e4624435SJonathan CorbetProcessors should now be defined as Device objects with _HID ACPI0007; do
615*e4624435SJonathan Corbetnot use the deprecated Processor statement in ASL.  All multiprocessor systems
616*e4624435SJonathan Corbetshould also define a hierarchy of processors, done with Processor Container
617*e4624435SJonathan CorbetDevices (see Section 8.4.3.1, _HID ACPI0010); do not use processor aggregator
618*e4624435SJonathan Corbetdevices (Section 8.5) to describe processor topology.  Section 8.4 of the
619*e4624435SJonathan Corbetspecification describes the semantics of these object definitions and how
620*e4624435SJonathan Corbetthey interrelate.
621*e4624435SJonathan Corbet
622*e4624435SJonathan CorbetMost importantly, the processor hierarchy defined also defines the low power
623*e4624435SJonathan Corbetidle states that are available to the platform, along with the rules for
624*e4624435SJonathan Corbetdetermining which processors can be turned on or off and the circumstances
625*e4624435SJonathan Corbetthat control that.  Without this information, the processors will run in
626*e4624435SJonathan Corbetwhatever power state they were left in by UEFI.
627*e4624435SJonathan Corbet
628*e4624435SJonathan CorbetNote too, that the processor Device objects defined and the entries in the
629*e4624435SJonathan CorbetMADT for GICs are expected to be in synchronization.  The _UID of the Device
630*e4624435SJonathan Corbetobject must correspond to processor IDs used in the MADT.
631*e4624435SJonathan Corbet
632*e4624435SJonathan CorbetIt is recommended that CPPC (8.4.5) be used as the primary model for processor
633*e4624435SJonathan Corbetperformance control on arm64.  C-states and P-states may become available at
634*e4624435SJonathan Corbetsome point in the future, but most current design work appears to favor CPPC.
635*e4624435SJonathan Corbet
636*e4624435SJonathan CorbetFurther, it is essential that the ARMv8 SoC provide a fully functional
637*e4624435SJonathan Corbetimplementation of PSCI; this will be the only mechanism supported by ACPI
638*e4624435SJonathan Corbetto control CPU power state.  Booting of secondary CPUs using the ACPI
639*e4624435SJonathan Corbetparking protocol is possible, but discouraged, since only PSCI is supported
640*e4624435SJonathan Corbetfor ARM servers.
641*e4624435SJonathan Corbet
642*e4624435SJonathan Corbet
643*e4624435SJonathan CorbetACPI System Address Map Interfaces
644*e4624435SJonathan Corbet----------------------------------
645*e4624435SJonathan CorbetIn Section 15 of the ACPI specification, several methods are mentioned as
646*e4624435SJonathan Corbetpossible mechanisms for conveying memory resource information to the kernel.
647*e4624435SJonathan CorbetFor arm64, we will only support UEFI for booting with ACPI, hence the UEFI
648*e4624435SJonathan CorbetGetMemoryMap() boot service is the only mechanism that will be used.
649*e4624435SJonathan Corbet
650*e4624435SJonathan Corbet
651*e4624435SJonathan CorbetACPI Platform Error Interfaces (APEI)
652*e4624435SJonathan Corbet-------------------------------------
653*e4624435SJonathan CorbetThe APEI tables supported are described above.
654*e4624435SJonathan Corbet
655*e4624435SJonathan CorbetAPEI requires the equivalent of an SCI and an NMI on ARMv8.  The SCI is used
656*e4624435SJonathan Corbetto notify the OSPM of errors that have occurred but can be corrected and the
657*e4624435SJonathan Corbetsystem can continue correct operation, even if possibly degraded.  The NMI is
658*e4624435SJonathan Corbetused to indicate fatal errors that cannot be corrected, and require immediate
659*e4624435SJonathan Corbetattention.
660*e4624435SJonathan Corbet
661*e4624435SJonathan CorbetSince there is no direct equivalent of the x86 SCI or NMI, arm64 handles
662*e4624435SJonathan Corbetthese slightly differently.  The SCI is handled as a high priority interrupt;
663*e4624435SJonathan Corbetgiven that these are corrected (or correctable) errors being reported, this
664*e4624435SJonathan Corbetis sufficient.  The NMI is emulated as the highest priority interrupt
665*e4624435SJonathan Corbetpossible.  This implies some caution must be used since there could be
666*e4624435SJonathan Corbetinterrupts at higher privilege levels or even interrupts at the same priority
667*e4624435SJonathan Corbetas the emulated NMI.  In Linux, this should not be the case but one should
668*e4624435SJonathan Corbetbe aware it could happen.
669*e4624435SJonathan Corbet
670*e4624435SJonathan Corbet
671*e4624435SJonathan CorbetACPI Objects Not Supported on ARM64
672*e4624435SJonathan Corbet-----------------------------------
673*e4624435SJonathan CorbetWhile this may change in the future, there are several classes of objects
674*e4624435SJonathan Corbetthat can be defined, but are not currently of general interest to ARM servers.
675*e4624435SJonathan CorbetSome of these objects have x86 equivalents, and may actually make sense in ARM
676*e4624435SJonathan Corbetservers.  However, there is either no hardware available at present, or there
677*e4624435SJonathan Corbetmay not even be a non-ARM implementation yet.  Hence, they are not currently
678*e4624435SJonathan Corbetsupported.
679*e4624435SJonathan Corbet
680*e4624435SJonathan CorbetThe following classes of objects are not supported:
681*e4624435SJonathan Corbet
682*e4624435SJonathan Corbet       -  Section 9.2: ambient light sensor devices
683*e4624435SJonathan Corbet
684*e4624435SJonathan Corbet       -  Section 9.3: battery devices
685*e4624435SJonathan Corbet
686*e4624435SJonathan Corbet       -  Section 9.4: lids (e.g., laptop lids)
687*e4624435SJonathan Corbet
688*e4624435SJonathan Corbet       -  Section 9.8.2: IDE controllers
689*e4624435SJonathan Corbet
690*e4624435SJonathan Corbet       -  Section 9.9: floppy controllers
691*e4624435SJonathan Corbet
692*e4624435SJonathan Corbet       -  Section 9.10: GPE block devices
693*e4624435SJonathan Corbet
694*e4624435SJonathan Corbet       -  Section 9.15: PC/AT RTC/CMOS devices
695*e4624435SJonathan Corbet
696*e4624435SJonathan Corbet       -  Section 9.16: user presence detection devices
697*e4624435SJonathan Corbet
698*e4624435SJonathan Corbet       -  Section 9.17: I/O APIC devices; all GICs must be enumerable via MADT
699*e4624435SJonathan Corbet
700*e4624435SJonathan Corbet       -  Section 9.18: time and alarm devices (see 9.15)
701*e4624435SJonathan Corbet
702*e4624435SJonathan Corbet       -  Section 10: power source and power meter devices
703*e4624435SJonathan Corbet
704*e4624435SJonathan Corbet       -  Section 11: thermal management
705*e4624435SJonathan Corbet
706*e4624435SJonathan Corbet       -  Section 12: embedded controllers interface
707*e4624435SJonathan Corbet
708*e4624435SJonathan Corbet       -  Section 13: SMBus interfaces
709*e4624435SJonathan Corbet
710*e4624435SJonathan Corbet
711*e4624435SJonathan CorbetThis also means that there is no support for the following objects:
712*e4624435SJonathan Corbet
713*e4624435SJonathan Corbet====   =========================== ====   ==========
714*e4624435SJonathan CorbetName   Section                     Name   Section
715*e4624435SJonathan Corbet====   =========================== ====   ==========
716*e4624435SJonathan Corbet_ALC   9.3.4                       _FDM   9.10.3
717*e4624435SJonathan Corbet_ALI   9.3.2                       _FIX   6.2.7
718*e4624435SJonathan Corbet_ALP   9.3.6                       _GAI   10.4.5
719*e4624435SJonathan Corbet_ALR   9.3.5                       _GHL   10.4.7
720*e4624435SJonathan Corbet_ALT   9.3.3                       _GTM   9.9.2.1.1
721*e4624435SJonathan Corbet_BCT   10.2.2.10                   _LID   9.5.1
722*e4624435SJonathan Corbet_BDN   6.5.3                       _PAI   10.4.4
723*e4624435SJonathan Corbet_BIF   10.2.2.1                    _PCL   10.3.2
724*e4624435SJonathan Corbet_BIX   10.2.2.1                    _PIF   10.3.3
725*e4624435SJonathan Corbet_BLT   9.2.3                       _PMC   10.4.1
726*e4624435SJonathan Corbet_BMA   10.2.2.4                    _PMD   10.4.8
727*e4624435SJonathan Corbet_BMC   10.2.2.12                   _PMM   10.4.3
728*e4624435SJonathan Corbet_BMD   10.2.2.11                   _PRL   10.3.4
729*e4624435SJonathan Corbet_BMS   10.2.2.5                    _PSR   10.3.1
730*e4624435SJonathan Corbet_BST   10.2.2.6                    _PTP   10.4.2
731*e4624435SJonathan Corbet_BTH   10.2.2.7                    _SBS   10.1.3
732*e4624435SJonathan Corbet_BTM   10.2.2.9                    _SHL   10.4.6
733*e4624435SJonathan Corbet_BTP   10.2.2.8                    _STM   9.9.2.1.1
734*e4624435SJonathan Corbet_DCK   6.5.2                       _UPD   9.16.1
735*e4624435SJonathan Corbet_EC    12.12                       _UPP   9.16.2
736*e4624435SJonathan Corbet_FDE   9.10.1                      _WPC   10.5.2
737*e4624435SJonathan Corbet_FDI   9.10.2                      _WPP   10.5.3
738*e4624435SJonathan Corbet====   =========================== ====   ==========
739