1e4624435SJonathan Corbet=========== 2e4624435SJonathan CorbetACPI Tables 3e4624435SJonathan Corbet=========== 4e4624435SJonathan Corbet 5e4624435SJonathan CorbetThe expectations of individual ACPI tables are discussed in the list that 6e4624435SJonathan Corbetfollows. 7e4624435SJonathan Corbet 8e4624435SJonathan CorbetIf a section number is used, it refers to a section number in the ACPI 9e4624435SJonathan Corbetspecification where the object is defined. If "Signature Reserved" is used, 10e4624435SJonathan Corbetthe table signature (the first four bytes of the table) is the only portion 11e4624435SJonathan Corbetof the table recognized by the specification, and the actual table is defined 12e4624435SJonathan Corbetoutside of the UEFI Forum (see Section 5.2.6 of the specification). 13e4624435SJonathan Corbet 14e4624435SJonathan CorbetFor ACPI on arm64, tables also fall into the following categories: 15e4624435SJonathan Corbet 16e4624435SJonathan Corbet - Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT 17e4624435SJonathan Corbet 18e4624435SJonathan Corbet - Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT 19e4624435SJonathan Corbet 206aeadf78SLinus Torvalds - Optional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, 216aeadf78SLinus Torvalds HMAT, IBFT, IORT, MCHI, MPAM, MPST, MSCT, NFIT, PMTT, PPTT, RASF, SBST, 226aeadf78SLinus Torvalds SDEI, SLIT, SPMI, SRAT, STAO, TCPA, TPM2, UEFI, XENV 23e4624435SJonathan Corbet 246aeadf78SLinus Torvalds - Not supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, 256aeadf78SLinus Torvalds MSDM, OEMx, PDTT, PSDT, RAS2, RSDT, SLIC, WAET, WDAT, WDRT, WPBT 26e4624435SJonathan Corbet 27e4624435SJonathan Corbet====== ======================================================================== 28e4624435SJonathan CorbetTable Usage for ARMv8 Linux 29e4624435SJonathan Corbet====== ======================================================================== 306aeadf78SLinus TorvaldsAEST Signature Reserved (signature == "AEST") 316aeadf78SLinus Torvalds 326aeadf78SLinus Torvalds **Arm Error Source Table** 336aeadf78SLinus Torvalds 346aeadf78SLinus Torvalds This table informs the OS of any error nodes in the system that are 356aeadf78SLinus Torvalds compliant with the Arm RAS architecture. 366aeadf78SLinus Torvalds 376aeadf78SLinus TorvaldsAGDI Signature Reserved (signature == "AGDI") 386aeadf78SLinus Torvalds 396aeadf78SLinus Torvalds **Arm Generic diagnostic Dump and Reset Device Interface Table** 406aeadf78SLinus Torvalds 416aeadf78SLinus Torvalds This table describes a non-maskable event, that is used by the platform 426aeadf78SLinus Torvalds firmware, to request the OS to generate a diagnostic dump and reset the device. 436aeadf78SLinus Torvalds 446aeadf78SLinus TorvaldsAPMT Signature Reserved (signature == "APMT") 456aeadf78SLinus Torvalds 466aeadf78SLinus Torvalds **Arm Performance Monitoring Table** 476aeadf78SLinus Torvalds 48*d56b699dSBjorn Helgaas This table describes the properties of PMU support implemented by 496aeadf78SLinus Torvalds components in the system. 506aeadf78SLinus Torvalds 51e4624435SJonathan CorbetBERT Section 18.3 (signature == "BERT") 52e4624435SJonathan Corbet 53e4624435SJonathan Corbet **Boot Error Record Table** 54e4624435SJonathan Corbet 55e4624435SJonathan Corbet Must be supplied if RAS support is provided by the platform. It 56e4624435SJonathan Corbet is recommended this table be supplied. 57e4624435SJonathan Corbet 58e4624435SJonathan CorbetBOOT Signature Reserved (signature == "BOOT") 59e4624435SJonathan Corbet 60e4624435SJonathan Corbet **simple BOOT flag table** 61e4624435SJonathan Corbet 62e4624435SJonathan Corbet Microsoft only table, will not be supported. 63e4624435SJonathan Corbet 64e4624435SJonathan CorbetBGRT Section 5.2.22 (signature == "BGRT") 65e4624435SJonathan Corbet 66e4624435SJonathan Corbet **Boot Graphics Resource Table** 67e4624435SJonathan Corbet 68e4624435SJonathan Corbet Optional, not currently supported, with no real use-case for an 69e4624435SJonathan Corbet ARM server. 70e4624435SJonathan Corbet 716aeadf78SLinus TorvaldsCEDT Signature Reserved (signature == "CEDT") 726aeadf78SLinus Torvalds 736aeadf78SLinus Torvalds **CXL Early Discovery Table** 746aeadf78SLinus Torvalds 756aeadf78SLinus Torvalds This table allows the OS to discover any CXL Host Bridges and the Host 766aeadf78SLinus Torvalds Bridge registers. 776aeadf78SLinus Torvalds 78e4624435SJonathan CorbetCPEP Section 5.2.18 (signature == "CPEP") 79e4624435SJonathan Corbet 80e4624435SJonathan Corbet **Corrected Platform Error Polling table** 81e4624435SJonathan Corbet 82e4624435SJonathan Corbet Optional, not currently supported, and not recommended until such 83e4624435SJonathan Corbet time as ARM-compatible hardware is available, and the specification 84e4624435SJonathan Corbet suitably modified. 85e4624435SJonathan Corbet 86e4624435SJonathan CorbetCSRT Signature Reserved (signature == "CSRT") 87e4624435SJonathan Corbet 88e4624435SJonathan Corbet **Core System Resources Table** 89e4624435SJonathan Corbet 90e4624435SJonathan Corbet Optional, not currently supported. 91e4624435SJonathan Corbet 92e4624435SJonathan CorbetDBG2 Signature Reserved (signature == "DBG2") 93e4624435SJonathan Corbet 94e4624435SJonathan Corbet **DeBuG port table 2** 95e4624435SJonathan Corbet 96e4624435SJonathan Corbet License has changed and should be usable. Optional if used instead 97e4624435SJonathan Corbet of earlycon=<device> on the command line. 98e4624435SJonathan Corbet 99e4624435SJonathan CorbetDBGP Signature Reserved (signature == "DBGP") 100e4624435SJonathan Corbet 101e4624435SJonathan Corbet **DeBuG Port table** 102e4624435SJonathan Corbet 103e4624435SJonathan Corbet Microsoft only table, will not be supported. 104e4624435SJonathan Corbet 105e4624435SJonathan CorbetDSDT Section 5.2.11.1 (signature == "DSDT") 106e4624435SJonathan Corbet 107e4624435SJonathan Corbet **Differentiated System Description Table** 108e4624435SJonathan Corbet 109e4624435SJonathan Corbet A DSDT is required; see also SSDT. 110e4624435SJonathan Corbet 111e4624435SJonathan Corbet ACPI tables contain only one DSDT but can contain one or more SSDTs, 112e4624435SJonathan Corbet which are optional. Each SSDT can only add to the ACPI namespace, 113e4624435SJonathan Corbet but cannot modify or replace anything in the DSDT. 114e4624435SJonathan Corbet 115e4624435SJonathan CorbetDMAR Signature Reserved (signature == "DMAR") 116e4624435SJonathan Corbet 117e4624435SJonathan Corbet **DMA Remapping table** 118e4624435SJonathan Corbet 119e4624435SJonathan Corbet x86 only table, will not be supported. 120e4624435SJonathan Corbet 121e4624435SJonathan CorbetDRTM Signature Reserved (signature == "DRTM") 122e4624435SJonathan Corbet 123e4624435SJonathan Corbet **Dynamic Root of Trust for Measurement table** 124e4624435SJonathan Corbet 125e4624435SJonathan Corbet Optional, not currently supported. 126e4624435SJonathan Corbet 127e4624435SJonathan CorbetECDT Section 5.2.16 (signature == "ECDT") 128e4624435SJonathan Corbet 129e4624435SJonathan Corbet **Embedded Controller Description Table** 130e4624435SJonathan Corbet 131e4624435SJonathan Corbet Optional, not currently supported, but could be used on ARM if and 132e4624435SJonathan Corbet only if one uses the GPE_BIT field to represent an IRQ number, since 133e4624435SJonathan Corbet there are no GPE blocks defined in hardware reduced mode. This would 134e4624435SJonathan Corbet need to be modified in the ACPI specification. 135e4624435SJonathan Corbet 136e4624435SJonathan CorbetEINJ Section 18.6 (signature == "EINJ") 137e4624435SJonathan Corbet 138e4624435SJonathan Corbet **Error Injection table** 139e4624435SJonathan Corbet 140e4624435SJonathan Corbet This table is very useful for testing platform response to error 141e4624435SJonathan Corbet conditions; it allows one to inject an error into the system as 142e4624435SJonathan Corbet if it had actually occurred. However, this table should not be 143e4624435SJonathan Corbet shipped with a production system; it should be dynamically loaded 144e4624435SJonathan Corbet and executed with the ACPICA tools only during testing. 145e4624435SJonathan Corbet 146e4624435SJonathan CorbetERST Section 18.5 (signature == "ERST") 147e4624435SJonathan Corbet 148e4624435SJonathan Corbet **Error Record Serialization Table** 149e4624435SJonathan Corbet 150e4624435SJonathan Corbet On a platform supports RAS, this table must be supplied if it is not 151e4624435SJonathan Corbet UEFI-based; if it is UEFI-based, this table may be supplied. When this 152e4624435SJonathan Corbet table is not present, UEFI run time service will be utilized to save 153e4624435SJonathan Corbet and retrieve hardware error information to and from a persistent store. 154e4624435SJonathan Corbet 155e4624435SJonathan CorbetETDT Signature Reserved (signature == "ETDT") 156e4624435SJonathan Corbet 157e4624435SJonathan Corbet **Event Timer Description Table** 158e4624435SJonathan Corbet 159e4624435SJonathan Corbet Obsolete table, will not be supported. 160e4624435SJonathan Corbet 161e4624435SJonathan CorbetFACS Section 5.2.10 (signature == "FACS") 162e4624435SJonathan Corbet 163e4624435SJonathan Corbet **Firmware ACPI Control Structure** 164e4624435SJonathan Corbet 165e4624435SJonathan Corbet It is unlikely that this table will be terribly useful. If it is 166e4624435SJonathan Corbet provided, the Global Lock will NOT be used since it is not part of 167e4624435SJonathan Corbet the hardware reduced profile, and only 64-bit address fields will 168e4624435SJonathan Corbet be considered valid. 169e4624435SJonathan Corbet 170e4624435SJonathan CorbetFADT Section 5.2.9 (signature == "FACP") 171e4624435SJonathan Corbet 172e4624435SJonathan Corbet **Fixed ACPI Description Table** 173e4624435SJonathan Corbet Required for arm64. 174e4624435SJonathan Corbet 175e4624435SJonathan Corbet 176e4624435SJonathan Corbet The HW_REDUCED_ACPI flag must be set. All of the fields that are 177e4624435SJonathan Corbet to be ignored when HW_REDUCED_ACPI is set are expected to be set to 178e4624435SJonathan Corbet zero. 179e4624435SJonathan Corbet 180e4624435SJonathan Corbet If an FACS table is provided, the X_FIRMWARE_CTRL field is to be 181e4624435SJonathan Corbet used, not FIRMWARE_CTRL. 182e4624435SJonathan Corbet 183e4624435SJonathan Corbet If PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is 184e4624435SJonathan Corbet filled in properly - that the PSCI_COMPLIANT flag is set and that 185e4624435SJonathan Corbet PSCI_USE_HVC is set or unset as needed (see table 5-37). 186e4624435SJonathan Corbet 187e4624435SJonathan Corbet For the DSDT that is also required, the X_DSDT field is to be used, 188e4624435SJonathan Corbet not the DSDT field. 189e4624435SJonathan Corbet 190e4624435SJonathan CorbetFPDT Section 5.2.23 (signature == "FPDT") 191e4624435SJonathan Corbet 192e4624435SJonathan Corbet **Firmware Performance Data Table** 193e4624435SJonathan Corbet 194e4624435SJonathan Corbet Optional, useful for boot performance profiling. 195e4624435SJonathan Corbet 196e4624435SJonathan CorbetGTDT Section 5.2.24 (signature == "GTDT") 197e4624435SJonathan Corbet 198e4624435SJonathan Corbet **Generic Timer Description Table** 199e4624435SJonathan Corbet 200e4624435SJonathan Corbet Required for arm64. 201e4624435SJonathan Corbet 202e4624435SJonathan CorbetHEST Section 18.3.2 (signature == "HEST") 203e4624435SJonathan Corbet 204e4624435SJonathan Corbet **Hardware Error Source Table** 205e4624435SJonathan Corbet 206e4624435SJonathan Corbet ARM-specific error sources have been defined; please use those or the 207e4624435SJonathan Corbet PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER 208e4624435SJonathan Corbet Bridge), or use type 9 (Generic Hardware Error Source). Firmware first 209e4624435SJonathan Corbet error handling is possible if and only if Trusted Firmware is being 210e4624435SJonathan Corbet used on arm64. 211e4624435SJonathan Corbet 212e4624435SJonathan Corbet Must be supplied if RAS support is provided by the platform. It 213e4624435SJonathan Corbet is recommended this table be supplied. 214e4624435SJonathan Corbet 2156aeadf78SLinus TorvaldsHMAT Section 5.2.28 (signature == "HMAT") 2166aeadf78SLinus Torvalds 2176aeadf78SLinus Torvalds **Heterogeneous Memory Attribute Table** 2186aeadf78SLinus Torvalds 2196aeadf78SLinus Torvalds This table describes the memory attributes, such as memory side cache 2206aeadf78SLinus Torvalds attributes and bandwidth and latency details, related to Memory Proximity 2216aeadf78SLinus Torvalds Domains. The OS uses this information to optimize the system memory 2226aeadf78SLinus Torvalds configuration. 2236aeadf78SLinus Torvalds 224e4624435SJonathan CorbetHPET Signature Reserved (signature == "HPET") 225e4624435SJonathan Corbet 226e4624435SJonathan Corbet **High Precision Event timer Table** 227e4624435SJonathan Corbet 228e4624435SJonathan Corbet x86 only table, will not be supported. 229e4624435SJonathan Corbet 230e4624435SJonathan CorbetIBFT Signature Reserved (signature == "IBFT") 231e4624435SJonathan Corbet 232e4624435SJonathan Corbet **iSCSI Boot Firmware Table** 233e4624435SJonathan Corbet 234e4624435SJonathan Corbet Microsoft defined table, support TBD. 235e4624435SJonathan Corbet 236e4624435SJonathan CorbetIORT Signature Reserved (signature == "IORT") 237e4624435SJonathan Corbet 238e4624435SJonathan Corbet **Input Output Remapping Table** 239e4624435SJonathan Corbet 240e4624435SJonathan Corbet arm64 only table, required in order to describe IO topology, SMMUs, 241e4624435SJonathan Corbet and GIC ITSs, and how those various components are connected together, 242e4624435SJonathan Corbet such as identifying which components are behind which SMMUs/ITSs. 243e4624435SJonathan Corbet This table will only be required on certain SBSA platforms (e.g., 244e4624435SJonathan Corbet when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it 245e4624435SJonathan Corbet remains optional. 246e4624435SJonathan Corbet 247e4624435SJonathan CorbetIVRS Signature Reserved (signature == "IVRS") 248e4624435SJonathan Corbet 249e4624435SJonathan Corbet **I/O Virtualization Reporting Structure** 250e4624435SJonathan Corbet 251e4624435SJonathan Corbet x86_64 (AMD) only table, will not be supported. 252e4624435SJonathan Corbet 253e4624435SJonathan CorbetLPIT Signature Reserved (signature == "LPIT") 254e4624435SJonathan Corbet 255e4624435SJonathan Corbet **Low Power Idle Table** 256e4624435SJonathan Corbet 257e4624435SJonathan Corbet x86 only table as of ACPI 5.1; starting with ACPI 6.0, processor 258e4624435SJonathan Corbet descriptions and power states on ARM platforms should use the DSDT 259e4624435SJonathan Corbet and define processor container devices (_HID ACPI0010, Section 8.4, 260e4624435SJonathan Corbet and more specifically 8.4.3 and 8.4.4). 261e4624435SJonathan Corbet 262e4624435SJonathan CorbetMADT Section 5.2.12 (signature == "APIC") 263e4624435SJonathan Corbet 264e4624435SJonathan Corbet **Multiple APIC Description Table** 265e4624435SJonathan Corbet 266e4624435SJonathan Corbet Required for arm64. Only the GIC interrupt controller structures 267e4624435SJonathan Corbet should be used (types 0xA - 0xF). 268e4624435SJonathan Corbet 269e4624435SJonathan CorbetMCFG Signature Reserved (signature == "MCFG") 270e4624435SJonathan Corbet 271e4624435SJonathan Corbet **Memory-mapped ConFiGuration space** 272e4624435SJonathan Corbet 273e4624435SJonathan Corbet If the platform supports PCI/PCIe, an MCFG table is required. 274e4624435SJonathan Corbet 275e4624435SJonathan CorbetMCHI Signature Reserved (signature == "MCHI") 276e4624435SJonathan Corbet 277e4624435SJonathan Corbet **Management Controller Host Interface table** 278e4624435SJonathan Corbet 279e4624435SJonathan Corbet Optional, not currently supported. 280e4624435SJonathan Corbet 2816aeadf78SLinus TorvaldsMPAM Signature Reserved (signature == "MPAM") 2826aeadf78SLinus Torvalds 2836aeadf78SLinus Torvalds **Memory Partitioning And Monitoring table** 2846aeadf78SLinus Torvalds 2856aeadf78SLinus Torvalds This table allows the OS to discover the MPAM controls implemented by 2866aeadf78SLinus Torvalds the subsystems. 2876aeadf78SLinus Torvalds 288e4624435SJonathan CorbetMPST Section 5.2.21 (signature == "MPST") 289e4624435SJonathan Corbet 290e4624435SJonathan Corbet **Memory Power State Table** 291e4624435SJonathan Corbet 292e4624435SJonathan Corbet Optional, not currently supported. 293e4624435SJonathan Corbet 294e4624435SJonathan CorbetMSCT Section 5.2.19 (signature == "MSCT") 295e4624435SJonathan Corbet 296e4624435SJonathan Corbet **Maximum System Characteristic Table** 297e4624435SJonathan Corbet 298e4624435SJonathan Corbet Optional, not currently supported. 299e4624435SJonathan Corbet 300e4624435SJonathan CorbetMSDM Signature Reserved (signature == "MSDM") 301e4624435SJonathan Corbet 302e4624435SJonathan Corbet **Microsoft Data Management table** 303e4624435SJonathan Corbet 304e4624435SJonathan Corbet Microsoft only table, will not be supported. 305e4624435SJonathan Corbet 306e4624435SJonathan CorbetNFIT Section 5.2.25 (signature == "NFIT") 307e4624435SJonathan Corbet 308e4624435SJonathan Corbet **NVDIMM Firmware Interface Table** 309e4624435SJonathan Corbet 310e4624435SJonathan Corbet Optional, not currently supported. 311e4624435SJonathan Corbet 312e4624435SJonathan CorbetOEMx Signature of "OEMx" only 313e4624435SJonathan Corbet 314e4624435SJonathan Corbet **OEM Specific Tables** 315e4624435SJonathan Corbet 316e4624435SJonathan Corbet All tables starting with a signature of "OEM" are reserved for OEM 317e4624435SJonathan Corbet use. Since these are not meant to be of general use but are limited 318e4624435SJonathan Corbet to very specific end users, they are not recommended for use and are 319e4624435SJonathan Corbet not supported by the kernel for arm64. 320e4624435SJonathan Corbet 321e4624435SJonathan CorbetPCCT Section 14.1 (signature == "PCCT) 322e4624435SJonathan Corbet 323e4624435SJonathan Corbet **Platform Communications Channel Table** 324e4624435SJonathan Corbet 325e4624435SJonathan Corbet Recommend for use on arm64; use of PCC is recommended when using CPPC 326e4624435SJonathan Corbet to control performance and power for platform processors. 327e4624435SJonathan Corbet 3286aeadf78SLinus TorvaldsPDTT Section 5.2.29 (signature == "PDTT") 3296aeadf78SLinus Torvalds 3306aeadf78SLinus Torvalds **Platform Debug Trigger Table** 3316aeadf78SLinus Torvalds 3326aeadf78SLinus Torvalds This table describes PCC channels used to gather debug logs of 3336aeadf78SLinus Torvalds non-architectural features. 3346aeadf78SLinus Torvalds 3356aeadf78SLinus Torvalds 336e4624435SJonathan CorbetPMTT Section 5.2.21.12 (signature == "PMTT") 337e4624435SJonathan Corbet 338e4624435SJonathan Corbet **Platform Memory Topology Table** 339e4624435SJonathan Corbet 340e4624435SJonathan Corbet Optional, not currently supported. 341e4624435SJonathan Corbet 3426aeadf78SLinus TorvaldsPPTT Section 5.2.30 (signature == "PPTT") 3436aeadf78SLinus Torvalds 3446aeadf78SLinus Torvalds **Processor Properties Topology Table** 3456aeadf78SLinus Torvalds 3466aeadf78SLinus Torvalds This table provides the processor and cache topology. 3476aeadf78SLinus Torvalds 348e4624435SJonathan CorbetPSDT Section 5.2.11.3 (signature == "PSDT") 349e4624435SJonathan Corbet 350e4624435SJonathan Corbet **Persistent System Description Table** 351e4624435SJonathan Corbet 352e4624435SJonathan Corbet Obsolete table, will not be supported. 353e4624435SJonathan Corbet 3546aeadf78SLinus TorvaldsRAS2 Section 5.2.21 (signature == "RAS2") 3556aeadf78SLinus Torvalds 3566aeadf78SLinus Torvalds **RAS Features 2 table** 3576aeadf78SLinus Torvalds 3586aeadf78SLinus Torvalds This table provides interfaces for the RAS capabilities implemented in 3596aeadf78SLinus Torvalds the platform. 3606aeadf78SLinus Torvalds 361e4624435SJonathan CorbetRASF Section 5.2.20 (signature == "RASF") 362e4624435SJonathan Corbet 363e4624435SJonathan Corbet **RAS Feature table** 364e4624435SJonathan Corbet 365e4624435SJonathan Corbet Optional, not currently supported. 366e4624435SJonathan Corbet 367e4624435SJonathan CorbetRSDP Section 5.2.5 (signature == "RSD PTR") 368e4624435SJonathan Corbet 369e4624435SJonathan Corbet **Root System Description PoinTeR** 370e4624435SJonathan Corbet 371e4624435SJonathan Corbet Required for arm64. 372e4624435SJonathan Corbet 373e4624435SJonathan CorbetRSDT Section 5.2.7 (signature == "RSDT") 374e4624435SJonathan Corbet 375e4624435SJonathan Corbet **Root System Description Table** 376e4624435SJonathan Corbet 377e4624435SJonathan Corbet Since this table can only provide 32-bit addresses, it is deprecated 378e4624435SJonathan Corbet on arm64, and will not be used. If provided, it will be ignored. 379e4624435SJonathan Corbet 380e4624435SJonathan CorbetSBST Section 5.2.14 (signature == "SBST") 381e4624435SJonathan Corbet 382e4624435SJonathan Corbet **Smart Battery Subsystem Table** 383e4624435SJonathan Corbet 384e4624435SJonathan Corbet Optional, not currently supported. 385e4624435SJonathan Corbet 3866aeadf78SLinus TorvaldsSDEI Signature Reserved (signature == "SDEI") 3876aeadf78SLinus Torvalds 3886aeadf78SLinus Torvalds **Software Delegated Exception Interface table** 3896aeadf78SLinus Torvalds 3906aeadf78SLinus Torvalds This table advertises the presence of the SDEI interface. 3916aeadf78SLinus Torvalds 392e4624435SJonathan CorbetSLIC Signature Reserved (signature == "SLIC") 393e4624435SJonathan Corbet 394e4624435SJonathan Corbet **Software LIcensing table** 395e4624435SJonathan Corbet 396e4624435SJonathan Corbet Microsoft only table, will not be supported. 397e4624435SJonathan Corbet 398e4624435SJonathan CorbetSLIT Section 5.2.17 (signature == "SLIT") 399e4624435SJonathan Corbet 400e4624435SJonathan Corbet **System Locality distance Information Table** 401e4624435SJonathan Corbet 402e4624435SJonathan Corbet Optional in general, but required for NUMA systems. 403e4624435SJonathan Corbet 404e4624435SJonathan CorbetSPCR Signature Reserved (signature == "SPCR") 405e4624435SJonathan Corbet 406e4624435SJonathan Corbet **Serial Port Console Redirection table** 407e4624435SJonathan Corbet 408e4624435SJonathan Corbet Required for arm64. 409e4624435SJonathan Corbet 410e4624435SJonathan CorbetSPMI Signature Reserved (signature == "SPMI") 411e4624435SJonathan Corbet 412e4624435SJonathan Corbet **Server Platform Management Interface table** 413e4624435SJonathan Corbet 414e4624435SJonathan Corbet Optional, not currently supported. 415e4624435SJonathan Corbet 416e4624435SJonathan CorbetSRAT Section 5.2.16 (signature == "SRAT") 417e4624435SJonathan Corbet 418e4624435SJonathan Corbet **System Resource Affinity Table** 419e4624435SJonathan Corbet 420e4624435SJonathan Corbet Optional, but if used, only the GICC Affinity structures are read. 421e4624435SJonathan Corbet To support arm64 NUMA, this table is required. 422e4624435SJonathan Corbet 423e4624435SJonathan CorbetSSDT Section 5.2.11.2 (signature == "SSDT") 424e4624435SJonathan Corbet 425e4624435SJonathan Corbet **Secondary System Description Table** 426e4624435SJonathan Corbet 427e4624435SJonathan Corbet These tables are a continuation of the DSDT; these are recommended 428e4624435SJonathan Corbet for use with devices that can be added to a running system, but can 429e4624435SJonathan Corbet also serve the purpose of dividing up device descriptions into more 430e4624435SJonathan Corbet manageable pieces. 431e4624435SJonathan Corbet 432e4624435SJonathan Corbet An SSDT can only ADD to the ACPI namespace. It cannot modify or 433e4624435SJonathan Corbet replace existing device descriptions already in the namespace. 434e4624435SJonathan Corbet 435e4624435SJonathan Corbet These tables are optional, however. ACPI tables should contain only 436e4624435SJonathan Corbet one DSDT but can contain many SSDTs. 437e4624435SJonathan Corbet 438e4624435SJonathan CorbetSTAO Signature Reserved (signature == "STAO") 439e4624435SJonathan Corbet 440e4624435SJonathan Corbet **_STA Override table** 441e4624435SJonathan Corbet 442e4624435SJonathan Corbet Optional, but only necessary in virtualized environments in order to 443e4624435SJonathan Corbet hide devices from guest OSs. 444e4624435SJonathan Corbet 445e4624435SJonathan CorbetTCPA Signature Reserved (signature == "TCPA") 446e4624435SJonathan Corbet 447e4624435SJonathan Corbet **Trusted Computing Platform Alliance table** 448e4624435SJonathan Corbet 449e4624435SJonathan Corbet Optional, not currently supported, and may need changes to fully 450e4624435SJonathan Corbet interoperate with arm64. 451e4624435SJonathan Corbet 452e4624435SJonathan CorbetTPM2 Signature Reserved (signature == "TPM2") 453e4624435SJonathan Corbet 454e4624435SJonathan Corbet **Trusted Platform Module 2 table** 455e4624435SJonathan Corbet 456e4624435SJonathan Corbet Optional, not currently supported, and may need changes to fully 457e4624435SJonathan Corbet interoperate with arm64. 458e4624435SJonathan Corbet 459e4624435SJonathan CorbetUEFI Signature Reserved (signature == "UEFI") 460e4624435SJonathan Corbet 461e4624435SJonathan Corbet **UEFI ACPI data table** 462e4624435SJonathan Corbet 463e4624435SJonathan Corbet Optional, not currently supported. No known use case for arm64, 464e4624435SJonathan Corbet at present. 465e4624435SJonathan Corbet 466e4624435SJonathan CorbetWAET Signature Reserved (signature == "WAET") 467e4624435SJonathan Corbet 468e4624435SJonathan Corbet **Windows ACPI Emulated devices Table** 469e4624435SJonathan Corbet 470e4624435SJonathan Corbet Microsoft only table, will not be supported. 471e4624435SJonathan Corbet 472e4624435SJonathan CorbetWDAT Signature Reserved (signature == "WDAT") 473e4624435SJonathan Corbet 474e4624435SJonathan Corbet **Watch Dog Action Table** 475e4624435SJonathan Corbet 476e4624435SJonathan Corbet Microsoft only table, will not be supported. 477e4624435SJonathan Corbet 478e4624435SJonathan CorbetWDRT Signature Reserved (signature == "WDRT") 479e4624435SJonathan Corbet 480e4624435SJonathan Corbet **Watch Dog Resource Table** 481e4624435SJonathan Corbet 482e4624435SJonathan Corbet Microsoft only table, will not be supported. 483e4624435SJonathan Corbet 484e4624435SJonathan CorbetWPBT Signature Reserved (signature == "WPBT") 485e4624435SJonathan Corbet 486e4624435SJonathan Corbet **Windows Platform Binary Table** 487e4624435SJonathan Corbet 488e4624435SJonathan Corbet Microsoft only table, will not be supported. 489e4624435SJonathan Corbet 490e4624435SJonathan CorbetXENV Signature Reserved (signature == "XENV") 491e4624435SJonathan Corbet 492e4624435SJonathan Corbet **Xen project table** 493e4624435SJonathan Corbet 494e4624435SJonathan Corbet Optional, used only by Xen at present. 495e4624435SJonathan Corbet 496e4624435SJonathan CorbetXSDT Section 5.2.8 (signature == "XSDT") 497e4624435SJonathan Corbet 498e4624435SJonathan Corbet **eXtended System Description Table** 499e4624435SJonathan Corbet 500e4624435SJonathan Corbet Required for arm64. 501e4624435SJonathan Corbet====== ======================================================================== 502e4624435SJonathan Corbet 503e4624435SJonathan CorbetACPI Objects 504e4624435SJonathan Corbet------------ 505e4624435SJonathan CorbetThe expectations on individual ACPI objects that are likely to be used are 506e4624435SJonathan Corbetshown in the list that follows; any object not explicitly mentioned below 507e4624435SJonathan Corbetshould be used as needed for a particular platform or particular subsystem, 508e4624435SJonathan Corbetsuch as power management or PCI. 509e4624435SJonathan Corbet 510e4624435SJonathan Corbet===== ================ ======================================================== 511e4624435SJonathan CorbetName Section Usage for ARMv8 Linux 512e4624435SJonathan Corbet===== ================ ======================================================== 513e4624435SJonathan Corbet_CCA 6.2.17 This method must be defined for all bus masters 514e4624435SJonathan Corbet on arm64 - there are no assumptions made about 515e4624435SJonathan Corbet whether such devices are cache coherent or not. 516e4624435SJonathan Corbet The _CCA value is inherited by all descendants of 517e4624435SJonathan Corbet these devices so it does not need to be repeated. 518e4624435SJonathan Corbet Without _CCA on arm64, the kernel does not know what 519e4624435SJonathan Corbet to do about setting up DMA for the device. 520e4624435SJonathan Corbet 521e4624435SJonathan Corbet NB: this method provides default cache coherency 522e4624435SJonathan Corbet attributes; the presence of an SMMU can be used to 523e4624435SJonathan Corbet modify that, however. For example, a master could 524e4624435SJonathan Corbet default to non-coherent, but be made coherent with 525e4624435SJonathan Corbet the appropriate SMMU configuration (see Table 17 of 526e4624435SJonathan Corbet the IORT specification, ARM Document DEN 0049B). 527e4624435SJonathan Corbet 528e4624435SJonathan Corbet_CID 6.1.2 Use as needed, see also _HID. 529e4624435SJonathan Corbet 530e4624435SJonathan Corbet_CLS 6.1.3 Use as needed, see also _HID. 531e4624435SJonathan Corbet 532e4624435SJonathan Corbet_CPC 8.4.7.1 Use as needed, power management specific. CPPC is 533e4624435SJonathan Corbet recommended on arm64. 534e4624435SJonathan Corbet 535e4624435SJonathan Corbet_CRS 6.2.2 Required on arm64. 536e4624435SJonathan Corbet 537e4624435SJonathan Corbet_CSD 8.4.2.2 Use as needed, used only in conjunction with _CST. 538e4624435SJonathan Corbet 539e4624435SJonathan Corbet_CST 8.4.2.1 Low power idle states (8.4.4) are recommended instead 540e4624435SJonathan Corbet of C-states. 541e4624435SJonathan Corbet 542e4624435SJonathan Corbet_DDN 6.1.4 This field can be used for a device name. However, 543e4624435SJonathan Corbet it is meant for DOS device names (e.g., COM1), so be 544e4624435SJonathan Corbet careful of its use across OSes. 545e4624435SJonathan Corbet 546e4624435SJonathan Corbet_DSD 6.2.5 To be used with caution. If this object is used, try 547e4624435SJonathan Corbet to use it within the constraints already defined by the 548e4624435SJonathan Corbet Device Properties UUID. Only in rare circumstances 549e4624435SJonathan Corbet should it be necessary to create a new _DSD UUID. 550e4624435SJonathan Corbet 551e4624435SJonathan Corbet In either case, submit the _DSD definition along with 552e4624435SJonathan Corbet any driver patches for discussion, especially when 553e4624435SJonathan Corbet device properties are used. A driver will not be 554e4624435SJonathan Corbet considered complete without a corresponding _DSD 555e4624435SJonathan Corbet description. Once approved by kernel maintainers, 556e4624435SJonathan Corbet the UUID or device properties must then be registered 557e4624435SJonathan Corbet with the UEFI Forum; this may cause some iteration as 558e4624435SJonathan Corbet more than one OS will be registering entries. 559e4624435SJonathan Corbet 560e4624435SJonathan Corbet_DSM 9.1.1 Do not use this method. It is not standardized, the 561e4624435SJonathan Corbet return values are not well documented, and it is 562e4624435SJonathan Corbet currently a frequent source of error. 563e4624435SJonathan Corbet 564e4624435SJonathan Corbet\_GL 5.7.1 This object is not to be used in hardware reduced 565e4624435SJonathan Corbet mode, and therefore should not be used on arm64. 566e4624435SJonathan Corbet 567e4624435SJonathan Corbet_GLK 6.5.7 This object requires a global lock be defined; there 568e4624435SJonathan Corbet is no global lock on arm64 since it runs in hardware 569e4624435SJonathan Corbet reduced mode. Hence, do not use this object on arm64. 570e4624435SJonathan Corbet 571e4624435SJonathan Corbet\_GPE 5.3.1 This namespace is for x86 use only. Do not use it 572e4624435SJonathan Corbet on arm64. 573e4624435SJonathan Corbet 574e4624435SJonathan Corbet_HID 6.1.5 This is the primary object to use in device probing, 575e4624435SJonathan Corbet though _CID and _CLS may also be used. 576e4624435SJonathan Corbet 577e4624435SJonathan Corbet_INI 6.5.1 Not required, but can be useful in setting up devices 578e4624435SJonathan Corbet when UEFI leaves them in a state that may not be what 579e4624435SJonathan Corbet the driver expects before it starts probing. 580e4624435SJonathan Corbet 581e4624435SJonathan Corbet_LPI 8.4.4.3 Recommended for use with processor definitions (_HID 582e4624435SJonathan Corbet ACPI0010) on arm64. See also _RDI. 583e4624435SJonathan Corbet 584e4624435SJonathan Corbet_MLS 6.1.7 Highly recommended for use in internationalization. 585e4624435SJonathan Corbet 586e4624435SJonathan Corbet_OFF 7.2.2 It is recommended to define this method for any device 587e4624435SJonathan Corbet that can be turned on or off. 588e4624435SJonathan Corbet 589e4624435SJonathan Corbet_ON 7.2.3 It is recommended to define this method for any device 590e4624435SJonathan Corbet that can be turned on or off. 591e4624435SJonathan Corbet 592e4624435SJonathan Corbet\_OS 5.7.3 This method will return "Linux" by default (this is 593e4624435SJonathan Corbet the value of the macro ACPI_OS_NAME on Linux). The 594e4624435SJonathan Corbet command line parameter acpi_os=<string> can be used 595e4624435SJonathan Corbet to set it to some other value. 596e4624435SJonathan Corbet 597e4624435SJonathan Corbet_OSC 6.2.11 This method can be a global method in ACPI (i.e., 598e4624435SJonathan Corbet \_SB._OSC), or it may be associated with a specific 599e4624435SJonathan Corbet device (e.g., \_SB.DEV0._OSC), or both. When used 600e4624435SJonathan Corbet as a global method, only capabilities published in 601e4624435SJonathan Corbet the ACPI specification are allowed. When used as 602e4624435SJonathan Corbet a device-specific method, the process described for 603e4624435SJonathan Corbet using _DSD MUST be used to create an _OSC definition; 604e4624435SJonathan Corbet out-of-process use of _OSC is not allowed. That is, 605e4624435SJonathan Corbet submit the device-specific _OSC usage description as 606e4624435SJonathan Corbet part of the kernel driver submission, get it approved 607e4624435SJonathan Corbet by the kernel community, then register it with the 608e4624435SJonathan Corbet UEFI Forum. 609e4624435SJonathan Corbet 610e4624435SJonathan Corbet\_OSI 5.7.2 Deprecated on ARM64. As far as ACPI firmware is 611e4624435SJonathan Corbet concerned, _OSI is not to be used to determine what 612e4624435SJonathan Corbet sort of system is being used or what functionality 613e4624435SJonathan Corbet is provided. The _OSC method is to be used instead. 614e4624435SJonathan Corbet 615e4624435SJonathan Corbet_PDC 8.4.1 Deprecated, do not use on arm64. 616e4624435SJonathan Corbet 617e4624435SJonathan Corbet\_PIC 5.8.1 The method should not be used. On arm64, the only 618e4624435SJonathan Corbet interrupt model available is GIC. 619e4624435SJonathan Corbet 620e4624435SJonathan Corbet\_PR 5.3.1 This namespace is for x86 use only on legacy systems. 621e4624435SJonathan Corbet Do not use it on arm64. 622e4624435SJonathan Corbet 623e4624435SJonathan Corbet_PRT 6.2.13 Required as part of the definition of all PCI root 624e4624435SJonathan Corbet devices. 625e4624435SJonathan Corbet 626e4624435SJonathan Corbet_PRx 7.3.8-11 Use as needed; power management specific. If _PR0 is 627e4624435SJonathan Corbet defined, _PR3 must also be defined. 628e4624435SJonathan Corbet 629e4624435SJonathan Corbet_PSx 7.3.2-5 Use as needed; power management specific. If _PS0 is 630e4624435SJonathan Corbet defined, _PS3 must also be defined. If clocks or 631e4624435SJonathan Corbet regulators need adjusting to be consistent with power 632e4624435SJonathan Corbet usage, change them in these methods. 633e4624435SJonathan Corbet 634e4624435SJonathan Corbet_RDI 8.4.4.4 Recommended for use with processor definitions (_HID 635e4624435SJonathan Corbet ACPI0010) on arm64. This should only be used in 636e4624435SJonathan Corbet conjunction with _LPI. 637e4624435SJonathan Corbet 638e4624435SJonathan Corbet\_REV 5.7.4 Always returns the latest version of ACPI supported. 639e4624435SJonathan Corbet 640e4624435SJonathan Corbet\_SB 5.3.1 Required on arm64; all devices must be defined in this 641e4624435SJonathan Corbet namespace. 642e4624435SJonathan Corbet 643e4624435SJonathan Corbet_SLI 6.2.15 Use is recommended when SLIT table is in use. 644e4624435SJonathan Corbet 645e4624435SJonathan Corbet_STA 6.3.7, It is recommended to define this method for any device 646e4624435SJonathan Corbet 7.2.4 that can be turned on or off. See also the STAO table 647e4624435SJonathan Corbet that provides overrides to hide devices in virtualized 648e4624435SJonathan Corbet environments. 649e4624435SJonathan Corbet 650e4624435SJonathan Corbet_SRS 6.2.16 Use as needed; see also _PRS. 651e4624435SJonathan Corbet 652e4624435SJonathan Corbet_STR 6.1.10 Recommended for conveying device names to end users; 653e4624435SJonathan Corbet this is preferred over using _DDN. 654e4624435SJonathan Corbet 655e4624435SJonathan Corbet_SUB 6.1.9 Use as needed; _HID or _CID are preferred. 656e4624435SJonathan Corbet 657e4624435SJonathan Corbet_SUN 6.1.11 Use as needed, but recommended. 658e4624435SJonathan Corbet 659e4624435SJonathan Corbet_SWS 7.4.3 Use as needed; power management specific; this may 660e4624435SJonathan Corbet require specification changes for use on arm64. 661e4624435SJonathan Corbet 662e4624435SJonathan Corbet_UID 6.1.12 Recommended for distinguishing devices of the same 663e4624435SJonathan Corbet class; define it if at all possible. 664e4624435SJonathan Corbet===== ================ ======================================================== 665e4624435SJonathan Corbet 666e4624435SJonathan Corbet 667e4624435SJonathan Corbet 668e4624435SJonathan Corbet 669e4624435SJonathan CorbetACPI Event Model 670e4624435SJonathan Corbet---------------- 671e4624435SJonathan CorbetDo not use GPE block devices; these are not supported in the hardware reduced 672e4624435SJonathan Corbetprofile used by arm64. Since there are no GPE blocks defined for use on ARM 673e4624435SJonathan Corbetplatforms, ACPI events must be signaled differently. 674e4624435SJonathan Corbet 675e4624435SJonathan CorbetThere are two options: GPIO-signaled interrupts (Section 5.6.5), and 676e4624435SJonathan Corbetinterrupt-signaled events (Section 5.6.9). Interrupt-signaled events are a 677e4624435SJonathan Corbetnew feature in the ACPI 6.1 specification. Either - or both - can be used 678e4624435SJonathan Corbeton a given platform, and which to use may be dependent of limitations in any 679e4624435SJonathan Corbetgiven SoC. If possible, interrupt-signaled events are recommended. 680e4624435SJonathan Corbet 681e4624435SJonathan Corbet 682e4624435SJonathan CorbetACPI Processor Control 683e4624435SJonathan Corbet---------------------- 684e4624435SJonathan CorbetSection 8 of the ACPI specification changed significantly in version 6.0. 685e4624435SJonathan CorbetProcessors should now be defined as Device objects with _HID ACPI0007; do 686e4624435SJonathan Corbetnot use the deprecated Processor statement in ASL. All multiprocessor systems 687e4624435SJonathan Corbetshould also define a hierarchy of processors, done with Processor Container 688e4624435SJonathan CorbetDevices (see Section 8.4.3.1, _HID ACPI0010); do not use processor aggregator 689e4624435SJonathan Corbetdevices (Section 8.5) to describe processor topology. Section 8.4 of the 690e4624435SJonathan Corbetspecification describes the semantics of these object definitions and how 691e4624435SJonathan Corbetthey interrelate. 692e4624435SJonathan Corbet 693e4624435SJonathan CorbetMost importantly, the processor hierarchy defined also defines the low power 694e4624435SJonathan Corbetidle states that are available to the platform, along with the rules for 695e4624435SJonathan Corbetdetermining which processors can be turned on or off and the circumstances 696e4624435SJonathan Corbetthat control that. Without this information, the processors will run in 697e4624435SJonathan Corbetwhatever power state they were left in by UEFI. 698e4624435SJonathan Corbet 699e4624435SJonathan CorbetNote too, that the processor Device objects defined and the entries in the 700e4624435SJonathan CorbetMADT for GICs are expected to be in synchronization. The _UID of the Device 701e4624435SJonathan Corbetobject must correspond to processor IDs used in the MADT. 702e4624435SJonathan Corbet 703e4624435SJonathan CorbetIt is recommended that CPPC (8.4.5) be used as the primary model for processor 704e4624435SJonathan Corbetperformance control on arm64. C-states and P-states may become available at 705e4624435SJonathan Corbetsome point in the future, but most current design work appears to favor CPPC. 706e4624435SJonathan Corbet 707e4624435SJonathan CorbetFurther, it is essential that the ARMv8 SoC provide a fully functional 708e4624435SJonathan Corbetimplementation of PSCI; this will be the only mechanism supported by ACPI 709e4624435SJonathan Corbetto control CPU power state. Booting of secondary CPUs using the ACPI 710e4624435SJonathan Corbetparking protocol is possible, but discouraged, since only PSCI is supported 711e4624435SJonathan Corbetfor ARM servers. 712e4624435SJonathan Corbet 713e4624435SJonathan Corbet 714e4624435SJonathan CorbetACPI System Address Map Interfaces 715e4624435SJonathan Corbet---------------------------------- 716e4624435SJonathan CorbetIn Section 15 of the ACPI specification, several methods are mentioned as 717e4624435SJonathan Corbetpossible mechanisms for conveying memory resource information to the kernel. 718e4624435SJonathan CorbetFor arm64, we will only support UEFI for booting with ACPI, hence the UEFI 719e4624435SJonathan CorbetGetMemoryMap() boot service is the only mechanism that will be used. 720e4624435SJonathan Corbet 721e4624435SJonathan Corbet 722e4624435SJonathan CorbetACPI Platform Error Interfaces (APEI) 723e4624435SJonathan Corbet------------------------------------- 724e4624435SJonathan CorbetThe APEI tables supported are described above. 725e4624435SJonathan Corbet 726e4624435SJonathan CorbetAPEI requires the equivalent of an SCI and an NMI on ARMv8. The SCI is used 727e4624435SJonathan Corbetto notify the OSPM of errors that have occurred but can be corrected and the 728e4624435SJonathan Corbetsystem can continue correct operation, even if possibly degraded. The NMI is 729e4624435SJonathan Corbetused to indicate fatal errors that cannot be corrected, and require immediate 730e4624435SJonathan Corbetattention. 731e4624435SJonathan Corbet 732e4624435SJonathan CorbetSince there is no direct equivalent of the x86 SCI or NMI, arm64 handles 733e4624435SJonathan Corbetthese slightly differently. The SCI is handled as a high priority interrupt; 734e4624435SJonathan Corbetgiven that these are corrected (or correctable) errors being reported, this 735e4624435SJonathan Corbetis sufficient. The NMI is emulated as the highest priority interrupt 736e4624435SJonathan Corbetpossible. This implies some caution must be used since there could be 737e4624435SJonathan Corbetinterrupts at higher privilege levels or even interrupts at the same priority 738e4624435SJonathan Corbetas the emulated NMI. In Linux, this should not be the case but one should 739e4624435SJonathan Corbetbe aware it could happen. 740e4624435SJonathan Corbet 741e4624435SJonathan Corbet 742e4624435SJonathan CorbetACPI Objects Not Supported on ARM64 743e4624435SJonathan Corbet----------------------------------- 744e4624435SJonathan CorbetWhile this may change in the future, there are several classes of objects 745e4624435SJonathan Corbetthat can be defined, but are not currently of general interest to ARM servers. 746e4624435SJonathan CorbetSome of these objects have x86 equivalents, and may actually make sense in ARM 747e4624435SJonathan Corbetservers. However, there is either no hardware available at present, or there 748e4624435SJonathan Corbetmay not even be a non-ARM implementation yet. Hence, they are not currently 749e4624435SJonathan Corbetsupported. 750e4624435SJonathan Corbet 751e4624435SJonathan CorbetThe following classes of objects are not supported: 752e4624435SJonathan Corbet 753e4624435SJonathan Corbet - Section 9.2: ambient light sensor devices 754e4624435SJonathan Corbet 755e4624435SJonathan Corbet - Section 9.3: battery devices 756e4624435SJonathan Corbet 757e4624435SJonathan Corbet - Section 9.4: lids (e.g., laptop lids) 758e4624435SJonathan Corbet 759e4624435SJonathan Corbet - Section 9.8.2: IDE controllers 760e4624435SJonathan Corbet 761e4624435SJonathan Corbet - Section 9.9: floppy controllers 762e4624435SJonathan Corbet 763e4624435SJonathan Corbet - Section 9.10: GPE block devices 764e4624435SJonathan Corbet 765e4624435SJonathan Corbet - Section 9.15: PC/AT RTC/CMOS devices 766e4624435SJonathan Corbet 767e4624435SJonathan Corbet - Section 9.16: user presence detection devices 768e4624435SJonathan Corbet 769e4624435SJonathan Corbet - Section 9.17: I/O APIC devices; all GICs must be enumerable via MADT 770e4624435SJonathan Corbet 771e4624435SJonathan Corbet - Section 9.18: time and alarm devices (see 9.15) 772e4624435SJonathan Corbet 773e4624435SJonathan Corbet - Section 10: power source and power meter devices 774e4624435SJonathan Corbet 775e4624435SJonathan Corbet - Section 11: thermal management 776e4624435SJonathan Corbet 777e4624435SJonathan Corbet - Section 12: embedded controllers interface 778e4624435SJonathan Corbet 779e4624435SJonathan Corbet - Section 13: SMBus interfaces 780e4624435SJonathan Corbet 781e4624435SJonathan Corbet 782e4624435SJonathan CorbetThis also means that there is no support for the following objects: 783e4624435SJonathan Corbet 784e4624435SJonathan Corbet==== =========================== ==== ========== 785e4624435SJonathan CorbetName Section Name Section 786e4624435SJonathan Corbet==== =========================== ==== ========== 787e4624435SJonathan Corbet_ALC 9.3.4 _FDM 9.10.3 788e4624435SJonathan Corbet_ALI 9.3.2 _FIX 6.2.7 789e4624435SJonathan Corbet_ALP 9.3.6 _GAI 10.4.5 790e4624435SJonathan Corbet_ALR 9.3.5 _GHL 10.4.7 791e4624435SJonathan Corbet_ALT 9.3.3 _GTM 9.9.2.1.1 792e4624435SJonathan Corbet_BCT 10.2.2.10 _LID 9.5.1 793e4624435SJonathan Corbet_BDN 6.5.3 _PAI 10.4.4 794e4624435SJonathan Corbet_BIF 10.2.2.1 _PCL 10.3.2 795e4624435SJonathan Corbet_BIX 10.2.2.1 _PIF 10.3.3 796e4624435SJonathan Corbet_BLT 9.2.3 _PMC 10.4.1 797e4624435SJonathan Corbet_BMA 10.2.2.4 _PMD 10.4.8 798e4624435SJonathan Corbet_BMC 10.2.2.12 _PMM 10.4.3 799e4624435SJonathan Corbet_BMD 10.2.2.11 _PRL 10.3.4 800e4624435SJonathan Corbet_BMS 10.2.2.5 _PSR 10.3.1 801e4624435SJonathan Corbet_BST 10.2.2.6 _PTP 10.4.2 802e4624435SJonathan Corbet_BTH 10.2.2.7 _SBS 10.1.3 803e4624435SJonathan Corbet_BTM 10.2.2.9 _SHL 10.4.6 804e4624435SJonathan Corbet_BTP 10.2.2.8 _STM 9.9.2.1.1 805e4624435SJonathan Corbet_DCK 6.5.2 _UPD 9.16.1 806e4624435SJonathan Corbet_EC 12.12 _UPP 9.16.2 807e4624435SJonathan Corbet_FDE 9.10.1 _WPC 10.5.2 808e4624435SJonathan Corbet_FDI 9.10.2 _WPP 10.5.3 809e4624435SJonathan Corbet==== =========================== ==== ========== 810