1*e790a4ceSJonathan CorbetTODO LIST 2*e790a4ceSJonathan Corbet========= 3*e790a4ceSJonathan Corbet 4*e790a4ceSJonathan Corbet:: 5*e790a4ceSJonathan Corbet 6*e790a4ceSJonathan Corbet POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - power 7*e790a4ceSJonathan Corbet RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse power 8*e790a4ceSJonathan Corbet POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - polar angle (arctan2) 9*e790a4ceSJonathan Corbet 10*e790a4ceSJonathan Corbet LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base 10 11*e790a4ceSJonathan Corbet LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base e 12*e790a4ceSJonathan Corbet EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - exponent 13*e790a4ceSJonathan Corbet SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine 14*e790a4ceSJonathan Corbet COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosine 15*e790a4ceSJonathan Corbet TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tangent 16*e790a4ceSJonathan Corbet ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcsine 17*e790a4ceSJonathan Corbet ACS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arccosine 18*e790a4ceSJonathan Corbet ATN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arctangent 19*e790a4ceSJonathan Corbet 20*e790a4ceSJonathan CorbetThese are not implemented. They are not currently issued by the compiler, 21*e790a4ceSJonathan Corbetand are handled by routines in libc. These are not implemented by the FPA11 22*e790a4ceSJonathan Corbethardware, but are handled by the floating point support code. They should 23*e790a4ceSJonathan Corbetbe implemented in future versions. 24*e790a4ceSJonathan Corbet 25*e790a4ceSJonathan CorbetThere are a couple of ways to approach the implementation of these. One 26*e790a4ceSJonathan Corbetmethod would be to use accurate table methods for these routines. I have 27*e790a4ceSJonathan Corbeta couple of papers by S. Gal from IBM's research labs in Haifa, Israel that 28*e790a4ceSJonathan Corbetseem to promise extreme accuracy (in the order of 99.8%) and reasonable speed. 29*e790a4ceSJonathan CorbetThese methods are used in GLIBC for some of the transcendental functions. 30*e790a4ceSJonathan Corbet 31*e790a4ceSJonathan CorbetAnother approach, which I know little about is CORDIC. This stands for 32*e790a4ceSJonathan CorbetCoordinate Rotation Digital Computer, and is a method of computing 33*e790a4ceSJonathan Corbettranscendental functions using mostly shifts and adds and a few 34*e790a4ceSJonathan Corbetmultiplications and divisions. The ARM excels at shifts and adds, 35*e790a4ceSJonathan Corbetso such a method could be promising, but requires more research to 36*e790a4ceSJonathan Corbetdetermine if it is feasible. 37*e790a4ceSJonathan Corbet 38*e790a4ceSJonathan CorbetRounding Methods 39*e790a4ceSJonathan Corbet---------------- 40*e790a4ceSJonathan Corbet 41*e790a4ceSJonathan CorbetThe IEEE standard defines 4 rounding modes. Round to nearest is the 42*e790a4ceSJonathan Corbetdefault, but rounding to + or - infinity or round to zero are also allowed. 43*e790a4ceSJonathan CorbetMany architectures allow the rounding mode to be specified by modifying bits 44*e790a4ceSJonathan Corbetin a control register. Not so with the ARM FPA11 architecture. To change 45*e790a4ceSJonathan Corbetthe rounding mode one must specify it with each instruction. 46*e790a4ceSJonathan Corbet 47*e790a4ceSJonathan CorbetThis has made porting some benchmarks difficult. It is possible to 48*e790a4ceSJonathan Corbetintroduce such a capability into the emulator. The FPCR contains 49*e790a4ceSJonathan Corbetbits describing the rounding mode. The emulator could be altered to 50*e790a4ceSJonathan Corbetexamine a flag, which if set forced it to ignore the rounding mode in 51*e790a4ceSJonathan Corbetthe instruction, and use the mode specified in the bits in the FPCR. 52*e790a4ceSJonathan Corbet 53*e790a4ceSJonathan CorbetThis would require a method of getting/setting the flag, and the bits 54*e790a4ceSJonathan Corbetin the FPCR. This requires a kernel call in ArmLinux, as WFC/RFC are 55*e790a4ceSJonathan Corbetsupervisor only instructions. If anyone has any ideas or comments I 56*e790a4ceSJonathan Corbetwould like to hear them. 57*e790a4ceSJonathan Corbet 58*e790a4ceSJonathan CorbetNOTE: 59*e790a4ceSJonathan Corbet pulled out from some docs on ARM floating point, specifically 60*e790a4ceSJonathan Corbet for the Acorn FPE, but not limited to it: 61*e790a4ceSJonathan Corbet 62*e790a4ceSJonathan Corbet The floating point control register (FPCR) may only be present in some 63*e790a4ceSJonathan Corbet implementations: it is there to control the hardware in an implementation- 64*e790a4ceSJonathan Corbet specific manner, for example to disable the floating point system. The user 65*e790a4ceSJonathan Corbet mode of the ARM is not permitted to use this register (since the right is 66*e790a4ceSJonathan Corbet reserved to alter it between implementations) and the WFC and RFC 67*e790a4ceSJonathan Corbet instructions will trap if tried in user mode. 68*e790a4ceSJonathan Corbet 69*e790a4ceSJonathan Corbet Hence, the answer is yes, you could do this, but then you will run a high 70*e790a4ceSJonathan Corbet risk of becoming isolated if and when hardware FP emulation comes out 71*e790a4ceSJonathan Corbet 72*e790a4ceSJonathan Corbet -- Russell. 73