1What:		/sys/bus/platform/devices/dfl-fme.0/ports_num
2Date:		June 2018
3KernelVersion:  4.19
4Contact:	Wu Hao <hao.wu@intel.com>
5Description:	Read-only. One DFL FPGA device may have more than 1
6		port/Accelerator Function Unit (AFU). It returns the
7		number of ports on the FPGA device when read it.
8
9What:		/sys/bus/platform/devices/dfl-fme.0/bitstream_id
10Date:		June 2018
11KernelVersion:  4.19
12Contact:	Wu Hao <hao.wu@intel.com>
13Description:	Read-only. It returns Bitstream (static FPGA region)
14		identifier number, which includes the detailed version
15		and other information of this static FPGA region.
16
17What:		/sys/bus/platform/devices/dfl-fme.0/bitstream_metadata
18Date:		June 2018
19KernelVersion:  4.19
20Contact:	Wu Hao <hao.wu@intel.com>
21Description:	Read-only. It returns Bitstream (static FPGA region) meta
22		data, which includes the synthesis date, seed and other
23		information of this static FPGA region.
24
25What:		/sys/bus/platform/devices/dfl-fme.0/cache_size
26Date:		August 2019
27KernelVersion:  5.4
28Contact:	Wu Hao <hao.wu@intel.com>
29Description:	Read-only. It returns cache size of this FPGA device.
30
31What:		/sys/bus/platform/devices/dfl-fme.0/fabric_version
32Date:		August 2019
33KernelVersion:  5.4
34Contact:	Wu Hao <hao.wu@intel.com>
35Description:	Read-only. It returns fabric version of this FPGA device.
36		Userspace applications need this information to select
37		best data channels per different fabric design.
38
39What:		/sys/bus/platform/devices/dfl-fme.0/socket_id
40Date:		August 2019
41KernelVersion:  5.4
42Contact:	Wu Hao <hao.wu@intel.com>
43Description:	Read-only. It returns socket_id to indicate which socket
44		this FPGA belongs to, only valid for integrated solution.
45		User only needs this information, in case standard numa node
46		can't provide correct information.
47