1What: /sys/bus/platform/devices/dfl-fme.0/ports_num 2Date: June 2018 3KernelVersion: 4.19 4Contact: Wu Hao <hao.wu@intel.com> 5Description: Read-only. One DFL FPGA device may have more than 1 6 port/Accelerator Function Unit (AFU). It returns the 7 number of ports on the FPGA device when read it. 8 9What: /sys/bus/platform/devices/dfl-fme.0/bitstream_id 10Date: June 2018 11KernelVersion: 4.19 12Contact: Wu Hao <hao.wu@intel.com> 13Description: Read-only. It returns Bitstream (static FPGA region) 14 identifier number, which includes the detailed version 15 and other information of this static FPGA region. 16 17What: /sys/bus/platform/devices/dfl-fme.0/bitstream_metadata 18Date: June 2018 19KernelVersion: 4.19 20Contact: Wu Hao <hao.wu@intel.com> 21Description: Read-only. It returns Bitstream (static FPGA region) meta 22 data, which includes the synthesis date, seed and other 23 information of this static FPGA region. 24 25What: /sys/bus/platform/devices/dfl-fme.0/cache_size 26Date: August 2019 27KernelVersion: 5.4 28Contact: Wu Hao <hao.wu@intel.com> 29Description: Read-only. It returns cache size of this FPGA device. 30 31What: /sys/bus/platform/devices/dfl-fme.0/fabric_version 32Date: August 2019 33KernelVersion: 5.4 34Contact: Wu Hao <hao.wu@intel.com> 35Description: Read-only. It returns fabric version of this FPGA device. 36 Userspace applications need this information to select 37 best data channels per different fabric design. 38 39What: /sys/bus/platform/devices/dfl-fme.0/socket_id 40Date: August 2019 41KernelVersion: 5.4 42Contact: Wu Hao <hao.wu@intel.com> 43Description: Read-only. It returns socket_id to indicate which socket 44 this FPGA belongs to, only valid for integrated solution. 45 User only needs this information, in case standard numa node 46 can't provide correct information. 47 48What: /sys/bus/platform/devices/dfl-fme.0/errors/pcie0_errors 49Date: August 2019 50KernelVersion: 5.4 51Contact: Wu Hao <hao.wu@intel.com> 52Description: Read-Write. Read this file for errors detected on pcie0 link. 53 Write this file to clear errors logged in pcie0_errors. Write 54 fails with -EINVAL if input parsing fails or input error code 55 doesn't match. 56 57What: /sys/bus/platform/devices/dfl-fme.0/errors/pcie1_errors 58Date: August 2019 59KernelVersion: 5.4 60Contact: Wu Hao <hao.wu@intel.com> 61Description: Read-Write. Read this file for errors detected on pcie1 link. 62 Write this file to clear errors logged in pcie1_errors. Write 63 fails with -EINVAL if input parsing fails or input error code 64 doesn't match. 65 66What: /sys/bus/platform/devices/dfl-fme.0/errors/nonfatal_errors 67Date: August 2019 68KernelVersion: 5.4 69Contact: Wu Hao <hao.wu@intel.com> 70Description: Read-only. It returns non-fatal errors detected. 71 72What: /sys/bus/platform/devices/dfl-fme.0/errors/catfatal_errors 73Date: August 2019 74KernelVersion: 5.4 75Contact: Wu Hao <hao.wu@intel.com> 76Description: Read-only. It returns catastrophic and fatal errors detected. 77 78What: /sys/bus/platform/devices/dfl-fme.0/errors/inject_errors 79Date: August 2019 80KernelVersion: 5.4 81Contact: Wu Hao <hao.wu@intel.com> 82Description: Read-Write. Read this file to check errors injected. Write this 83 file to inject errors for testing purpose. Write fails with 84 -EINVAL if input parsing fails or input inject error code isn't 85 supported. 86 87What: /sys/bus/platform/devices/dfl-fme.0/errors/fme_errors 88Date: August 2019 89KernelVersion: 5.4 90Contact: Wu Hao <hao.wu@intel.com> 91Description: Read-Write. Read this file to get errors detected on FME. 92 Write this file to clear errors logged in fme_errors. Write 93 fials with -EINVAL if input parsing fails or input error code 94 doesn't match. 95 96What: /sys/bus/platform/devices/dfl-fme.0/errors/first_error 97Date: August 2019 98KernelVersion: 5.4 99Contact: Wu Hao <hao.wu@intel.com> 100Description: Read-only. Read this file to get the first error detected by 101 hardware. 102 103What: /sys/bus/platform/devices/dfl-fme.0/errors/next_error 104Date: August 2019 105KernelVersion: 5.4 106Contact: Wu Hao <hao.wu@intel.com> 107Description: Read-only. Read this file to get the second error detected by 108 hardware. 109 110What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/name 111Date: October 2019 112KernelVersion: 5.5 113Contact: Wu Hao <hao.wu@intel.com> 114Description: Read-Only. Read this file to get the name of hwmon device, it 115 supports values: 116 'dfl_fme_thermal' - thermal hwmon device name 117 'dfl_fme_power' - power hwmon device name 118 119What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_input 120Date: October 2019 121KernelVersion: 5.5 122Contact: Wu Hao <hao.wu@intel.com> 123Description: Read-Only. It returns FPGA device temperature in millidegrees 124 Celsius. 125 126What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max 127Date: October 2019 128KernelVersion: 5.5 129Contact: Wu Hao <hao.wu@intel.com> 130Description: Read-Only. It returns hardware threshold1 temperature in 131 millidegrees Celsius. If temperature rises at or above this 132 threshold, hardware starts 50% or 90% throttling (see 133 'temp1_max_policy'). 134 135What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit 136Date: October 2019 137KernelVersion: 5.5 138Contact: Wu Hao <hao.wu@intel.com> 139Description: Read-Only. It returns hardware threshold2 temperature in 140 millidegrees Celsius. If temperature rises at or above this 141 threshold, hardware starts 100% throttling. 142 143What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_emergency 144Date: October 2019 145KernelVersion: 5.5 146Contact: Wu Hao <hao.wu@intel.com> 147Description: Read-Only. It returns hardware trip threshold temperature in 148 millidegrees Celsius. If temperature rises at or above this 149 threshold, a fatal event will be triggered to board management 150 controller (BMC) to shutdown FPGA. 151 152What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max_alarm 153Date: October 2019 154KernelVersion: 5.5 155Contact: Wu Hao <hao.wu@intel.com> 156Description: Read-only. It returns 1 if temperature is currently at or above 157 hardware threshold1 (see 'temp1_max'), otherwise 0. 158 159What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_crit_alarm 160Date: October 2019 161KernelVersion: 5.5 162Contact: Wu Hao <hao.wu@intel.com> 163Description: Read-only. It returns 1 if temperature is currently at or above 164 hardware threshold2 (see 'temp1_crit'), otherwise 0. 165 166What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/temp1_max_policy 167Date: October 2019 168KernelVersion: 5.5 169Contact: Wu Hao <hao.wu@intel.com> 170Description: Read-Only. Read this file to get the policy of hardware threshold1 171 (see 'temp1_max'). It only supports two values (policies): 172 0 - AP2 state (90% throttling) 173 1 - AP1 state (50% throttling) 174 175What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_input 176Date: October 2019 177KernelVersion: 5.5 178Contact: Wu Hao <hao.wu@intel.com> 179Description: Read-Only. It returns current FPGA power consumption in uW. 180 181What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_max 182Date: October 2019 183KernelVersion: 5.5 184Contact: Wu Hao <hao.wu@intel.com> 185Description: Read-Write. Read this file to get current hardware power 186 threshold1 in uW. If power consumption rises at or above 187 this threshold, hardware starts 50% throttling. 188 Write this file to set current hardware power threshold1 in uW. 189 As hardware only accepts values in Watts, so input value will 190 be round down per Watts (< 1 watts part will be discarded) and 191 clamped within the range from 0 to 127 Watts. Write fails with 192 -EINVAL if input parsing fails. 193 194What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_crit 195Date: October 2019 196KernelVersion: 5.5 197Contact: Wu Hao <hao.wu@intel.com> 198Description: Read-Write. Read this file to get current hardware power 199 threshold2 in uW. If power consumption rises at or above 200 this threshold, hardware starts 90% throttling. 201 Write this file to set current hardware power threshold2 in uW. 202 As hardware only accepts values in Watts, so input value will 203 be round down per Watts (< 1 watts part will be discarded) and 204 clamped within the range from 0 to 127 Watts. Write fails with 205 -EINVAL if input parsing fails. 206 207What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_max_alarm 208Date: October 2019 209KernelVersion: 5.5 210Contact: Wu Hao <hao.wu@intel.com> 211Description: Read-only. It returns 1 if power consumption is currently at or 212 above hardware threshold1 (see 'power1_max'), otherwise 0. 213 214What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_crit_alarm 215Date: October 2019 216KernelVersion: 5.5 217Contact: Wu Hao <hao.wu@intel.com> 218Description: Read-only. It returns 1 if power consumption is currently at or 219 above hardware threshold2 (see 'power1_crit'), otherwise 0. 220 221What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_xeon_limit 222Date: October 2019 223KernelVersion: 5.5 224Contact: Wu Hao <hao.wu@intel.com> 225Description: Read-Only. It returns power limit for XEON in uW. 226 227What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_fpga_limit 228Date: October 2019 229KernelVersion: 5.5 230Contact: Wu Hao <hao.wu@intel.com> 231Description: Read-Only. It returns power limit for FPGA in uW. 232 233What: /sys/bus/platform/devices/dfl-fme.0/hwmon/hwmonX/power1_ltr 234Date: October 2019 235KernelVersion: 5.5 236Contact: Wu Hao <hao.wu@intel.com> 237Description: Read-only. Read this file to get current Latency Tolerance 238 Reporting (ltr) value. It returns 1 if all Accelerated 239 Function Units (AFUs) can tolerate latency >= 40us for memory 240 access or 0 if any AFU is latency sensitive (< 40us). 241