1*e3a1b924SFlorian FainelliWhat:		/sys/bus/platform/devices/*/srpd
2*e3a1b924SFlorian FainelliDate:		July 2022
3*e3a1b924SFlorian FainelliKernelVersion:	5.21
4*e3a1b924SFlorian FainelliContact:	Florian Fainelli <f.fainelli@gmail.com>
5*e3a1b924SFlorian FainelliDescription:
6*e3a1b924SFlorian Fainelli		Self Refresh Power Down (SRPD) inactivity timeout counted in
7*e3a1b924SFlorian Fainelli		internal DDR controller clock cycles. Possible values range
8*e3a1b924SFlorian Fainelli		from 0 (disable inactivity timeout) to 65535 (0xffff).
9*e3a1b924SFlorian Fainelli
10*e3a1b924SFlorian FainelliWhat:		/sys/bus/platform/devices/*/frequency
11*e3a1b924SFlorian FainelliDate:		July 2022
12*e3a1b924SFlorian FainelliKernelVersion:	5.21
13*e3a1b924SFlorian FainelliContact:	Florian Fainelli <f.fainelli@gmail.com>
14*e3a1b924SFlorian FainelliDescription:
15*e3a1b924SFlorian Fainelli		DDR PHY frequency in Hz.
16