1What:           /sys/class/habanalabs/hl<n>/armcp_kernel_ver
2Date:           Jan 2019
3KernelVersion:  5.1
4Contact:        oded.gabbay@gmail.com
5Description:    Version of the Linux kernel running on the device's CPU
6
7What:           /sys/class/habanalabs/hl<n>/armcp_ver
8Date:           Jan 2019
9KernelVersion:  5.1
10Contact:        oded.gabbay@gmail.com
11Description:    Version of the application running on the device's CPU
12
13What:           /sys/class/habanalabs/hl<n>/cpld_ver
14Date:           Jan 2019
15KernelVersion:  5.1
16Contact:        oded.gabbay@gmail.com
17Description:    Version of the Device's CPLD F/W
18
19What:           /sys/class/habanalabs/hl<n>/device_type
20Date:           Jan 2019
21KernelVersion:  5.1
22Contact:        oded.gabbay@gmail.com
23Description:    Displays the code name of the device according to its type.
24                The supported values are: "GOYA"
25
26What:           /sys/class/habanalabs/hl<n>/eeprom
27Date:           Jan 2019
28KernelVersion:  5.1
29Contact:        oded.gabbay@gmail.com
30Description:    A binary file attribute that contains the contents of the
31                on-board EEPROM
32
33What:           /sys/class/habanalabs/hl<n>/fuse_ver
34Date:           Jan 2019
35KernelVersion:  5.1
36Contact:        oded.gabbay@gmail.com
37Description:    Displays the device's version from the eFuse
38
39What:           /sys/class/habanalabs/hl<n>/hard_reset
40Date:           Jan 2019
41KernelVersion:  5.1
42Contact:        oded.gabbay@gmail.com
43Description:    Interface to trigger a hard-reset operation for the device.
44                Hard-reset will reset ALL internal components of the device
45                except for the PCI interface and the internal PLLs
46
47What:           /sys/class/habanalabs/hl<n>/hard_reset_cnt
48Date:           Jan 2019
49KernelVersion:  5.1
50Contact:        oded.gabbay@gmail.com
51Description:    Displays how many times the device have undergone a hard-reset
52                operation since the driver was loaded
53
54What:           /sys/class/habanalabs/hl<n>/high_pll
55Date:           Jan 2019
56KernelVersion:  5.1
57Contact:        oded.gabbay@gmail.com
58Description:    Allows the user to set the maximum clock frequency for MME, TPC
59                and IC when the power management profile is set to "automatic".
60
61What:           /sys/class/habanalabs/hl<n>/ic_clk
62Date:           Jan 2019
63KernelVersion:  5.1
64Contact:        oded.gabbay@gmail.com
65Description:    Allows the user to set the maximum clock frequency, in Hz, of
66                the Interconnect fabric. Writes to this parameter affect the
67                device only when the power management profile is set to "manual"
68                mode. The device IC clock might be set to lower value than the
69                maximum. The user should read the ic_clk_curr to see the actual
70                frequency value of the IC. This property is valid only for the
71                Goya ASIC family
72
73What:           /sys/class/habanalabs/hl<n>/ic_clk_curr
74Date:           Jan 2019
75KernelVersion:  5.1
76Contact:        oded.gabbay@gmail.com
77Description:    Displays the current clock frequency, in Hz, of the Interconnect
78                fabric. This property is valid only for the Goya ASIC family
79
80What:           /sys/class/habanalabs/hl<n>/infineon_ver
81Date:           Jan 2019
82KernelVersion:  5.1
83Contact:        oded.gabbay@gmail.com
84Description:    Version of the Device's power supply F/W code
85
86What:           /sys/class/habanalabs/hl<n>/max_power
87Date:           Jan 2019
88KernelVersion:  5.1
89Contact:        oded.gabbay@gmail.com
90Description:    Allows the user to set the maximum power consumption of the
91                device in milliwatts.
92
93What:           /sys/class/habanalabs/hl<n>/mme_clk
94Date:           Jan 2019
95KernelVersion:  5.1
96Contact:        oded.gabbay@gmail.com
97Description:    Allows the user to set the maximum clock frequency, in Hz, of
98                the MME compute engine. Writes to this parameter affect the
99                device only when the power management profile is set to "manual"
100                mode. The device MME clock might be set to lower value than the
101                maximum. The user should read the mme_clk_curr to see the actual
102                frequency value of the MME. This property is valid only for the
103                Goya ASIC family
104
105What:           /sys/class/habanalabs/hl<n>/mme_clk_curr
106Date:           Jan 2019
107KernelVersion:  5.1
108Contact:        oded.gabbay@gmail.com
109Description:    Displays the current clock frequency, in Hz, of the MME compute
110                engine. This property is valid only for the Goya ASIC family
111
112What:           /sys/class/habanalabs/hl<n>/pci_addr
113Date:           Jan 2019
114KernelVersion:  5.1
115Contact:        oded.gabbay@gmail.com
116Description:    Displays the PCI address of the device. This is needed so the
117                user would be able to open a device based on its PCI address
118
119What:           /sys/class/habanalabs/hl<n>/pm_mng_profile
120Date:           Jan 2019
121KernelVersion:  5.1
122Contact:        oded.gabbay@gmail.com
123Description:    Power management profile. Values are "auto", "manual". In "auto"
124                mode, the driver will set the maximum clock frequency to a high
125                value when a user-space process opens the device's file (unless
126                it was already opened by another process). The driver will set
127                the max clock frequency to a low value when there are no user
128                processes that are opened on the device's file. In "manual"
129                mode, the user sets the maximum clock frequency by writing to
130                ic_clk, mme_clk and tpc_clk
131
132
133What:           /sys/class/habanalabs/hl<n>/preboot_btl_ver
134Date:           Jan 2019
135KernelVersion:  5.1
136Contact:        oded.gabbay@gmail.com
137Description:    Version of the device's preboot F/W code
138
139What:           /sys/class/habanalabs/hl<n>/soft_reset
140Date:           Jan 2019
141KernelVersion:  5.1
142Contact:        oded.gabbay@gmail.com
143Description:    Interface to trigger a soft-reset operation for the device.
144                Soft-reset will reset only the compute and DMA engines of the
145                device
146
147What:           /sys/class/habanalabs/hl<n>/soft_reset_cnt
148Date:           Jan 2019
149KernelVersion:  5.1
150Contact:        oded.gabbay@gmail.com
151Description:    Displays how many times the device have undergone a soft-reset
152                operation since the driver was loaded
153
154What:           /sys/class/habanalabs/hl<n>/status
155Date:           Jan 2019
156KernelVersion:  5.1
157Contact:        oded.gabbay@gmail.com
158Description:    Status of the card: "Operational", "Malfunction", "In reset".
159
160What:           /sys/class/habanalabs/hl<n>/thermal_ver
161Date:           Jan 2019
162KernelVersion:  5.1
163Contact:        oded.gabbay@gmail.com
164Description:    Version of the Device's thermal daemon
165
166What:           /sys/class/habanalabs/hl<n>/tpc_clk
167Date:           Jan 2019
168KernelVersion:  5.1
169Contact:        oded.gabbay@gmail.com
170Description:    Allows the user to set the maximum clock frequency, in Hz, of
171                the TPC compute engines. Writes to this parameter affect the
172                device only when the power management profile is set to "manual"
173                mode. The device TPC clock might be set to lower value than the
174                maximum. The user should read the tpc_clk_curr to see the actual
175                frequency value of the TPC. This property is valid only for
176                Goya ASIC family
177
178What:           /sys/class/habanalabs/hl<n>/tpc_clk_curr
179Date:           Jan 2019
180KernelVersion:  5.1
181Contact:        oded.gabbay@gmail.com
182Description:    Displays the current clock frequency, in Hz, of the TPC compute
183                engines. This property is valid only for the Goya ASIC family
184
185What:           /sys/class/habanalabs/hl<n>/uboot_ver
186Date:           Jan 2019
187KernelVersion:  5.1
188Contact:        oded.gabbay@gmail.com
189Description:    Version of the u-boot running on the device's CPU