1What:           /sys/class/habanalabs/hl<n>/armcp_kernel_ver
2Date:           Jan 2019
3KernelVersion:  5.1
4Contact:        oded.gabbay@gmail.com
5Description:    Version of the Linux kernel running on the device's CPU
6
7What:           /sys/class/habanalabs/hl<n>/armcp_ver
8Date:           Jan 2019
9KernelVersion:  5.1
10Contact:        oded.gabbay@gmail.com
11Description:    Version of the application running on the device's CPU
12
13What:           /sys/class/habanalabs/hl<n>/cpld_ver
14Date:           Jan 2019
15KernelVersion:  5.1
16Contact:        oded.gabbay@gmail.com
17Description:    Version of the Device's CPLD F/W
18
19What:           /sys/class/habanalabs/hl<n>/device_type
20Date:           Jan 2019
21KernelVersion:  5.1
22Contact:        oded.gabbay@gmail.com
23Description:    Displays the code name of the device according to its type.
24                The supported values are: "GOYA"
25
26What:           /sys/class/habanalabs/hl<n>/eeprom
27Date:           Jan 2019
28KernelVersion:  5.1
29Contact:        oded.gabbay@gmail.com
30Description:    A binary file attribute that contains the contents of the
31                on-board EEPROM
32
33What:           /sys/class/habanalabs/hl<n>/fuse_ver
34Date:           Jan 2019
35KernelVersion:  5.1
36Contact:        oded.gabbay@gmail.com
37Description:    Displays the device's version from the eFuse
38
39What:           /sys/class/habanalabs/hl<n>/hard_reset
40Date:           Jan 2019
41KernelVersion:  5.1
42Contact:        oded.gabbay@gmail.com
43Description:    Interface to trigger a hard-reset operation for the device.
44                Hard-reset will reset ALL internal components of the device
45                except for the PCI interface and the internal PLLs
46
47What:           /sys/class/habanalabs/hl<n>/hard_reset_cnt
48Date:           Jan 2019
49KernelVersion:  5.1
50Contact:        oded.gabbay@gmail.com
51Description:    Displays how many times the device have undergone a hard-reset
52                operation since the driver was loaded
53
54What:           /sys/class/habanalabs/hl<n>/high_pll
55Date:           Jan 2019
56KernelVersion:  5.1
57Contact:        oded.gabbay@gmail.com
58Description:    Allows the user to set the maximum clock frequency for MME, TPC
59                and IC when the power management profile is set to "automatic".
60                This property is valid only for the Goya ASIC family
61
62What:           /sys/class/habanalabs/hl<n>/ic_clk
63Date:           Jan 2019
64KernelVersion:  5.1
65Contact:        oded.gabbay@gmail.com
66Description:    Allows the user to set the maximum clock frequency, in Hz, of
67                the Interconnect fabric. Writes to this parameter affect the
68                device only when the power management profile is set to "manual"
69                mode. The device IC clock might be set to lower value than the
70                maximum. The user should read the ic_clk_curr to see the actual
71                frequency value of the IC. This property is valid only for the
72                Goya ASIC family
73
74What:           /sys/class/habanalabs/hl<n>/ic_clk_curr
75Date:           Jan 2019
76KernelVersion:  5.1
77Contact:        oded.gabbay@gmail.com
78Description:    Displays the current clock frequency, in Hz, of the Interconnect
79                fabric. This property is valid only for the Goya ASIC family
80
81What:           /sys/class/habanalabs/hl<n>/infineon_ver
82Date:           Jan 2019
83KernelVersion:  5.1
84Contact:        oded.gabbay@gmail.com
85Description:    Version of the Device's power supply F/W code
86
87What:           /sys/class/habanalabs/hl<n>/max_power
88Date:           Jan 2019
89KernelVersion:  5.1
90Contact:        oded.gabbay@gmail.com
91Description:    Allows the user to set the maximum power consumption of the
92                device in milliwatts.
93
94What:           /sys/class/habanalabs/hl<n>/mme_clk
95Date:           Jan 2019
96KernelVersion:  5.1
97Contact:        oded.gabbay@gmail.com
98Description:    Allows the user to set the maximum clock frequency, in Hz, of
99                the MME compute engine. Writes to this parameter affect the
100                device only when the power management profile is set to "manual"
101                mode. The device MME clock might be set to lower value than the
102                maximum. The user should read the mme_clk_curr to see the actual
103                frequency value of the MME. This property is valid only for the
104                Goya ASIC family
105
106What:           /sys/class/habanalabs/hl<n>/mme_clk_curr
107Date:           Jan 2019
108KernelVersion:  5.1
109Contact:        oded.gabbay@gmail.com
110Description:    Displays the current clock frequency, in Hz, of the MME compute
111                engine. This property is valid only for the Goya ASIC family
112
113What:           /sys/class/habanalabs/hl<n>/pci_addr
114Date:           Jan 2019
115KernelVersion:  5.1
116Contact:        oded.gabbay@gmail.com
117Description:    Displays the PCI address of the device. This is needed so the
118                user would be able to open a device based on its PCI address
119
120What:           /sys/class/habanalabs/hl<n>/pm_mng_profile
121Date:           Jan 2019
122KernelVersion:  5.1
123Contact:        oded.gabbay@gmail.com
124Description:    Power management profile. Values are "auto", "manual". In "auto"
125                mode, the driver will set the maximum clock frequency to a high
126                value when a user-space process opens the device's file (unless
127                it was already opened by another process). The driver will set
128                the max clock frequency to a low value when there are no user
129                processes that are opened on the device's file. In "manual"
130                mode, the user sets the maximum clock frequency by writing to
131                ic_clk, mme_clk and tpc_clk. This property is valid only for
132                the Goya ASIC family
133
134What:           /sys/class/habanalabs/hl<n>/preboot_btl_ver
135Date:           Jan 2019
136KernelVersion:  5.1
137Contact:        oded.gabbay@gmail.com
138Description:    Version of the device's preboot F/W code
139
140What:           /sys/class/habanalabs/hl<n>/soft_reset
141Date:           Jan 2019
142KernelVersion:  5.1
143Contact:        oded.gabbay@gmail.com
144Description:    Interface to trigger a soft-reset operation for the device.
145                Soft-reset will reset only the compute and DMA engines of the
146                device
147
148What:           /sys/class/habanalabs/hl<n>/soft_reset_cnt
149Date:           Jan 2019
150KernelVersion:  5.1
151Contact:        oded.gabbay@gmail.com
152Description:    Displays how many times the device have undergone a soft-reset
153                operation since the driver was loaded
154
155What:           /sys/class/habanalabs/hl<n>/status
156Date:           Jan 2019
157KernelVersion:  5.1
158Contact:        oded.gabbay@gmail.com
159Description:    Status of the card: "Operational", "Malfunction", "In reset".
160
161What:           /sys/class/habanalabs/hl<n>/thermal_ver
162Date:           Jan 2019
163KernelVersion:  5.1
164Contact:        oded.gabbay@gmail.com
165Description:    Version of the Device's thermal daemon
166
167What:           /sys/class/habanalabs/hl<n>/tpc_clk
168Date:           Jan 2019
169KernelVersion:  5.1
170Contact:        oded.gabbay@gmail.com
171Description:    Allows the user to set the maximum clock frequency, in Hz, of
172                the TPC compute engines. Writes to this parameter affect the
173                device only when the power management profile is set to "manual"
174                mode. The device TPC clock might be set to lower value than the
175                maximum. The user should read the tpc_clk_curr to see the actual
176                frequency value of the TPC. This property is valid only for
177                Goya ASIC family
178
179What:           /sys/class/habanalabs/hl<n>/tpc_clk_curr
180Date:           Jan 2019
181KernelVersion:  5.1
182Contact:        oded.gabbay@gmail.com
183Description:    Displays the current clock frequency, in Hz, of the TPC compute
184                engines. This property is valid only for the Goya ASIC family
185
186What:           /sys/class/habanalabs/hl<n>/uboot_ver
187Date:           Jan 2019
188KernelVersion:  5.1
189Contact:        oded.gabbay@gmail.com
190Description:    Version of the u-boot running on the device's CPU