1What:		/sys/bus/i2c/devices/.../bd9571mwv-regulator.*.auto/backup_mode
2Date:		Jul 2018
3KernelVersion:	4.19
4Contact:	Geert Uytterhoeven <geert+renesas@glider.be>
5Description:	Read/write the current state of DDR Backup Mode, which controls
6		if DDR power rails will be kept powered during system suspend.
7		("on"/"1" = enabled, "off"/"0" = disabled).
8		Two types of power switches (or control signals) can be used:
9		  A. With a momentary power switch (or pulse signal), DDR
10		     Backup Mode is enabled by default when available, as the
11		     PMIC will be configured only during system suspend.
12		  B. With a toggle power switch (or level signal), the
13		     following steps must be followed exactly:
14		       1. Configure PMIC for backup mode, to change the role of
15			  the accessory power switch from a power switch to a
16			  wake-up switch,
17		       2. Switch accessory power switch off, to prepare for
18			  system suspend, which is a manual step not controlled
19			  by software,
20		       3. Suspend system,
21		       4. Switch accessory power switch on, to resume the
22			  system.
23		     DDR Backup Mode must be explicitly enabled by the user,
24		     to invoke step 1.
25		See also Documentation/devicetree/bindings/mfd/bd9571mwv.txt.
26Users:		User space applications for embedded boards equipped with a
27		BD9571MWV PMIC.
28