1*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/all_linked
2*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/linked_full_lane
3*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/crc_err_cnt
4*b51022b4SHuisong LiDate:		November 2023
5*b51022b4SHuisong LiKernelVersion:	6.6
6*b51022b4SHuisong LiContact:	Huisong Li <lihuisong@huawei.org>
7*b51022b4SHuisong LiDescription:
8*b51022b4SHuisong Li		The /sys/devices/platform/HISI04Bx:00/chipX/ directory
9*b51022b4SHuisong Li		contains read-only attributes exposing some summarization
10*b51022b4SHuisong Li		information of all HCCS ports under a specified chip.
11*b51022b4SHuisong Li		The X in 'chipX' indicates the Xth chip on platform.
12*b51022b4SHuisong Li
13*b51022b4SHuisong Li		There are following attributes in this directory:
14*b51022b4SHuisong Li
15*b51022b4SHuisong Li		================= ==== =========================================
16*b51022b4SHuisong Li		all_linked:       (RO) if all enabled ports on this chip are
17*b51022b4SHuisong Li				       linked (bool).
18*b51022b4SHuisong Li		linked_full_lane: (RO) if all linked ports on this chip are full
19*b51022b4SHuisong Li				       lane (bool).
20*b51022b4SHuisong Li		crc_err_cnt:      (RO) total CRC err count for all ports on this
21*b51022b4SHuisong Li				       chip.
22*b51022b4SHuisong Li		================= ==== =========================================
23*b51022b4SHuisong Li
24*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/all_linked
25*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/linked_full_lane
26*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/crc_err_cnt
27*b51022b4SHuisong LiDate:		November 2023
28*b51022b4SHuisong LiKernelVersion:	6.6
29*b51022b4SHuisong LiContact:	Huisong Li <lihuisong@huawei.org>
30*b51022b4SHuisong LiDescription:
31*b51022b4SHuisong Li		The /sys/devices/platform/HISI04Bx:00/chipX/dieY/ directory
32*b51022b4SHuisong Li		contains read-only attributes exposing some summarization
33*b51022b4SHuisong Li		information of all HCCS ports under a specified die.
34*b51022b4SHuisong Li		The Y in 'dieY' indicates the hardware id of the die on chip who
35*b51022b4SHuisong Li		has chip id X.
36*b51022b4SHuisong Li
37*b51022b4SHuisong Li		There are following attributes in this directory:
38*b51022b4SHuisong Li
39*b51022b4SHuisong Li		================= ==== =========================================
40*b51022b4SHuisong Li		all_linked:       (RO) if all enabled ports on this die are
41*b51022b4SHuisong Li				       linked (bool).
42*b51022b4SHuisong Li		linked_full_lane: (RO) if all linked ports on this die are full
43*b51022b4SHuisong Li				       lane (bool).
44*b51022b4SHuisong Li		crc_err_cnt:      (RO) total CRC err count for all ports on this
45*b51022b4SHuisong Li				       die.
46*b51022b4SHuisong Li		================= ==== =========================================
47*b51022b4SHuisong Li
48*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/type
49*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mode
50*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/enable
51*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/cur_lane_num
52*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/link_fsm
53*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask
54*b51022b4SHuisong LiWhat:		/sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/crc_err_cnt
55*b51022b4SHuisong LiDate:		November 2023
56*b51022b4SHuisong LiKernelVersion:	6.6
57*b51022b4SHuisong LiContact:	Huisong Li <lihuisong@huawei.org>
58*b51022b4SHuisong LiDescription:
59*b51022b4SHuisong Li		The /sys/devices/platform/HISI04Bx/chipX/dieX/hccsN/ directory
60*b51022b4SHuisong Li		contains read-only attributes exposing information about
61*b51022b4SHuisong Li		a HCCS port. The N value in 'hccsN' indicates this port id.
62*b51022b4SHuisong Li		The X in 'chipX' indicates the ID of the chip to which the
63*b51022b4SHuisong Li		HCCS port belongs. For example, X ranges from to 'n - 1' if the
64*b51022b4SHuisong Li		chip number on platform is n.
65*b51022b4SHuisong Li		The Y in 'dieY' indicates the hardware id of the die to which
66*b51022b4SHuisong Li		the hccs port belongs.
67*b51022b4SHuisong Li		Note: type, lane_mode and enable are fixed attributes on running
68*b51022b4SHuisong Li		platform.
69*b51022b4SHuisong Li
70*b51022b4SHuisong Li		The HCCS port have the following attributes:
71*b51022b4SHuisong Li
72*b51022b4SHuisong Li		============= ==== =============================================
73*b51022b4SHuisong Li		type:         (RO) port type (string), e.g. HCCS-v1 -> H32
74*b51022b4SHuisong Li		lane_mode:    (RO) the lane mode of this port (string), e.g. x8
75*b51022b4SHuisong Li		enable:       (RO) indicate if this port is enabled (bool).
76*b51022b4SHuisong Li		cur_lane_num: (RO) current lane number of this port.
77*b51022b4SHuisong Li		link_fsm:     (RO) link finite state machine of this port.
78*b51022b4SHuisong Li		lane_mask:    (RO) current lane mask of this port, every bit
79*b51022b4SHuisong Li			           indicates a lane.
80*b51022b4SHuisong Li		crc_err_cnt:  (RO) CRC err count on this port.
81*b51022b4SHuisong Li		============= ==== =============================================
82