17a25ec8eSMathieu PoirierWhat: /sys/bus/coresight/devices/<memory_map>.funnel/funnel_ctrl 27a25ec8eSMathieu PoirierDate: November 2014 37a25ec8eSMathieu PoirierKernelVersion: 3.19 47a25ec8eSMathieu PoirierContact: Mathieu Poirier <mathieu.poirier@linaro.org> 57a25ec8eSMathieu PoirierDescription: (RW) Enables the slave ports and defines the hold time of the 67a25ec8eSMathieu Poirier slave ports. 77a25ec8eSMathieu Poirier 87a25ec8eSMathieu PoirierWhat: /sys/bus/coresight/devices/<memory_map>.funnel/priority 97a25ec8eSMathieu PoirierDate: November 2014 107a25ec8eSMathieu PoirierKernelVersion: 3.19 117a25ec8eSMathieu PoirierContact: Mathieu Poirier <mathieu.poirier@linaro.org> 127a25ec8eSMathieu PoirierDescription: (RW) Defines input port priority order. 13