1*19d54020SJack RosenthalWhat:		/sys/bus/coreboot
2*19d54020SJack RosenthalDate:		August 2022
3*19d54020SJack RosenthalContact:	Jack Rosenthal <jrosenth@chromium.org>
4*19d54020SJack RosenthalDescription:
5*19d54020SJack Rosenthal		The coreboot bus provides a variety of virtual devices used to
6*19d54020SJack Rosenthal		access data structures created by the Coreboot BIOS.
7*19d54020SJack Rosenthal
8*19d54020SJack RosenthalWhat:		/sys/bus/coreboot/devices/cbmem-<id>
9*19d54020SJack RosenthalDate:		August 2022
10*19d54020SJack RosenthalContact:	Jack Rosenthal <jrosenth@chromium.org>
11*19d54020SJack RosenthalDescription:
12*19d54020SJack Rosenthal		CBMEM is a downwards-growing memory region created by Coreboot,
13*19d54020SJack Rosenthal		and contains tagged data structures to be shared with payloads
14*19d54020SJack Rosenthal		in the boot process and the OS.  Each CBMEM entry is given a
15*19d54020SJack Rosenthal		directory in /sys/bus/coreboot/devices based on its id.
16*19d54020SJack Rosenthal		A list of ids known to Coreboot can be found in the coreboot
17*19d54020SJack Rosenthal		source tree at
18*19d54020SJack Rosenthal		``src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h``.
19*19d54020SJack Rosenthal
20*19d54020SJack RosenthalWhat:		/sys/bus/coreboot/devices/cbmem-<id>/address
21*19d54020SJack RosenthalDate:		August 2022
22*19d54020SJack RosenthalContact:	Jack Rosenthal <jrosenth@chromium.org>
23*19d54020SJack RosenthalDescription:
24*19d54020SJack Rosenthal		This is the pyhsical memory address that the CBMEM entry's data
25*19d54020SJack Rosenthal		begins at, in hexadecimal (e.g., ``0x76ffe000``).
26*19d54020SJack Rosenthal
27*19d54020SJack RosenthalWhat:		/sys/bus/coreboot/devices/cbmem-<id>/size
28*19d54020SJack RosenthalDate:		August 2022
29*19d54020SJack RosenthalContact:	Jack Rosenthal <jrosenth@chromium.org>
30*19d54020SJack RosenthalDescription:
31*19d54020SJack Rosenthal		This is the size of the CBMEM entry's data, in hexadecimal
32*19d54020SJack Rosenthal		(e.g., ``0x1234``).
33*19d54020SJack Rosenthal
34*19d54020SJack RosenthalWhat:		/sys/bus/coreboot/devices/cbmem-<id>/mem
35*19d54020SJack RosenthalDate:		August 2022
36*19d54020SJack RosenthalContact:	Jack Rosenthal <jrosenth@chromium.org>
37*19d54020SJack RosenthalDescription:
38*19d54020SJack Rosenthal		A file exposing read/write access to the entry's data.  Note
39*19d54020SJack Rosenthal		that this file does not support mmap(), as coreboot
40*19d54020SJack Rosenthal		does not guarantee that the data will be page-aligned.
41*19d54020SJack Rosenthal
42*19d54020SJack Rosenthal		The mode of this file is 0600.  While there shouldn't be
43*19d54020SJack Rosenthal		anything security-sensitive contained in CBMEM, read access
44*19d54020SJack Rosenthal		requires root privileges given this is exposing a small subset
45*19d54020SJack Rosenthal		of physical memory.
46