14dbe3d72SLawrence Tang #ifndef CPER_SECTION_PCIE_H 24dbe3d72SLawrence Tang #define CPER_SECTION_PCIE_H 34dbe3d72SLawrence Tang 44dbe3d72SLawrence Tang #include "json.h" 54dbe3d72SLawrence Tang #include "../edk/Cper.h" 64dbe3d72SLawrence Tang 74dbe3d72SLawrence Tang #define PCIE_ERROR_VALID_BITFIELD_NAMES (const char*[]) {"portTypeValid", "versionValid", "commandStatusValid", \ 84dbe3d72SLawrence Tang "deviceIDValid", "deviceSerialNumberValid", "bridgeControlStatusValid", "capabilityStructureStatusValid", \ 94dbe3d72SLawrence Tang "aerInfoValid"} 104dbe3d72SLawrence Tang #define PCIE_ERROR_PORT_TYPES_KEYS (int []){0, 1, 4, 5, 6, 7, 8, 9, 10} 114dbe3d72SLawrence Tang #define PCIE_ERROR_PORT_TYPES_VALUES (const char*[]){"PCI Express End Point", "Legacy PCI End Point Device", \ 124dbe3d72SLawrence Tang "Root Port", "Upstream Switch Port", "Downstream Switch Port", "PCI Express to PCI/PCI-X Bridge", \ 134dbe3d72SLawrence Tang "PCI/PCI-X Bridge to PCI Express Bridge", "Root Complex Integrated Endpoint Device", "Root Complex Event Collector"} 144dbe3d72SLawrence Tang 15*6c461e90SLawrence Tang typedef struct { 16*6c461e90SLawrence Tang UINT64 PcieExtendedCapabilityId : 16; 17*6c461e90SLawrence Tang UINT64 CapabilityVersion : 4; 18*6c461e90SLawrence Tang UINT64 NextCapabilityOffset : 12; 19*6c461e90SLawrence Tang } EFI_PCIE_ADV_ERROR_EXT_CAPABILITY_HEADER; 20*6c461e90SLawrence Tang 21*6c461e90SLawrence Tang typedef struct { 22*6c461e90SLawrence Tang EFI_PCIE_ADV_ERROR_EXT_CAPABILITY_HEADER Header; 23*6c461e90SLawrence Tang UINT32 UncorrectableErrorStatusReg; 24*6c461e90SLawrence Tang UINT32 UncorrectableErrorMaskReg; 25*6c461e90SLawrence Tang UINT32 UncorrectableErrorSeverityReg; 26*6c461e90SLawrence Tang UINT32 CorrectableErrorStatusReg; 27*6c461e90SLawrence Tang UINT32 CorrectableErrorMaskReg; 28*6c461e90SLawrence Tang UINT32 AeccReg; 29*6c461e90SLawrence Tang UINT8 HeaderLogReg[16]; 30*6c461e90SLawrence Tang UINT32 RootErrorCommand; 31*6c461e90SLawrence Tang UINT32 RootErrorStatus; 32*6c461e90SLawrence Tang UINT16 CorrectableSourceIdReg; 33*6c461e90SLawrence Tang UINT16 ErrorSourceIdReg; 34*6c461e90SLawrence Tang } EFI_PCIE_ADV_ERROR_EXT_CAPABILITY; 35*6c461e90SLawrence Tang 364dbe3d72SLawrence Tang json_object* cper_section_pcie_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor); 374dbe3d72SLawrence Tang 384dbe3d72SLawrence Tang #endif