11b0b00e3SLawrence Tang /** @file 21b0b00e3SLawrence Tang GUIDs and definitions used for Common Platform Error Record. 31b0b00e3SLawrence Tang 41b0b00e3SLawrence Tang Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR> 51b0b00e3SLawrence Tang (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR> 61b0b00e3SLawrence Tang SPDX-License-Identifier: BSD-2-Clause-Patent 71b0b00e3SLawrence Tang 81b0b00e3SLawrence Tang @par Revision Reference: 91b0b00e3SLawrence Tang GUIDs defined in UEFI 2.7 Specification. 101b0b00e3SLawrence Tang 111b0b00e3SLawrence Tang **/ 121b0b00e3SLawrence Tang #include "BaseTypes.h" 131b0b00e3SLawrence Tang 141b0b00e3SLawrence Tang #ifndef __CPER_GUID_H__ 151b0b00e3SLawrence Tang #define __CPER_GUID_H__ 161b0b00e3SLawrence Tang 171b0b00e3SLawrence Tang #pragma pack(1) 181b0b00e3SLawrence Tang 191b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_SIGNATURE_START SIGNATURE_32('C', 'P', 'E', 'R') 201b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_SIGNATURE_END 0xFFFFFFFF 211b0b00e3SLawrence Tang 221b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_REVISION 0x0101 231b0b00e3SLawrence Tang 241b0b00e3SLawrence Tang /// 251b0b00e3SLawrence Tang /// Error Severity in Error Record Header and Error Section Descriptor 261b0b00e3SLawrence Tang ///@{ 271b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_RECOVERABLE 0x00000000 281b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_FATAL 0x00000001 291b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_CORRECTED 0x00000002 301b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_INFO 0x00000003 311b0b00e3SLawrence Tang ///@} 321b0b00e3SLawrence Tang 331b0b00e3SLawrence Tang /// 341b0b00e3SLawrence Tang /// The validation bit mask indicates the validity of the following fields 351b0b00e3SLawrence Tang /// in Error Record Header. 361b0b00e3SLawrence Tang ///@{ 371b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID BIT0 381b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID BIT1 391b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID BIT2 401b0b00e3SLawrence Tang ///@} 411b0b00e3SLawrence Tang 421b0b00e3SLawrence Tang /// 431b0b00e3SLawrence Tang /// Timestamp is precise if this bit is set and correlates to the time of the 441b0b00e3SLawrence Tang /// error event. 451b0b00e3SLawrence Tang /// 461b0b00e3SLawrence Tang #define EFI_ERROR_TIME_STAMP_PRECISE BIT0 471b0b00e3SLawrence Tang 481b0b00e3SLawrence Tang /// 491b0b00e3SLawrence Tang /// The timestamp correlates to the time when the error information was collected 501b0b00e3SLawrence Tang /// by the system software and may not necessarily represent the time of the error 511b0b00e3SLawrence Tang /// event. The timestamp contains the local time in BCD format. 521b0b00e3SLawrence Tang /// 531b0b00e3SLawrence Tang typedef struct { 541b0b00e3SLawrence Tang UINT8 Seconds; 551b0b00e3SLawrence Tang UINT8 Minutes; 561b0b00e3SLawrence Tang UINT8 Hours; 571b0b00e3SLawrence Tang UINT8 Flag; 581b0b00e3SLawrence Tang UINT8 Day; 591b0b00e3SLawrence Tang UINT8 Month; 601b0b00e3SLawrence Tang UINT8 Year; 611b0b00e3SLawrence Tang UINT8 Century; 621b0b00e3SLawrence Tang } EFI_ERROR_TIME_STAMP; 631b0b00e3SLawrence Tang 641b0b00e3SLawrence Tang /// 651b0b00e3SLawrence Tang /// GUID value indicating the record association with an error event notification type. 661b0b00e3SLawrence Tang ///@{ 671b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \ 681b0b00e3SLawrence Tang { \ 69*f8fc7052SJohn Chung 0x2DCE8BB1, 0xBDD7, 0x450e, \ 70*f8fc7052SJohn Chung { \ 71*f8fc7052SJohn Chung 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 \ 72*f8fc7052SJohn Chung } \ 731b0b00e3SLawrence Tang } 741b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \ 751b0b00e3SLawrence Tang { \ 76*f8fc7052SJohn Chung 0x4E292F96, 0xD843, 0x4a55, \ 77*f8fc7052SJohn Chung { \ 78*f8fc7052SJohn Chung 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE \ 79*f8fc7052SJohn Chung } \ 801b0b00e3SLawrence Tang } 811b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \ 821b0b00e3SLawrence Tang { \ 83*f8fc7052SJohn Chung 0xE8F56FFE, 0x919C, 0x4cc5, \ 84*f8fc7052SJohn Chung { \ 85*f8fc7052SJohn Chung 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB \ 86*f8fc7052SJohn Chung } \ 871b0b00e3SLawrence Tang } 881b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \ 891b0b00e3SLawrence Tang { \ 90*f8fc7052SJohn Chung 0xCF93C01F, 0x1A16, 0x4dfc, \ 91*f8fc7052SJohn Chung { \ 92*f8fc7052SJohn Chung 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 \ 93*f8fc7052SJohn Chung } \ 941b0b00e3SLawrence Tang } 951b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \ 961b0b00e3SLawrence Tang { \ 97*f8fc7052SJohn Chung 0xCC5263E8, 0x9308, 0x454a, \ 98*f8fc7052SJohn Chung { \ 99*f8fc7052SJohn Chung 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E \ 100*f8fc7052SJohn Chung } \ 1011b0b00e3SLawrence Tang } 1021b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \ 1031b0b00e3SLawrence Tang { \ 104*f8fc7052SJohn Chung 0x5BAD89FF, 0xB7E6, 0x42c9, \ 105*f8fc7052SJohn Chung { \ 106*f8fc7052SJohn Chung 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A \ 107*f8fc7052SJohn Chung } \ 1081b0b00e3SLawrence Tang } 1091b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \ 1101b0b00e3SLawrence Tang { \ 111*f8fc7052SJohn Chung 0x3D61A466, 0xAB40, 0x409a, \ 112*f8fc7052SJohn Chung { \ 113*f8fc7052SJohn Chung 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F \ 114*f8fc7052SJohn Chung } \ 1151b0b00e3SLawrence Tang } 1161b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \ 1171b0b00e3SLawrence Tang { \ 118*f8fc7052SJohn Chung 0x667DD791, 0xC6B3, 0x4c27, \ 119*f8fc7052SJohn Chung { \ 120*f8fc7052SJohn Chung 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 \ 121*f8fc7052SJohn Chung } \ 1221b0b00e3SLawrence Tang } 1231b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEA \ 1241b0b00e3SLawrence Tang { \ 125*f8fc7052SJohn Chung 0x9A78788A, 0xBBE8, 0x11E4, \ 126*f8fc7052SJohn Chung { \ 127*f8fc7052SJohn Chung 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 \ 128*f8fc7052SJohn Chung } \ 1291b0b00e3SLawrence Tang } 1301b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEI \ 1311b0b00e3SLawrence Tang { \ 132*f8fc7052SJohn Chung 0x5C284C81, 0xB0AE, 0x4E87, \ 133*f8fc7052SJohn Chung { \ 134*f8fc7052SJohn Chung 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 \ 135*f8fc7052SJohn Chung } \ 1361b0b00e3SLawrence Tang } 1371b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_PEI \ 1381b0b00e3SLawrence Tang { \ 139*f8fc7052SJohn Chung 0x09A9D5AC, 0x5204, 0x4214, \ 140*f8fc7052SJohn Chung { \ 141*f8fc7052SJohn Chung 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD \ 142*f8fc7052SJohn Chung } \ 1431b0b00e3SLawrence Tang } 1441b0b00e3SLawrence Tang ///@} 1451b0b00e3SLawrence Tang 1461b0b00e3SLawrence Tang /// 1471b0b00e3SLawrence Tang /// Error Record Header Flags 1481b0b00e3SLawrence Tang ///@{ 1491b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_RECOVERED 0x00000001 1501b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_PREVERR 0x00000002 1511b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_SIMULATED 0x00000004 1521b0b00e3SLawrence Tang ///@} 1531b0b00e3SLawrence Tang 1541b0b00e3SLawrence Tang /// 1551b0b00e3SLawrence Tang /// Common error record header 1561b0b00e3SLawrence Tang /// 1571b0b00e3SLawrence Tang typedef struct { 1581b0b00e3SLawrence Tang UINT32 SignatureStart; 1591b0b00e3SLawrence Tang UINT16 Revision; 1601b0b00e3SLawrence Tang UINT32 SignatureEnd; 1611b0b00e3SLawrence Tang UINT16 SectionCount; 1621b0b00e3SLawrence Tang UINT32 ErrorSeverity; 1631b0b00e3SLawrence Tang UINT32 ValidationBits; 1641b0b00e3SLawrence Tang UINT32 RecordLength; 1651b0b00e3SLawrence Tang EFI_ERROR_TIME_STAMP TimeStamp; 1661b0b00e3SLawrence Tang EFI_GUID PlatformID; 1671b0b00e3SLawrence Tang EFI_GUID PartitionID; 1681b0b00e3SLawrence Tang EFI_GUID CreatorID; 1691b0b00e3SLawrence Tang EFI_GUID NotificationType; 1701b0b00e3SLawrence Tang UINT64 RecordID; 1711b0b00e3SLawrence Tang UINT32 Flags; 1721b0b00e3SLawrence Tang UINT64 PersistenceInfo; 1731b0b00e3SLawrence Tang UINT8 Resv1[12]; 1741b0b00e3SLawrence Tang /// 1751b0b00e3SLawrence Tang /// An array of SectionCount descriptors for the associated 1761b0b00e3SLawrence Tang /// sections. The number of valid sections is equivalent to the 1771b0b00e3SLawrence Tang /// SectionCount. The buffer size of the record may include 1781b0b00e3SLawrence Tang /// more space to dynamically add additional Section 1791b0b00e3SLawrence Tang /// Descriptors to the error record. 1801b0b00e3SLawrence Tang /// 1811b0b00e3SLawrence Tang } EFI_COMMON_ERROR_RECORD_HEADER; 1821b0b00e3SLawrence Tang 1831b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_REVISION 0x0100 1841b0b00e3SLawrence Tang 1851b0b00e3SLawrence Tang /// 1861b0b00e3SLawrence Tang /// Validity Fields in Error Section Descriptor. 1871b0b00e3SLawrence Tang /// 1881b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FRU_ID_VALID BIT0 1891b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FRU_STRING_VALID BIT1 1901b0b00e3SLawrence Tang 1911b0b00e3SLawrence Tang /// 1921b0b00e3SLawrence Tang /// Flag field contains information that describes the error section 1931b0b00e3SLawrence Tang /// in Error Section Descriptor. 1941b0b00e3SLawrence Tang /// 1951b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_PRIMARY BIT0 1961b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING BIT1 1971b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_RESET BIT2 1981b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED BIT3 1991b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4 2001b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5 2011b0b00e3SLawrence Tang 2021b0b00e3SLawrence Tang /// 2031b0b00e3SLawrence Tang /// Error Sectition Type GUIDs in Error Section Descriptor 2041b0b00e3SLawrence Tang ///@{ 2051b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \ 2061b0b00e3SLawrence Tang { \ 207*f8fc7052SJohn Chung 0x9876ccad, 0x47b4, 0x4bdb, \ 208*f8fc7052SJohn Chung { \ 209*f8fc7052SJohn Chung 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb \ 210*f8fc7052SJohn Chung } \ 2111b0b00e3SLawrence Tang } 2121b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \ 2131b0b00e3SLawrence Tang { \ 214*f8fc7052SJohn Chung 0xdc3ea0b0, 0xa144, 0x4797, \ 215*f8fc7052SJohn Chung { \ 216*f8fc7052SJohn Chung 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d \ 217*f8fc7052SJohn Chung } \ 2181b0b00e3SLawrence Tang } 2191b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \ 2201b0b00e3SLawrence Tang { \ 221*f8fc7052SJohn Chung 0xdc3ea0b0, 0xa144, 0x4797, \ 222*f8fc7052SJohn Chung { \ 223*f8fc7052SJohn Chung 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d \ 224*f8fc7052SJohn Chung } \ 2251b0b00e3SLawrence Tang } 2261b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \ 2271b0b00e3SLawrence Tang { \ 228*f8fc7052SJohn Chung 0xe19e3d16, 0xbc11, 0x11e4, \ 229*f8fc7052SJohn Chung { \ 230*f8fc7052SJohn Chung 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 \ 231*f8fc7052SJohn Chung } \ 2321b0b00e3SLawrence Tang } 2331b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \ 2341b0b00e3SLawrence Tang { \ 235*f8fc7052SJohn Chung 0xa5bc1114, 0x6f64, 0x4ede, \ 236*f8fc7052SJohn Chung { \ 237*f8fc7052SJohn Chung 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 \ 238*f8fc7052SJohn Chung } \ 2391b0b00e3SLawrence Tang } 2401b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \ 2411b0b00e3SLawrence Tang { \ 242*f8fc7052SJohn Chung 0x61EC04FC, 0x48E6, 0xD813, \ 243*f8fc7052SJohn Chung { \ 244*f8fc7052SJohn Chung 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 \ 245*f8fc7052SJohn Chung } \ 2461b0b00e3SLawrence Tang } 2471b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCIE_GUID \ 2481b0b00e3SLawrence Tang { \ 249*f8fc7052SJohn Chung 0xd995e954, 0xbbc1, 0x430f, \ 250*f8fc7052SJohn Chung { \ 251*f8fc7052SJohn Chung 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 \ 252*f8fc7052SJohn Chung } \ 2531b0b00e3SLawrence Tang } 2541b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \ 2551b0b00e3SLawrence Tang { \ 256*f8fc7052SJohn Chung 0x81212a96, 0x09ed, 0x4996, \ 257*f8fc7052SJohn Chung { \ 258*f8fc7052SJohn Chung 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed \ 259*f8fc7052SJohn Chung } \ 2601b0b00e3SLawrence Tang } 2611b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \ 2621b0b00e3SLawrence Tang { \ 263*f8fc7052SJohn Chung 0xc5753963, 0x3b84, 0x4095, \ 264*f8fc7052SJohn Chung { \ 265*f8fc7052SJohn Chung 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd \ 266*f8fc7052SJohn Chung } \ 2671b0b00e3SLawrence Tang } 2681b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCI_DEVICE_GUID \ 2691b0b00e3SLawrence Tang { \ 270*f8fc7052SJohn Chung 0xeb5e4685, 0xca66, 0x4769, \ 271*f8fc7052SJohn Chung { \ 272*f8fc7052SJohn Chung 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 \ 273*f8fc7052SJohn Chung } \ 2741b0b00e3SLawrence Tang } 2751b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \ 2761b0b00e3SLawrence Tang { \ 277*f8fc7052SJohn Chung 0x5b51fef7, 0xc79d, 0x4434, \ 278*f8fc7052SJohn Chung { \ 279*f8fc7052SJohn Chung 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 \ 280*f8fc7052SJohn Chung } \ 2811b0b00e3SLawrence Tang } 2821b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \ 2831b0b00e3SLawrence Tang { \ 284*f8fc7052SJohn Chung 0x71761d37, 0x32b2, 0x45cd, \ 285*f8fc7052SJohn Chung { \ 286*f8fc7052SJohn Chung 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf \ 287*f8fc7052SJohn Chung } \ 2881b0b00e3SLawrence Tang } 2891b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \ 2901b0b00e3SLawrence Tang { \ 291*f8fc7052SJohn Chung 0x036f84e1, 0x7f37, 0x428c, \ 292*f8fc7052SJohn Chung { \ 293*f8fc7052SJohn Chung 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec \ 294*f8fc7052SJohn Chung } \ 2951b0b00e3SLawrence Tang } 2961b0b00e3SLawrence Tang ///@} 2971b0b00e3SLawrence Tang 2981b0b00e3SLawrence Tang /// 2991b0b00e3SLawrence Tang /// Error Section Descriptor 3001b0b00e3SLawrence Tang /// 3011b0b00e3SLawrence Tang typedef struct { 3021b0b00e3SLawrence Tang UINT32 SectionOffset; 3031b0b00e3SLawrence Tang UINT32 SectionLength; 3041b0b00e3SLawrence Tang UINT16 Revision; 3051b0b00e3SLawrence Tang UINT8 SecValidMask; 3061b0b00e3SLawrence Tang UINT8 Resv1; 3071b0b00e3SLawrence Tang UINT32 SectionFlags; 3081b0b00e3SLawrence Tang EFI_GUID SectionType; 3091b0b00e3SLawrence Tang EFI_GUID FruId; 3101b0b00e3SLawrence Tang UINT32 Severity; 3111b0b00e3SLawrence Tang CHAR8 FruString[20]; 3121b0b00e3SLawrence Tang } EFI_ERROR_SECTION_DESCRIPTOR; 3131b0b00e3SLawrence Tang 3141b0b00e3SLawrence Tang /// 3151b0b00e3SLawrence Tang /// The validation bit mask indicates whether or not each of the following fields are 3161b0b00e3SLawrence Tang /// valid in Proessor Generic Error section. 3171b0b00e3SLawrence Tang ///@{ 3181b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_VALID BIT0 3191b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_VALID BIT1 3201b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID BIT2 3211b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_VALID BIT3 3221b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4 3231b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5 3241b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_VERSION_VALID BIT6 3251b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_BRAND_VALID BIT7 3261b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ID_VALID BIT8 3271b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID BIT9 3281b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID BIT10 3291b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID BIT11 3301b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_INST_IP_VALID BIT12 3311b0b00e3SLawrence Tang ///@} 3321b0b00e3SLawrence Tang 3331b0b00e3SLawrence Tang /// 3341b0b00e3SLawrence Tang /// The type of the processor architecture in Proessor Generic Error section. 3351b0b00e3SLawrence Tang ///@{ 3361b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64 0x00 3371b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_IA64 0x01 3381b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 3391b0b00e3SLawrence Tang ///@} 3401b0b00e3SLawrence Tang 3411b0b00e3SLawrence Tang /// 3421b0b00e3SLawrence Tang /// The type of the instruction set executing when the error occurred in Proessor 3431b0b00e3SLawrence Tang /// Generic Error section. 3441b0b00e3SLawrence Tang ///@{ 3451b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_IA32 0x00 3461b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_IA64 0x01 3471b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_X64 0x02 3481b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A32_T32 0x03 3491b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A64 0x04 3501b0b00e3SLawrence Tang ///@} 3511b0b00e3SLawrence Tang 3521b0b00e3SLawrence Tang /// 3531b0b00e3SLawrence Tang /// The type of error that occurred in Proessor Generic Error section. 3541b0b00e3SLawrence Tang ///@{ 3551b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN 0x00 3561b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE 0x01 3571b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB 0x02 3581b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS 0x04 3591b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH 0x08 3601b0b00e3SLawrence Tang ///@} 3611b0b00e3SLawrence Tang 3621b0b00e3SLawrence Tang /// 3631b0b00e3SLawrence Tang /// The type of operation in Proessor Generic Error section. 3641b0b00e3SLawrence Tang ///@{ 3651b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC 0x00 3661b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ 0x01 3671b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE 0x02 3681b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC 0x03 3691b0b00e3SLawrence Tang ///@} 3701b0b00e3SLawrence Tang 3711b0b00e3SLawrence Tang /// 3721b0b00e3SLawrence Tang /// Flags bit mask indicates additional information about the error in Proessor Generic 3731b0b00e3SLawrence Tang /// Error section 3741b0b00e3SLawrence Tang ///@{ 3751b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE BIT0 3761b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP BIT1 3771b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW BIT2 3781b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED BIT3 3791b0b00e3SLawrence Tang ///@} 3801b0b00e3SLawrence Tang 3811b0b00e3SLawrence Tang /// 3821b0b00e3SLawrence Tang /// Processor Generic Error Section 3831b0b00e3SLawrence Tang /// describes processor reported hardware errors for logical processors in the system. 3841b0b00e3SLawrence Tang /// 3851b0b00e3SLawrence Tang typedef struct { 3861b0b00e3SLawrence Tang UINT64 ValidFields; 3871b0b00e3SLawrence Tang UINT8 Type; 3881b0b00e3SLawrence Tang UINT8 Isa; 3891b0b00e3SLawrence Tang UINT8 ErrorType; 3901b0b00e3SLawrence Tang UINT8 Operation; 3911b0b00e3SLawrence Tang UINT8 Flags; 3921b0b00e3SLawrence Tang UINT8 Level; 3931b0b00e3SLawrence Tang UINT16 Resv1; 3941b0b00e3SLawrence Tang UINT64 VersionInfo; 3951b0b00e3SLawrence Tang CHAR8 BrandString[128]; 3961b0b00e3SLawrence Tang UINT64 ApicId; 3971b0b00e3SLawrence Tang UINT64 TargetAddr; 3981b0b00e3SLawrence Tang UINT64 RequestorId; 3991b0b00e3SLawrence Tang UINT64 ResponderId; 4001b0b00e3SLawrence Tang UINT64 InstructionIP; 4011b0b00e3SLawrence Tang } EFI_PROCESSOR_GENERIC_ERROR_DATA; 4021b0b00e3SLawrence Tang 4031b0b00e3SLawrence Tang /// 4041b0b00e3SLawrence Tang /// IA32 and x64 Specific definitions. 4051b0b00e3SLawrence Tang /// 4061b0b00e3SLawrence Tang 4071b0b00e3SLawrence Tang /// 4081b0b00e3SLawrence Tang /// GUID value indicating the type of Processor Error Information structure 4091b0b00e3SLawrence Tang /// in IA32/X64 Processor Error Information Structure. 4101b0b00e3SLawrence Tang ///@{ 4111b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \ 4121b0b00e3SLawrence Tang { \ 413*f8fc7052SJohn Chung 0xA55701F5, 0xE3EF, 0x43de, \ 414*f8fc7052SJohn Chung { \ 415*f8fc7052SJohn Chung 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C \ 416*f8fc7052SJohn Chung } \ 4171b0b00e3SLawrence Tang } 4181b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \ 4191b0b00e3SLawrence Tang { \ 420*f8fc7052SJohn Chung 0xFC06B535, 0x5E1F, 0x4562, \ 421*f8fc7052SJohn Chung { \ 422*f8fc7052SJohn Chung 0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 \ 423*f8fc7052SJohn Chung } \ 4241b0b00e3SLawrence Tang } 4251b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \ 4261b0b00e3SLawrence Tang { \ 427*f8fc7052SJohn Chung 0x1CF3F8B3, 0xC5B1, 0x49a2, \ 428*f8fc7052SJohn Chung { \ 429*f8fc7052SJohn Chung 0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C \ 430*f8fc7052SJohn Chung } \ 4311b0b00e3SLawrence Tang } 4321b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \ 4331b0b00e3SLawrence Tang { \ 434*f8fc7052SJohn Chung 0x48AB7F57, 0xDC34, 0x4f6c, \ 435*f8fc7052SJohn Chung { \ 436*f8fc7052SJohn Chung 0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 \ 437*f8fc7052SJohn Chung } \ 4381b0b00e3SLawrence Tang } 439794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeCacheCheckGuid; 440794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeTlbCheckGuid; 441794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeBusCheckGuid; 442794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeMsCheckGuid; 443794312c8SLawrence Tang 4441b0b00e3SLawrence Tang ///@} 4451b0b00e3SLawrence Tang 4461b0b00e3SLawrence Tang /// 4471b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the IA32/X64 Processor 4481b0b00e3SLawrence Tang /// Error Record structure are valid. 4491b0b00e3SLawrence Tang ///@{ 4501b0b00e3SLawrence Tang #define EFI_IA32_X64_PROCESSOR_ERROR_APIC_ID_VALID BIT0 4511b0b00e3SLawrence Tang #define EFI_IA32_X64_PROCESSOR_ERROR_CPU_ID_INFO_VALID BIT1 4521b0b00e3SLawrence Tang ///@} 4531b0b00e3SLawrence Tang 4541b0b00e3SLawrence Tang /// 4551b0b00e3SLawrence Tang /// IA32/X64 Processor Error Record 4561b0b00e3SLawrence Tang /// 4571b0b00e3SLawrence Tang typedef struct { 4581b0b00e3SLawrence Tang UINT64 ValidFields; 4591b0b00e3SLawrence Tang UINT64 ApicId; 4601b0b00e3SLawrence Tang UINT8 CpuIdInfo[48]; 4611b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESSOR_ERROR_RECORD; 4621b0b00e3SLawrence Tang 4631b0b00e3SLawrence Tang /// 4641b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the Cache Check structure 4651b0b00e3SLawrence Tang /// are valid. 4661b0b00e3SLawrence Tang ///@{ 4671b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID BIT0 4681b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_VALID BIT1 4691b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_LEVEL_VALID BIT2 4701b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID BIT3 4711b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4 4721b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5 4731b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_RESTARTABLE_VALID BIT6 4741b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OVERFLOW_VALID BIT7 4751b0b00e3SLawrence Tang ///@} 4761b0b00e3SLawrence Tang 4771b0b00e3SLawrence Tang /// 4781b0b00e3SLawrence Tang /// Type of cache error in the Cache Check structure 4791b0b00e3SLawrence Tang ///@{ 4801b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION 0 4811b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS 1 4821b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC 2 4831b0b00e3SLawrence Tang ///@} 4841b0b00e3SLawrence Tang 4851b0b00e3SLawrence Tang /// 4861b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the Cache 4871b0b00e3SLawrence Tang /// Check structure 4881b0b00e3SLawrence Tang ///@{ 4891b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC 0 4901b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ 1 4911b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 4921b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ 3 4931b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE 4 4941b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH 5 4951b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH 6 4961b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION 7 4971b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP 8 4981b0b00e3SLawrence Tang ///@} 4991b0b00e3SLawrence Tang 5001b0b00e3SLawrence Tang /// 5011b0b00e3SLawrence Tang /// IA32/X64 Cache Check Structure 5021b0b00e3SLawrence Tang /// 5031b0b00e3SLawrence Tang typedef struct { 5041b0b00e3SLawrence Tang UINT64 ValidFields : 16; 5051b0b00e3SLawrence Tang UINT64 TransactionType : 2; 5061b0b00e3SLawrence Tang UINT64 Operation : 4; 5071b0b00e3SLawrence Tang UINT64 Level : 3; 5081b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 5091b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 5101b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 5111b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 5121b0b00e3SLawrence Tang UINT64 Overflow : 1; 5131b0b00e3SLawrence Tang UINT64 Resv1 : 34; 5141b0b00e3SLawrence Tang } EFI_IA32_X64_CACHE_CHECK_INFO; 5151b0b00e3SLawrence Tang 5161b0b00e3SLawrence Tang /// 5171b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the TLB Check structure 5181b0b00e3SLawrence Tang /// are valid. 5191b0b00e3SLawrence Tang ///@{ 5201b0b00e3SLawrence Tang #define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID BIT0 5211b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_VALID BIT1 5221b0b00e3SLawrence Tang #define EFI_TLB_CHECK_LEVEL_VALID BIT2 5231b0b00e3SLawrence Tang #define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID BIT3 5241b0b00e3SLawrence Tang #define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4 5251b0b00e3SLawrence Tang #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5 5261b0b00e3SLawrence Tang #define EFI_TLB_CHECK_RESTARTABLE_VALID BIT6 5271b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OVERFLOW_VALID BIT7 5281b0b00e3SLawrence Tang ///@} 5291b0b00e3SLawrence Tang 5301b0b00e3SLawrence Tang /// 5311b0b00e3SLawrence Tang /// Type of cache error in the TLB Check structure 5321b0b00e3SLawrence Tang ///@{ 5331b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION 0 5341b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS 1 5351b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_GENERIC 2 5361b0b00e3SLawrence Tang ///@} 5371b0b00e3SLawrence Tang 5381b0b00e3SLawrence Tang /// 5391b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the TLB 5401b0b00e3SLawrence Tang /// Check structure 5411b0b00e3SLawrence Tang ///@{ 5421b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC 0 5431b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ 1 5441b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 5451b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ 3 5461b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE 4 5471b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH 5 5481b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH 6 5491b0b00e3SLawrence Tang ///@} 5501b0b00e3SLawrence Tang 5511b0b00e3SLawrence Tang /// 5521b0b00e3SLawrence Tang /// IA32/X64 TLB Check Structure 5531b0b00e3SLawrence Tang /// 5541b0b00e3SLawrence Tang typedef struct { 5551b0b00e3SLawrence Tang UINT64 ValidFields : 16; 5561b0b00e3SLawrence Tang UINT64 TransactionType : 2; 5571b0b00e3SLawrence Tang UINT64 Operation : 4; 5581b0b00e3SLawrence Tang UINT64 Level : 3; 5591b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 5601b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 5611b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 5621b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 5631b0b00e3SLawrence Tang UINT64 Overflow : 1; 5641b0b00e3SLawrence Tang UINT64 Resv1 : 34; 5651b0b00e3SLawrence Tang } EFI_IA32_X64_TLB_CHECK_INFO; 5661b0b00e3SLawrence Tang 5671b0b00e3SLawrence Tang /// 5681b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the MS Check structure 5691b0b00e3SLawrence Tang /// are valid. 5701b0b00e3SLawrence Tang ///@{ 5711b0b00e3SLawrence Tang #define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID BIT0 5721b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_VALID BIT1 5731b0b00e3SLawrence Tang #define EFI_BUS_CHECK_LEVEL_VALID BIT2 5741b0b00e3SLawrence Tang #define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID BIT3 5751b0b00e3SLawrence Tang #define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4 5761b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5 5771b0b00e3SLawrence Tang #define EFI_BUS_CHECK_RESTARTABLE_VALID BIT6 5781b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OVERFLOW_VALID BIT7 5791b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID BIT8 5801b0b00e3SLawrence Tang #define EFI_BUS_CHECK_TIME_OUT_VALID BIT9 5811b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_VALID BIT10 5821b0b00e3SLawrence Tang ///@} 5831b0b00e3SLawrence Tang 5841b0b00e3SLawrence Tang /// 5851b0b00e3SLawrence Tang /// Type of cache error in the Bus Check structure 5861b0b00e3SLawrence Tang ///@{ 5871b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION 0 5881b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS 1 5891b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_GENERIC 2 5901b0b00e3SLawrence Tang ///@} 5911b0b00e3SLawrence Tang 5921b0b00e3SLawrence Tang /// 5931b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the Bus 5941b0b00e3SLawrence Tang /// Check structure 5951b0b00e3SLawrence Tang ///@{ 5961b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC 0 5971b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ 1 5981b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 5991b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ 3 6001b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE 4 6011b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH 5 6021b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH 6 6031b0b00e3SLawrence Tang ///@} 6041b0b00e3SLawrence Tang 6051b0b00e3SLawrence Tang /// 6061b0b00e3SLawrence Tang /// Type of Participation 6071b0b00e3SLawrence Tang ///@{ 6081b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST 0 6091b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED 1 6101b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED 2 6111b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC 3 6121b0b00e3SLawrence Tang ///@} 6131b0b00e3SLawrence Tang 6141b0b00e3SLawrence Tang /// 6151b0b00e3SLawrence Tang /// Type of Address Space 6161b0b00e3SLawrence Tang ///@{ 6171b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY 0 6181b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED 1 6191b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO 2 6201b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER 3 6211b0b00e3SLawrence Tang ///@} 6221b0b00e3SLawrence Tang 6231b0b00e3SLawrence Tang /// 6241b0b00e3SLawrence Tang /// IA32/X64 Bus Check Structure 6251b0b00e3SLawrence Tang /// 6261b0b00e3SLawrence Tang typedef struct { 6271b0b00e3SLawrence Tang UINT64 ValidFields : 16; 6281b0b00e3SLawrence Tang UINT64 TransactionType : 2; 6291b0b00e3SLawrence Tang UINT64 Operation : 4; 6301b0b00e3SLawrence Tang UINT64 Level : 3; 6311b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 6321b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 6331b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 6341b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 6351b0b00e3SLawrence Tang UINT64 Overflow : 1; 6361b0b00e3SLawrence Tang UINT64 ParticipationType : 2; 6371b0b00e3SLawrence Tang UINT64 TimeOut : 1; 6381b0b00e3SLawrence Tang UINT64 AddressSpace : 2; 6391b0b00e3SLawrence Tang UINT64 Resv1 : 29; 6401b0b00e3SLawrence Tang } EFI_IA32_X64_BUS_CHECK_INFO; 6411b0b00e3SLawrence Tang 6421b0b00e3SLawrence Tang /// 6431b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the MS Check structure 6441b0b00e3SLawrence Tang /// are valid. 6451b0b00e3SLawrence Tang ///@{ 6461b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_VALID BIT0 6471b0b00e3SLawrence Tang #define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID BIT1 6481b0b00e3SLawrence Tang #define EFI_MS_CHECK_UNCORRECTED_VALID BIT2 6491b0b00e3SLawrence Tang #define EFI_MS_CHECK_PRECISE_IP_VALID BIT3 6501b0b00e3SLawrence Tang #define EFI_MS_CHECK_RESTARTABLE_VALID BIT4 6511b0b00e3SLawrence Tang #define EFI_MS_CHECK_OVERFLOW_VALID BIT5 6521b0b00e3SLawrence Tang ///@} 6531b0b00e3SLawrence Tang 6541b0b00e3SLawrence Tang /// 6551b0b00e3SLawrence Tang /// Error type identifies the operation that caused the error. 6561b0b00e3SLawrence Tang ///@{ 6571b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_NO 0 6581b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED 1 6591b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY 2 6601b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL 3 6611b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_FRC 4 6621b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED 5 6631b0b00e3SLawrence Tang ///@} 6641b0b00e3SLawrence Tang 6651b0b00e3SLawrence Tang /// 6661b0b00e3SLawrence Tang /// IA32/X64 MS Check Field Description 6671b0b00e3SLawrence Tang /// 6681b0b00e3SLawrence Tang typedef struct { 6691b0b00e3SLawrence Tang UINT64 ValidFields : 16; 6701b0b00e3SLawrence Tang UINT64 ErrorType : 3; 6711b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 6721b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 6731b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 6741b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 6751b0b00e3SLawrence Tang UINT64 Overflow : 1; 6761b0b00e3SLawrence Tang UINT64 Resv1 : 40; 6771b0b00e3SLawrence Tang } EFI_IA32_X64_MS_CHECK_INFO; 6781b0b00e3SLawrence Tang 6791b0b00e3SLawrence Tang /// 6801b0b00e3SLawrence Tang /// IA32/X64 Check Information Item 6811b0b00e3SLawrence Tang /// 6821b0b00e3SLawrence Tang typedef union { 6831b0b00e3SLawrence Tang EFI_IA32_X64_CACHE_CHECK_INFO CacheCheck; 6841b0b00e3SLawrence Tang EFI_IA32_X64_TLB_CHECK_INFO TlbCheck; 6851b0b00e3SLawrence Tang EFI_IA32_X64_BUS_CHECK_INFO BusCheck; 6861b0b00e3SLawrence Tang EFI_IA32_X64_MS_CHECK_INFO MsCheck; 6871b0b00e3SLawrence Tang UINT64 Data64; 6881b0b00e3SLawrence Tang } EFI_IA32_X64_CHECK_INFO_ITEM; 6891b0b00e3SLawrence Tang 6901b0b00e3SLawrence Tang /// 6911b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the IA32/X64 Processor Error 6921b0b00e3SLawrence Tang /// Information Structure are valid. 6931b0b00e3SLawrence Tang ///@{ 6941b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID BIT0 6951b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID BIT1 6961b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID BIT2 6971b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID BIT3 6981b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4 6991b0b00e3SLawrence Tang ///@} 7001b0b00e3SLawrence Tang 7011b0b00e3SLawrence Tang /// 7021b0b00e3SLawrence Tang /// IA32/X64 Processor Error Information Structure 7031b0b00e3SLawrence Tang /// 7041b0b00e3SLawrence Tang typedef struct { 7051b0b00e3SLawrence Tang EFI_GUID ErrorType; 7061b0b00e3SLawrence Tang UINT64 ValidFields; 7071b0b00e3SLawrence Tang EFI_IA32_X64_CHECK_INFO_ITEM CheckInfo; 7081b0b00e3SLawrence Tang UINT64 TargetId; 7091b0b00e3SLawrence Tang UINT64 RequestorId; 7101b0b00e3SLawrence Tang UINT64 ResponderId; 7111b0b00e3SLawrence Tang UINT64 InstructionIP; 7121b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESS_ERROR_INFO; 7131b0b00e3SLawrence Tang 7141b0b00e3SLawrence Tang /// 7151b0b00e3SLawrence Tang /// IA32/X64 Processor Context Information Structure 7161b0b00e3SLawrence Tang /// 7171b0b00e3SLawrence Tang typedef struct { 7181b0b00e3SLawrence Tang UINT16 RegisterType; 7191b0b00e3SLawrence Tang UINT16 ArraySize; 7201b0b00e3SLawrence Tang UINT32 MsrAddress; 7211b0b00e3SLawrence Tang UINT64 MmRegisterAddress; 7221b0b00e3SLawrence Tang // 7231b0b00e3SLawrence Tang // This field will provide the contents of the actual registers or raw data. 7241b0b00e3SLawrence Tang // The number of Registers or size of the raw data reported is determined 7251b0b00e3SLawrence Tang // by (Array Size / 8) or otherwise specified by the context structure type 7261b0b00e3SLawrence Tang // definition. 7271b0b00e3SLawrence Tang // 7281b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESSOR_CONTEXT_INFO; 7291b0b00e3SLawrence Tang 7301b0b00e3SLawrence Tang /// 7311b0b00e3SLawrence Tang /// Register Context Type 7321b0b00e3SLawrence Tang ///@{ 7331b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED 0x0000 7341b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_MSR 0x0001 7351b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_IA32 0x0002 7361b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_X64 0x0003 7371b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_FXSAVE 0x0004 7381b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_DR_IA32 0x0005 7391b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_DR_X64 0x0006 7401b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_MEM_MAP 0x0007 7411b0b00e3SLawrence Tang ///@} 7421b0b00e3SLawrence Tang 7431b0b00e3SLawrence Tang /// 7441b0b00e3SLawrence Tang /// IA32 Register State 7451b0b00e3SLawrence Tang /// 7461b0b00e3SLawrence Tang typedef struct { 7471b0b00e3SLawrence Tang UINT32 Eax; 7481b0b00e3SLawrence Tang UINT32 Ebx; 7491b0b00e3SLawrence Tang UINT32 Ecx; 7501b0b00e3SLawrence Tang UINT32 Edx; 7511b0b00e3SLawrence Tang UINT32 Esi; 7521b0b00e3SLawrence Tang UINT32 Edi; 7531b0b00e3SLawrence Tang UINT32 Ebp; 7541b0b00e3SLawrence Tang UINT32 Esp; 7551b0b00e3SLawrence Tang UINT16 Cs; 7561b0b00e3SLawrence Tang UINT16 Ds; 7571b0b00e3SLawrence Tang UINT16 Ss; 7581b0b00e3SLawrence Tang UINT16 Es; 7591b0b00e3SLawrence Tang UINT16 Fs; 7601b0b00e3SLawrence Tang UINT16 Gs; 7611b0b00e3SLawrence Tang UINT32 Eflags; 7621b0b00e3SLawrence Tang UINT32 Eip; 7631b0b00e3SLawrence Tang UINT32 Cr0; 7641b0b00e3SLawrence Tang UINT32 Cr1; 7651b0b00e3SLawrence Tang UINT32 Cr2; 7661b0b00e3SLawrence Tang UINT32 Cr3; 7671b0b00e3SLawrence Tang UINT32 Cr4; 7681b0b00e3SLawrence Tang UINT32 Gdtr[2]; 7691b0b00e3SLawrence Tang UINT32 Idtr[2]; 7701b0b00e3SLawrence Tang UINT16 Ldtr; 7711b0b00e3SLawrence Tang UINT16 Tr; 7721b0b00e3SLawrence Tang } EFI_CONTEXT_IA32_REGISTER_STATE; 7731b0b00e3SLawrence Tang 7741b0b00e3SLawrence Tang /// 7751b0b00e3SLawrence Tang /// X64 Register State 7761b0b00e3SLawrence Tang /// 7771b0b00e3SLawrence Tang typedef struct { 7781b0b00e3SLawrence Tang UINT64 Rax; 7791b0b00e3SLawrence Tang UINT64 Rbx; 7801b0b00e3SLawrence Tang UINT64 Rcx; 7811b0b00e3SLawrence Tang UINT64 Rdx; 7821b0b00e3SLawrence Tang UINT64 Rsi; 7831b0b00e3SLawrence Tang UINT64 Rdi; 7841b0b00e3SLawrence Tang UINT64 Rbp; 7851b0b00e3SLawrence Tang UINT64 Rsp; 7861b0b00e3SLawrence Tang UINT64 R8; 7871b0b00e3SLawrence Tang UINT64 R9; 7881b0b00e3SLawrence Tang UINT64 R10; 7891b0b00e3SLawrence Tang UINT64 R11; 7901b0b00e3SLawrence Tang UINT64 R12; 7911b0b00e3SLawrence Tang UINT64 R13; 7921b0b00e3SLawrence Tang UINT64 R14; 7931b0b00e3SLawrence Tang UINT64 R15; 7941b0b00e3SLawrence Tang UINT16 Cs; 7951b0b00e3SLawrence Tang UINT16 Ds; 7961b0b00e3SLawrence Tang UINT16 Ss; 7971b0b00e3SLawrence Tang UINT16 Es; 7981b0b00e3SLawrence Tang UINT16 Fs; 7991b0b00e3SLawrence Tang UINT16 Gs; 8001b0b00e3SLawrence Tang UINT32 Resv1; 8011b0b00e3SLawrence Tang UINT64 Rflags; 8021b0b00e3SLawrence Tang UINT64 Rip; 8031b0b00e3SLawrence Tang UINT64 Cr0; 8041b0b00e3SLawrence Tang UINT64 Cr1; 8051b0b00e3SLawrence Tang UINT64 Cr2; 8061b0b00e3SLawrence Tang UINT64 Cr3; 8071b0b00e3SLawrence Tang UINT64 Cr4; 808151c6cabSLawrence Tang UINT64 Cr8; 8091b0b00e3SLawrence Tang UINT64 Gdtr[2]; 8101b0b00e3SLawrence Tang UINT64 Idtr[2]; 8111b0b00e3SLawrence Tang UINT16 Ldtr; 8121b0b00e3SLawrence Tang UINT16 Tr; 8131b0b00e3SLawrence Tang } EFI_CONTEXT_X64_REGISTER_STATE; 8141b0b00e3SLawrence Tang 8151b0b00e3SLawrence Tang /// 8161b0b00e3SLawrence Tang /// The validation bit mask indicates each of the following field is in IA32/X64 8171b0b00e3SLawrence Tang /// Processor Error Section. 8181b0b00e3SLawrence Tang /// 8191b0b00e3SLawrence Tang typedef struct { 8201b0b00e3SLawrence Tang UINT64 ApicIdValid : 1; 8211b0b00e3SLawrence Tang UINT64 CpuIdInforValid : 1; 8221b0b00e3SLawrence Tang UINT64 ErrorInfoNum : 6; 8231b0b00e3SLawrence Tang UINT64 ContextNum : 6; 8241b0b00e3SLawrence Tang UINT64 Resv1 : 50; 8251b0b00e3SLawrence Tang } EFI_IA32_X64_VALID_BITS; 8261b0b00e3SLawrence Tang 8273d0e4f24SLawrence Tang /// 8281b0b00e3SLawrence Tang /// Error Status Fields 8291b0b00e3SLawrence Tang /// 8301b0b00e3SLawrence Tang typedef struct { 8311b0b00e3SLawrence Tang UINT64 Resv1 : 8; 8321b0b00e3SLawrence Tang UINT64 Type : 8; 8331b0b00e3SLawrence Tang UINT64 AddressSignal : 1; ///< Error in Address signals or in Address portion of transaction 8341b0b00e3SLawrence Tang UINT64 ControlSignal : 1; ///< Error in Control signals or in Control portion of transaction 8351b0b00e3SLawrence Tang UINT64 DataSignal : 1; ///< Error in Data signals or in Data portion of transaction 8361b0b00e3SLawrence Tang UINT64 DetectedByResponder : 1; ///< Error detected by responder 8371b0b00e3SLawrence Tang UINT64 DetectedByRequester : 1; ///< Error detected by requestor 8381b0b00e3SLawrence Tang UINT64 FirstError : 1; ///< First Error in the sequence - option field 8391b0b00e3SLawrence Tang UINT64 OverflowNotLogged : 1; ///< Additional errors were not logged due to lack of resources 8401b0b00e3SLawrence Tang UINT64 Resv2 : 41; 8411b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_STATUS; 8421b0b00e3SLawrence Tang 8431b0b00e3SLawrence Tang /// 844a0865e38SLawrence Tang /// CPER Generic Error Codes 845a0865e38SLawrence Tang /// 846*f8fc7052SJohn Chung #define CPER_GENERIC_ERROR_TYPES_KEYS \ 847*f8fc7052SJohn Chung (int[]) \ 848*f8fc7052SJohn Chung { \ 849*f8fc7052SJohn Chung 1, 16, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, \ 850*f8fc7052SJohn Chung 26 \ 851*f8fc7052SJohn Chung } 852*f8fc7052SJohn Chung #define CPER_GENERIC_ERROR_TYPES_VALUES \ 853*f8fc7052SJohn Chung (const char *[]) \ 854*f8fc7052SJohn Chung { \ 855*f8fc7052SJohn Chung "ERR_INTERNAL", "ERR_BUS", "ERR_MEM", "ERR_TLB", "ERR_CACHE", \ 856*f8fc7052SJohn Chung "ERR_FUNCTION", "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", \ 857*f8fc7052SJohn Chung "ERR_IMPROPER", "ERR_UNIMPL", "ERR_LOL", \ 858*f8fc7052SJohn Chung "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", \ 859*f8fc7052SJohn Chung "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED" \ 860*f8fc7052SJohn Chung } 861*f8fc7052SJohn Chung #define CPER_GENERIC_ERROR_TYPES_DESCRIPTIONS \ 862*f8fc7052SJohn Chung (const char *[]) \ 863*f8fc7052SJohn Chung { \ 864a0865e38SLawrence Tang "Error detected internal to the component.", \ 865a0865e38SLawrence Tang "Error detected in the bus.", \ 866a0865e38SLawrence Tang "Storage error in memory (DRAM).", \ 867*f8fc7052SJohn Chung "Storage error in TLB.", "Storage error in cache.", \ 868a0865e38SLawrence Tang "Error in one or more functional units.", \ 869a0865e38SLawrence Tang "Component failed self test.", \ 870a0865e38SLawrence Tang "Overflow or underflow of internal queue.", \ 871a0865e38SLawrence Tang "Virtual address not found on IO-TLB or IO-PDIR.", \ 872a0865e38SLawrence Tang "Improper access error.", \ 873a0865e38SLawrence Tang "Access to a memory address which is not mapped to any component.", \ 874a0865e38SLawrence Tang "Loss of Lockstep error.", \ 875a0865e38SLawrence Tang "Response not associated with a request.", \ 876a0865e38SLawrence Tang "Bus parity error (must also set the A, C, or D bits).", \ 877a0865e38SLawrence Tang "Detection of a protocol error.", \ 878a0865e38SLawrence Tang "Detection of a PATH_ERROR.", \ 879a0865e38SLawrence Tang "Bus operation timeout.", \ 880*f8fc7052SJohn Chung "A read was issued to data that has been poisoned." \ 881*f8fc7052SJohn Chung } 882a0865e38SLawrence Tang 883a0865e38SLawrence Tang /// 8841b0b00e3SLawrence Tang /// Error Type 8851b0b00e3SLawrence Tang /// 8861b0b00e3SLawrence Tang typedef enum { 8871b0b00e3SLawrence Tang /// 8881b0b00e3SLawrence Tang /// General Internal errors 8891b0b00e3SLawrence Tang /// 8901b0b00e3SLawrence Tang ErrorInternal = 1, 8911b0b00e3SLawrence Tang ErrorBus = 16, 8921b0b00e3SLawrence Tang /// 8931b0b00e3SLawrence Tang /// Component Internal errors 8941b0b00e3SLawrence Tang /// 8951b0b00e3SLawrence Tang ErrorMemStorage = 4, // Error in memory device 8961b0b00e3SLawrence Tang ErrorTlbStorage = 5, // TLB error in cache 8971b0b00e3SLawrence Tang ErrorCacheStorage = 6, 8981b0b00e3SLawrence Tang ErrorFunctionalUnit = 7, 8991b0b00e3SLawrence Tang ErrorSelftest = 8, 9001b0b00e3SLawrence Tang ErrorOverflow = 9, 9011b0b00e3SLawrence Tang /// 9021b0b00e3SLawrence Tang /// Bus internal errors 9031b0b00e3SLawrence Tang /// 9041b0b00e3SLawrence Tang ErrorVirtualMap = 17, 9051b0b00e3SLawrence Tang ErrorAccessInvalid = 18, // Improper access 9061b0b00e3SLawrence Tang ErrorUnimplAccess = 19, // Unimplemented memory access 9071b0b00e3SLawrence Tang ErrorLossOfLockstep = 20, 9081b0b00e3SLawrence Tang ErrorResponseInvalid = 21, // Response not associated with request 9091b0b00e3SLawrence Tang ErrorParity = 22, 9101b0b00e3SLawrence Tang ErrorProtocol = 23, 9111b0b00e3SLawrence Tang ErrorPath = 24, // Detected path error 9121b0b00e3SLawrence Tang ErrorTimeout = 25, // Bus timeout 9131b0b00e3SLawrence Tang ErrorPoisoned = 26 // Read data poisoned 9141b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_STATUS_ERROR_TYPE; 9151b0b00e3SLawrence Tang 9161b0b00e3SLawrence Tang /// 9171b0b00e3SLawrence Tang /// Validation bit mask indicates which fields in the memory error record are valid 9181b0b00e3SLawrence Tang /// in Memory Error section 9191b0b00e3SLawrence Tang ///@{ 9201b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID BIT0 9211b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID BIT1 9221b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID BIT2 9231b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_NODE_VALID BIT3 9241b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_CARD_VALID BIT4 9251b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5 9261b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_BANK_VALID BIT6 9271b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_DEVICE_VALID BIT7 9281b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ROW_VALID BIT8 9291b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_COLUMN_VALID BIT9 9301b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_BIT_POS_VALID BIT10 9311b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID BIT11 9321b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID BIT12 9331b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_TARGET_ID_VALID BIT13 9341b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID BIT14 9351b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID BIT15 9361b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID BIT16 9371b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT17 9381b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID BIT18 9391b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID BIT19 9401b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_BANK_ADDRESS_VALID BIT20 9411b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_CHIP_IDENTIFICATION_VALID BIT21 9421b0b00e3SLawrence Tang ///@} 9431b0b00e3SLawrence Tang 9441b0b00e3SLawrence Tang /// 9451b0b00e3SLawrence Tang /// Memory Error Type identifies the type of error that occurred in Memory 9461b0b00e3SLawrence Tang /// Error section 9471b0b00e3SLawrence Tang ///@{ 9481b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN 0x00 9491b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_NONE 0x01 9501b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC 0x02 9511b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC 0x03 9521b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL 0x04 9531b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL 0x05 9541b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT 0x06 9551b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT 0x07 9561b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_PARITY 0x08 9571b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_WDT 0x09 9581b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS 0x0A 9591b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED 0x0B 9601b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SPARING 0x0C 9611b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED 0x0D 9621b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED 0x0E 9631b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT 0x0F 9641b0b00e3SLawrence Tang ///@} 9651b0b00e3SLawrence Tang 9661b0b00e3SLawrence Tang /// 9671b0b00e3SLawrence Tang /// Memory Error Section 9681b0b00e3SLawrence Tang /// 9691b0b00e3SLawrence Tang typedef struct { 9701b0b00e3SLawrence Tang UINT64 ValidFields; 9711b0b00e3SLawrence Tang EFI_GENERIC_ERROR_STATUS ErrorStatus; 9721b0b00e3SLawrence Tang UINT64 PhysicalAddress; // Error physical address 9731b0b00e3SLawrence Tang UINT64 PhysicalAddressMask; // Grnaularity 9741b0b00e3SLawrence Tang UINT16 Node; // Node # 9751b0b00e3SLawrence Tang UINT16 Card; 9761b0b00e3SLawrence Tang UINT16 ModuleRank; // Module or Rank# 9771b0b00e3SLawrence Tang UINT16 Bank; 9781b0b00e3SLawrence Tang UINT16 Device; 9791b0b00e3SLawrence Tang UINT16 Row; 9801b0b00e3SLawrence Tang UINT16 Column; 9811b0b00e3SLawrence Tang UINT16 BitPosition; 9821b0b00e3SLawrence Tang UINT64 RequestorId; 9831b0b00e3SLawrence Tang UINT64 ResponderId; 9841b0b00e3SLawrence Tang UINT64 TargetId; 9851b0b00e3SLawrence Tang UINT8 ErrorType; 9861b0b00e3SLawrence Tang UINT8 Extended; 9871b0b00e3SLawrence Tang UINT16 RankNum; 9881b0b00e3SLawrence Tang UINT16 CardHandle; 9891b0b00e3SLawrence Tang UINT16 ModuleHandle; 9901b0b00e3SLawrence Tang } EFI_PLATFORM_MEMORY_ERROR_DATA; 9911b0b00e3SLawrence Tang 9921b0b00e3SLawrence Tang /// 9931b0b00e3SLawrence Tang /// Validation bit mask indicates which fields in the memory error record 2 are valid 9941b0b00e3SLawrence Tang /// in Memory Error section 2 9951b0b00e3SLawrence Tang ///@{ 9961b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_STATUS_VALID BIT0 9971b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_VALID BIT1 9981b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_MASK_VALID BIT2 9991b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_NODE_VALID BIT3 10001b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CARD_VALID BIT4 10011b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5 10021b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_VALID BIT6 10031b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_DEVICE_VALID BIT7 10041b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ROW_VALID BIT8 10051b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_COLUMN_VALID BIT9 10061b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_RANK_VALID BIT10 10071b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BIT_POS_VALID BIT11 10081b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CHIP_ID_VALID BIT12 10091b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MEMORY_ERROR_TYPE_VALID BIT13 10101b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_STATUS_VALID BIT14 10111b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_REQUESTOR_ID_VALID BIT15 10121b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_RESPONDER_ID_VALID BIT16 10131b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID BIT17 10141b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID BIT18 10151b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID BIT19 10161b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_GROUP_VALID BIT20 10171b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_ADDRESS_VALID BIT21 10181b0b00e3SLawrence Tang ///@} 10191b0b00e3SLawrence Tang 10201b0b00e3SLawrence Tang /// 10211b0b00e3SLawrence Tang /// Memory Error Type identifies the type of error that occurred in Memory 10221b0b00e3SLawrence Tang /// Error section 2 10231b0b00e3SLawrence Tang ///@{ 10241b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_UNKNOWN 0x00 10251b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_NONE 0x01 10261b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SINGLEBIT_ECC 0x02 10271b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MLTIBIT_ECC 0x03 10281b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SINGLESYMBOL_CHIPKILL 0x04 10291b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MULTISYMBOL_CHIPKILL 0x05 10301b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MASTER_ABORT 0x06 10311b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_TARGET_ABORT 0x07 10321b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_PARITY 0x08 10331b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_WDT 0x09 10341b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_INVALID_ADDRESS 0x0A 10351b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MIRROR_BROKEN 0x0B 10361b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_SPARING 0x0C 10371b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_CORRECTED 0x0D 10381b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_UNCORRECTED 0x0E 10391b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_MAP_EVENT 0x0F 10401b0b00e3SLawrence Tang ///@} 10411b0b00e3SLawrence Tang 10421b0b00e3SLawrence Tang /// 10431b0b00e3SLawrence Tang /// Memory Error Section 2 10441b0b00e3SLawrence Tang /// 10451b0b00e3SLawrence Tang typedef struct { 10461b0b00e3SLawrence Tang UINT64 ValidFields; 10471b0b00e3SLawrence Tang EFI_GENERIC_ERROR_STATUS ErrorStatus; 10481b0b00e3SLawrence Tang UINT64 PhysicalAddress; // Error physical address 10491b0b00e3SLawrence Tang UINT64 PhysicalAddressMask; // Grnaularity 10501b0b00e3SLawrence Tang UINT16 Node; // Node # 10511b0b00e3SLawrence Tang UINT16 Card; 10521b0b00e3SLawrence Tang UINT16 Module; // Module or Rank# 10531b0b00e3SLawrence Tang UINT16 Bank; 10541b0b00e3SLawrence Tang UINT32 Device; 10551b0b00e3SLawrence Tang UINT32 Row; 10561b0b00e3SLawrence Tang UINT32 Column; 10571b0b00e3SLawrence Tang UINT32 Rank; 10581b0b00e3SLawrence Tang UINT32 BitPosition; 10591b0b00e3SLawrence Tang UINT8 ChipId; 10601b0b00e3SLawrence Tang UINT8 MemErrorType; 10611b0b00e3SLawrence Tang UINT8 Status; 10621b0b00e3SLawrence Tang UINT8 Reserved; 10631b0b00e3SLawrence Tang UINT64 RequestorId; 10641b0b00e3SLawrence Tang UINT64 ResponderId; 10651b0b00e3SLawrence Tang UINT64 TargetId; 10661b0b00e3SLawrence Tang UINT32 CardHandle; 10671b0b00e3SLawrence Tang UINT32 ModuleHandle; 10681b0b00e3SLawrence Tang } EFI_PLATFORM_MEMORY2_ERROR_DATA; 10691b0b00e3SLawrence Tang 10701b0b00e3SLawrence Tang /// 10711b0b00e3SLawrence Tang /// Validation bits mask indicates which of the following fields is valid 10721b0b00e3SLawrence Tang /// in PCI Express Error Record. 10731b0b00e3SLawrence Tang ///@{ 10741b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_TYPE_VALID BIT0 10751b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_VERSION_VALID BIT1 10761b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_COMMAND_STATUS_VALID BIT2 10771b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_DEVICE_ID_VALID BIT3 10781b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4 10791b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5 10801b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID BIT6 10811b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_AER_INFO_VALID BIT7 10821b0b00e3SLawrence Tang ///@} 10831b0b00e3SLawrence Tang 10841b0b00e3SLawrence Tang /// 10851b0b00e3SLawrence Tang /// PCIe Device/Port Type as defined in the PCI Express capabilities register 10861b0b00e3SLawrence Tang ///@{ 10871b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT 0x00000000 10881b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT 0x00000001 10891b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_PORT 0x00000004 10901b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT 0x00000005 10911b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT 0x00000006 10921b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE 0x00000007 10931b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE 0x00000008 10941b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT 0x00000009 10951b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR 0x0000000A 10961b0b00e3SLawrence Tang ///@} 10971b0b00e3SLawrence Tang 10981b0b00e3SLawrence Tang /// 10991b0b00e3SLawrence Tang /// PCI Slot number 11001b0b00e3SLawrence Tang /// 11011b0b00e3SLawrence Tang typedef struct { 11021b0b00e3SLawrence Tang UINT16 Resv1 : 3; 11031b0b00e3SLawrence Tang UINT16 Number : 13; 11041b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCI_SLOT; 11051b0b00e3SLawrence Tang 11061b0b00e3SLawrence Tang /// 11071b0b00e3SLawrence Tang /// PCIe Root Port PCI/bridge PCI compatible device number and 11081b0b00e3SLawrence Tang /// bus number information to uniquely identify the root port or 11091b0b00e3SLawrence Tang /// bridge. Default values for both the bus numbers is zero. 11101b0b00e3SLawrence Tang /// 11111b0b00e3SLawrence Tang typedef struct { 11121b0b00e3SLawrence Tang UINT16 VendorId; 11131b0b00e3SLawrence Tang UINT16 DeviceId; 11141b0b00e3SLawrence Tang UINT8 ClassCode[3]; 11151b0b00e3SLawrence Tang UINT8 Function; 11161b0b00e3SLawrence Tang UINT8 Device; 11171b0b00e3SLawrence Tang UINT16 Segment; 11181b0b00e3SLawrence Tang UINT8 PrimaryOrDeviceBus; 11191b0b00e3SLawrence Tang UINT8 SecondaryBus; 11201b0b00e3SLawrence Tang EFI_GENERIC_ERROR_PCI_SLOT Slot; 11211b0b00e3SLawrence Tang UINT8 Resv1; 11221b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID; 11231b0b00e3SLawrence Tang 11241b0b00e3SLawrence Tang /// 11251b0b00e3SLawrence Tang /// PCIe Capability Structure 11261b0b00e3SLawrence Tang /// 11271b0b00e3SLawrence Tang typedef struct { 11281b0b00e3SLawrence Tang UINT8 PcieCap[60]; 11291b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA_CAPABILITY; 11301b0b00e3SLawrence Tang 11311b0b00e3SLawrence Tang /// 11321b0b00e3SLawrence Tang /// PCIe Advanced Error Reporting Extended Capability Structure. 11331b0b00e3SLawrence Tang /// 11341b0b00e3SLawrence Tang typedef struct { 11351b0b00e3SLawrence Tang UINT8 PcieAer[96]; 11361b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA_AER; 11371b0b00e3SLawrence Tang 11381b0b00e3SLawrence Tang /// 11391b0b00e3SLawrence Tang /// PCI Express Error Record 11401b0b00e3SLawrence Tang /// 11411b0b00e3SLawrence Tang typedef struct { 11421b0b00e3SLawrence Tang UINT64 ValidFields; 11431b0b00e3SLawrence Tang UINT32 PortType; 11441b0b00e3SLawrence Tang UINT32 Version; 11451b0b00e3SLawrence Tang UINT32 CommandStatus; 11461b0b00e3SLawrence Tang UINT32 Resv2; 11471b0b00e3SLawrence Tang EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID DevBridge; 11481b0b00e3SLawrence Tang UINT64 SerialNo; 11491b0b00e3SLawrence Tang UINT32 BridgeControlStatus; 11501b0b00e3SLawrence Tang EFI_PCIE_ERROR_DATA_CAPABILITY Capability; 11511b0b00e3SLawrence Tang EFI_PCIE_ERROR_DATA_AER AerInfo; 11521b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA; 11531b0b00e3SLawrence Tang 11541b0b00e3SLawrence Tang /// 11551b0b00e3SLawrence Tang /// Validation bits Indicates which of the following fields is valid 11561b0b00e3SLawrence Tang /// in PCI/PCI-X Bus Error Section. 11571b0b00e3SLawrence Tang ///@{ 11581b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID BIT0 11591b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID BIT1 11601b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID BIT2 11611b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID BIT3 11621b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4 11631b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5 11641b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID BIT6 11651b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID BIT7 11661b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID BIT8 11671b0b00e3SLawrence Tang ///@} 11681b0b00e3SLawrence Tang 11691b0b00e3SLawrence Tang /// 11701b0b00e3SLawrence Tang /// PCI Bus Error Type in PCI/PCI-X Bus Error Section 11711b0b00e3SLawrence Tang ///@{ 11721b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN 0x0000 11731b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY 0x0001 11741b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_SYSTEM 0x0002 11751b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT 0x0003 11761b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT 0x0004 11771b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY 0x0005 11781b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY 0x0006 11791b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY 0x0007 11801b0b00e3SLawrence Tang ///@} 11811b0b00e3SLawrence Tang 11821b0b00e3SLawrence Tang /// 11831b0b00e3SLawrence Tang /// PCI/PCI-X Bus Error Section 11841b0b00e3SLawrence Tang /// 11851b0b00e3SLawrence Tang typedef struct { 11861b0b00e3SLawrence Tang UINT64 ValidFields; 11871b0b00e3SLawrence Tang EFI_GENERIC_ERROR_STATUS ErrorStatus; 11881b0b00e3SLawrence Tang UINT16 Type; 11891b0b00e3SLawrence Tang UINT16 BusId; 11901b0b00e3SLawrence Tang UINT32 Resv2; 11911b0b00e3SLawrence Tang UINT64 BusAddress; 11921b0b00e3SLawrence Tang UINT64 BusData; 11931b0b00e3SLawrence Tang UINT64 BusCommand; 11941b0b00e3SLawrence Tang UINT64 RequestorId; 11951b0b00e3SLawrence Tang UINT64 ResponderId; 11961b0b00e3SLawrence Tang UINT64 TargetId; 11971b0b00e3SLawrence Tang } EFI_PCI_PCIX_BUS_ERROR_DATA; 11981b0b00e3SLawrence Tang 11991b0b00e3SLawrence Tang /// 12001b0b00e3SLawrence Tang /// Validation bits Indicates which of the following fields is valid 12011b0b00e3SLawrence Tang /// in PCI/PCI-X Component Error Section. 12021b0b00e3SLawrence Tang ///@{ 12031b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID BIT0 12041b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID BIT1 12051b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID BIT2 12061b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID BIT3 12071b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID BIT4 12081b0b00e3SLawrence Tang ///@} 12091b0b00e3SLawrence Tang 12101b0b00e3SLawrence Tang /// 12111b0b00e3SLawrence Tang /// PCI/PCI-X Device Identification Information 12121b0b00e3SLawrence Tang /// 12131b0b00e3SLawrence Tang typedef struct { 12141b0b00e3SLawrence Tang UINT16 VendorId; 12151b0b00e3SLawrence Tang UINT16 DeviceId; 12161b0b00e3SLawrence Tang UINT8 ClassCode[3]; 12171b0b00e3SLawrence Tang UINT8 Function; 12181b0b00e3SLawrence Tang UINT8 Device; 12191b0b00e3SLawrence Tang UINT8 Bus; 12201b0b00e3SLawrence Tang UINT8 Segment; 12211b0b00e3SLawrence Tang UINT8 Resv1; 12221b0b00e3SLawrence Tang UINT32 Resv2; 12231b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCI_DEVICE_ID; 12241b0b00e3SLawrence Tang 12251b0b00e3SLawrence Tang /// 12261b0b00e3SLawrence Tang /// Identifies the type of firmware error record 12271b0b00e3SLawrence Tang ///@{ 12281b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL 0x00 12291b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE1 0x01 12301b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE2 0x02 12311b0b00e3SLawrence Tang ///@} 12321b0b00e3SLawrence Tang 12331b0b00e3SLawrence Tang /// 12341b0b00e3SLawrence Tang /// Firmware Error Record Section 12351b0b00e3SLawrence Tang /// 12361b0b00e3SLawrence Tang typedef struct { 12371b0b00e3SLawrence Tang UINT8 ErrorType; 12381b0b00e3SLawrence Tang UINT8 Revision; 12391b0b00e3SLawrence Tang UINT8 Resv1[6]; 12401b0b00e3SLawrence Tang UINT64 RecordId; 12411b0b00e3SLawrence Tang EFI_GUID RecordIdGuid; 12421b0b00e3SLawrence Tang } EFI_FIRMWARE_ERROR_DATA; 12431b0b00e3SLawrence Tang 12441b0b00e3SLawrence Tang /// 12451b0b00e3SLawrence Tang /// Fault Reason in DMAr Generic Error Section 12461b0b00e3SLawrence Tang ///@{ 12471b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT 0x01 12481b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID 0x02 12491b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR 0x03 12501b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE 0x04 12511b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE 0x05 12521b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_ACCESS 0x06 12531b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_REQUEST 0x07 12541b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR 0x08 12551b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE 0x09 12561b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_COMMAOND 0x0A 12571b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR 0x0B 12581b0b00e3SLawrence Tang ///@} 12591b0b00e3SLawrence Tang 12601b0b00e3SLawrence Tang /// 12611b0b00e3SLawrence Tang /// DMA access type in DMAr Generic Error Section 12621b0b00e3SLawrence Tang ///@{ 12631b0b00e3SLawrence Tang #define EFI_DMA_ACCESS_TYPE_READ 0x00 12641b0b00e3SLawrence Tang #define EFI_DMA_ACCESS_TYPE_WRITE 0x01 12651b0b00e3SLawrence Tang ///@} 12661b0b00e3SLawrence Tang 12671b0b00e3SLawrence Tang /// 12681b0b00e3SLawrence Tang /// DMA address type in DMAr Generic Error Section 12691b0b00e3SLawrence Tang ///@{ 12701b0b00e3SLawrence Tang #define EFI_DMA_ADDRESS_UNTRANSLATED 0x00 12711b0b00e3SLawrence Tang #define EFI_DMA_ADDRESS_TRANSLATION 0x01 12721b0b00e3SLawrence Tang ///@} 12731b0b00e3SLawrence Tang 12741b0b00e3SLawrence Tang /// 12751b0b00e3SLawrence Tang /// Architecture type in DMAr Generic Error Section 12761b0b00e3SLawrence Tang ///@{ 12771b0b00e3SLawrence Tang #define EFI_DMA_ARCH_TYPE_VT 0x01 12781b0b00e3SLawrence Tang #define EFI_DMA_ARCH_TYPE_IOMMU 0x02 12791b0b00e3SLawrence Tang ///@} 12801b0b00e3SLawrence Tang 12811b0b00e3SLawrence Tang /// 12821b0b00e3SLawrence Tang /// DMAr Generic Error Section 12831b0b00e3SLawrence Tang /// 12841b0b00e3SLawrence Tang typedef struct { 12851b0b00e3SLawrence Tang UINT16 RequesterId; 12861b0b00e3SLawrence Tang UINT16 SegmentNumber; 12871b0b00e3SLawrence Tang UINT8 FaultReason; 12881b0b00e3SLawrence Tang UINT8 AccessType; 12891b0b00e3SLawrence Tang UINT8 AddressType; 12901b0b00e3SLawrence Tang UINT8 ArchType; 12911b0b00e3SLawrence Tang UINT64 DeviceAddr; 12921b0b00e3SLawrence Tang UINT8 Resv1[16]; 12931b0b00e3SLawrence Tang } EFI_DMAR_GENERIC_ERROR_DATA; 12941b0b00e3SLawrence Tang 12951b0b00e3SLawrence Tang /// 12961b0b00e3SLawrence Tang /// Intel VT for Directed I/O specific DMAr Errors 12971b0b00e3SLawrence Tang /// 12981b0b00e3SLawrence Tang typedef struct { 12991b0b00e3SLawrence Tang UINT8 Version; 13001b0b00e3SLawrence Tang UINT8 Revision; 13011b0b00e3SLawrence Tang UINT8 OemId[6]; 13021b0b00e3SLawrence Tang UINT64 Capability; 13031b0b00e3SLawrence Tang UINT64 CapabilityEx; 13041b0b00e3SLawrence Tang UINT32 GlobalCommand; 13051b0b00e3SLawrence Tang UINT32 GlobalStatus; 13061b0b00e3SLawrence Tang UINT32 FaultStatus; 13071b0b00e3SLawrence Tang UINT8 Resv1[12]; 13081b0b00e3SLawrence Tang UINT64 FaultRecord[2]; 13091b0b00e3SLawrence Tang UINT64 RootEntry[2]; 13101b0b00e3SLawrence Tang UINT64 ContextEntry[2]; 13111b0b00e3SLawrence Tang UINT64 PteL6; 13121b0b00e3SLawrence Tang UINT64 PteL5; 13131b0b00e3SLawrence Tang UINT64 PteL4; 13141b0b00e3SLawrence Tang UINT64 PteL3; 13151b0b00e3SLawrence Tang UINT64 PteL2; 13161b0b00e3SLawrence Tang UINT64 PteL1; 13171b0b00e3SLawrence Tang } EFI_DIRECTED_IO_DMAR_ERROR_DATA; 13181b0b00e3SLawrence Tang 13191b0b00e3SLawrence Tang /// 13201b0b00e3SLawrence Tang /// IOMMU specific DMAr Errors 13211b0b00e3SLawrence Tang /// 13221b0b00e3SLawrence Tang typedef struct { 13231b0b00e3SLawrence Tang UINT8 Revision; 13241b0b00e3SLawrence Tang UINT8 Resv1[7]; 13251b0b00e3SLawrence Tang UINT64 Control; 13261b0b00e3SLawrence Tang UINT64 Status; 13271b0b00e3SLawrence Tang UINT8 Resv2[8]; 13281b0b00e3SLawrence Tang UINT64 EventLogEntry[2]; 13291b0b00e3SLawrence Tang UINT8 Resv3[16]; 13301b0b00e3SLawrence Tang UINT64 DeviceTableEntry[4]; 13311b0b00e3SLawrence Tang UINT64 PteL6; 13321b0b00e3SLawrence Tang UINT64 PteL5; 13331b0b00e3SLawrence Tang UINT64 PteL4; 13341b0b00e3SLawrence Tang UINT64 PteL3; 13351b0b00e3SLawrence Tang UINT64 PteL2; 13361b0b00e3SLawrence Tang UINT64 PteL1; 13371b0b00e3SLawrence Tang } EFI_IOMMU_DMAR_ERROR_DATA; 13381b0b00e3SLawrence Tang 13391b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeCmcGuid; 13401b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeCpeGuid; 13411b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeMceGuid; 13421b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypePcieGuid; 13431b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeInitGuid; 13441b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeNmiGuid; 13451b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeBootGuid; 13461b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeDmarGuid; 13471b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeSeaGuid; 13481b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeSeiGuid; 13491b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypePeiGuid; 13501b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeCxlGuid; 13511b0b00e3SLawrence Tang extern EFI_GUID gEfiProcessorGenericErrorSectionGuid; 13521b0b00e3SLawrence Tang extern EFI_GUID gEfiProcessorSpecificErrorSectionGuid; 13531b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ProcessorErrorSectionGuid; 1354cc0f5f38SLawrence Tang extern EFI_GUID gEfiIpfProcessorErrorSectionGuid; 13551b0b00e3SLawrence Tang extern EFI_GUID gEfiArmProcessorErrorSectionGuid; 13561b0b00e3SLawrence Tang extern EFI_GUID gEfiPlatformMemoryErrorSectionGuid; 1357a0865e38SLawrence Tang extern EFI_GUID gEfiPlatformMemoryError2SectionGuid; 13581b0b00e3SLawrence Tang extern EFI_GUID gEfiPcieErrorSectionGuid; 13591b0b00e3SLawrence Tang extern EFI_GUID gEfiFirmwareErrorSectionGuid; 13601b0b00e3SLawrence Tang extern EFI_GUID gEfiPciBusErrorSectionGuid; 13611b0b00e3SLawrence Tang extern EFI_GUID gEfiPciDevErrorSectionGuid; 13621b0b00e3SLawrence Tang extern EFI_GUID gEfiDMArGenericErrorSectionGuid; 13631b0b00e3SLawrence Tang extern EFI_GUID gEfiDirectedIoDMArErrorSectionGuid; 13641b0b00e3SLawrence Tang extern EFI_GUID gEfiIommuDMArErrorSectionGuid; 1365864c0da9SLawrence Tang extern EFI_GUID gEfiCcixPerLogErrorSectionGuid; 1366b98ec66cSLawrence Tang extern EFI_GUID gEfiCxlProtocolErrorSectionGuid; 1367d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlGeneralMediaErrorSectionGuid; 1368d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlDramEventErrorSectionGuid; 1369d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlMemoryModuleErrorSectionGuid; 1370d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlPhysicalSwitchErrorSectionGuid; 1371d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlVirtualSwitchErrorSectionGuid; 1372d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlMldPortErrorSectionGuid; 13731b0b00e3SLawrence Tang #pragma pack() 13741b0b00e3SLawrence Tang 13751b0b00e3SLawrence Tang #if defined(MDE_CPU_IA32) || defined(MDE_CPU_X64) 13761b0b00e3SLawrence Tang /// 13771b0b00e3SLawrence Tang /// IA32 and x64 Specific definitions. 13781b0b00e3SLawrence Tang /// 13791b0b00e3SLawrence Tang 13801b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeCacheCheckGuid; 13811b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeTlbCheckGuid; 13821b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeBusCheckGuid; 13831b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeMsCheckGuid; 13841b0b00e3SLawrence Tang 13851b0b00e3SLawrence Tang #endif 13861b0b00e3SLawrence Tang 13871b0b00e3SLawrence Tang #endif 1388