11b0b00e3SLawrence Tang /** @file 21b0b00e3SLawrence Tang GUIDs and definitions used for Common Platform Error Record. 31b0b00e3SLawrence Tang 41b0b00e3SLawrence Tang Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR> 51b0b00e3SLawrence Tang (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR> 61b0b00e3SLawrence Tang SPDX-License-Identifier: BSD-2-Clause-Patent 71b0b00e3SLawrence Tang 81b0b00e3SLawrence Tang @par Revision Reference: 91b0b00e3SLawrence Tang GUIDs defined in UEFI 2.7 Specification. 101b0b00e3SLawrence Tang 111b0b00e3SLawrence Tang **/ 121b0b00e3SLawrence Tang #include "BaseTypes.h" 131b0b00e3SLawrence Tang 141b0b00e3SLawrence Tang #ifndef __CPER_GUID_H__ 151b0b00e3SLawrence Tang #define __CPER_GUID_H__ 161b0b00e3SLawrence Tang 171b0b00e3SLawrence Tang #pragma pack(1) 181b0b00e3SLawrence Tang 191b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_SIGNATURE_START SIGNATURE_32('C', 'P', 'E', 'R') 201b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_SIGNATURE_END 0xFFFFFFFF 211b0b00e3SLawrence Tang 221b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_REVISION 0x0101 231b0b00e3SLawrence Tang 241b0b00e3SLawrence Tang /// 251b0b00e3SLawrence Tang /// Error Severity in Error Record Header and Error Section Descriptor 261b0b00e3SLawrence Tang ///@{ 271b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_RECOVERABLE 0x00000000 281b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_FATAL 0x00000001 291b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_CORRECTED 0x00000002 301b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_INFO 0x00000003 311b0b00e3SLawrence Tang ///@} 321b0b00e3SLawrence Tang 331b0b00e3SLawrence Tang /// 341b0b00e3SLawrence Tang /// The validation bit mask indicates the validity of the following fields 351b0b00e3SLawrence Tang /// in Error Record Header. 361b0b00e3SLawrence Tang ///@{ 371b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID BIT0 381b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID BIT1 391b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID BIT2 401b0b00e3SLawrence Tang ///@} 411b0b00e3SLawrence Tang 421b0b00e3SLawrence Tang /// 431b0b00e3SLawrence Tang /// Timestamp is precise if this bit is set and correlates to the time of the 441b0b00e3SLawrence Tang /// error event. 451b0b00e3SLawrence Tang /// 461b0b00e3SLawrence Tang #define EFI_ERROR_TIME_STAMP_PRECISE BIT0 471b0b00e3SLawrence Tang 481b0b00e3SLawrence Tang /// 491b0b00e3SLawrence Tang /// The timestamp correlates to the time when the error information was collected 501b0b00e3SLawrence Tang /// by the system software and may not necessarily represent the time of the error 511b0b00e3SLawrence Tang /// event. The timestamp contains the local time in BCD format. 521b0b00e3SLawrence Tang /// 531b0b00e3SLawrence Tang typedef struct { 541b0b00e3SLawrence Tang UINT8 Seconds; 551b0b00e3SLawrence Tang UINT8 Minutes; 561b0b00e3SLawrence Tang UINT8 Hours; 571b0b00e3SLawrence Tang UINT8 Flag; 581b0b00e3SLawrence Tang UINT8 Day; 591b0b00e3SLawrence Tang UINT8 Month; 601b0b00e3SLawrence Tang UINT8 Year; 611b0b00e3SLawrence Tang UINT8 Century; 621b0b00e3SLawrence Tang } EFI_ERROR_TIME_STAMP; 631b0b00e3SLawrence Tang 641b0b00e3SLawrence Tang /// 651b0b00e3SLawrence Tang /// GUID value indicating the record association with an error event notification type. 661b0b00e3SLawrence Tang ///@{ 671b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \ 681b0b00e3SLawrence Tang { \ 691b0b00e3SLawrence Tang 0x2DCE8BB1, 0xBDD7, 0x450e, { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } \ 701b0b00e3SLawrence Tang } 711b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \ 721b0b00e3SLawrence Tang { \ 731b0b00e3SLawrence Tang 0x4E292F96, 0xD843, 0x4a55, { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } \ 741b0b00e3SLawrence Tang } 751b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \ 761b0b00e3SLawrence Tang { \ 771b0b00e3SLawrence Tang 0xE8F56FFE, 0x919C, 0x4cc5, { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } \ 781b0b00e3SLawrence Tang } 791b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \ 801b0b00e3SLawrence Tang { \ 811b0b00e3SLawrence Tang 0xCF93C01F, 0x1A16, 0x4dfc, { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } \ 821b0b00e3SLawrence Tang } 831b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \ 841b0b00e3SLawrence Tang { \ 851b0b00e3SLawrence Tang 0xCC5263E8, 0x9308, 0x454a, { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } \ 861b0b00e3SLawrence Tang } 871b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \ 881b0b00e3SLawrence Tang { \ 891b0b00e3SLawrence Tang 0x5BAD89FF, 0xB7E6, 0x42c9, { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } \ 901b0b00e3SLawrence Tang } 911b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \ 921b0b00e3SLawrence Tang { \ 931b0b00e3SLawrence Tang 0x3D61A466, 0xAB40, 0x409a, { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } \ 941b0b00e3SLawrence Tang } 951b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \ 961b0b00e3SLawrence Tang { \ 971b0b00e3SLawrence Tang 0x667DD791, 0xC6B3, 0x4c27, { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } \ 981b0b00e3SLawrence Tang } 991b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEA \ 1001b0b00e3SLawrence Tang { \ 1011b0b00e3SLawrence Tang 0x9A78788A, 0xBBE8, 0x11E4, { 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 } \ 1021b0b00e3SLawrence Tang } 1031b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEI \ 1041b0b00e3SLawrence Tang { \ 1051b0b00e3SLawrence Tang 0x5C284C81, 0xB0AE, 0x4E87, { 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 } \ 1061b0b00e3SLawrence Tang } 1071b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_PEI \ 1081b0b00e3SLawrence Tang { \ 1091b0b00e3SLawrence Tang 0x09A9D5AC, 0x5204, 0x4214, { 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD } \ 1101b0b00e3SLawrence Tang } 1111b0b00e3SLawrence Tang ///@} 1121b0b00e3SLawrence Tang 1131b0b00e3SLawrence Tang /// 1141b0b00e3SLawrence Tang /// Error Record Header Flags 1151b0b00e3SLawrence Tang ///@{ 1161b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_RECOVERED 0x00000001 1171b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_PREVERR 0x00000002 1181b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_SIMULATED 0x00000004 1191b0b00e3SLawrence Tang ///@} 1201b0b00e3SLawrence Tang 1211b0b00e3SLawrence Tang /// 1221b0b00e3SLawrence Tang /// Common error record header 1231b0b00e3SLawrence Tang /// 1241b0b00e3SLawrence Tang typedef struct { 1251b0b00e3SLawrence Tang UINT32 SignatureStart; 1261b0b00e3SLawrence Tang UINT16 Revision; 1271b0b00e3SLawrence Tang UINT32 SignatureEnd; 1281b0b00e3SLawrence Tang UINT16 SectionCount; 1291b0b00e3SLawrence Tang UINT32 ErrorSeverity; 1301b0b00e3SLawrence Tang UINT32 ValidationBits; 1311b0b00e3SLawrence Tang UINT32 RecordLength; 1321b0b00e3SLawrence Tang EFI_ERROR_TIME_STAMP TimeStamp; 1331b0b00e3SLawrence Tang EFI_GUID PlatformID; 1341b0b00e3SLawrence Tang EFI_GUID PartitionID; 1351b0b00e3SLawrence Tang EFI_GUID CreatorID; 1361b0b00e3SLawrence Tang EFI_GUID NotificationType; 1371b0b00e3SLawrence Tang UINT64 RecordID; 1381b0b00e3SLawrence Tang UINT32 Flags; 1391b0b00e3SLawrence Tang UINT64 PersistenceInfo; 1401b0b00e3SLawrence Tang UINT8 Resv1[12]; 1411b0b00e3SLawrence Tang /// 1421b0b00e3SLawrence Tang /// An array of SectionCount descriptors for the associated 1431b0b00e3SLawrence Tang /// sections. The number of valid sections is equivalent to the 1441b0b00e3SLawrence Tang /// SectionCount. The buffer size of the record may include 1451b0b00e3SLawrence Tang /// more space to dynamically add additional Section 1461b0b00e3SLawrence Tang /// Descriptors to the error record. 1471b0b00e3SLawrence Tang /// 1481b0b00e3SLawrence Tang } EFI_COMMON_ERROR_RECORD_HEADER; 1491b0b00e3SLawrence Tang 1501b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_REVISION 0x0100 1511b0b00e3SLawrence Tang 1521b0b00e3SLawrence Tang /// 1531b0b00e3SLawrence Tang /// Validity Fields in Error Section Descriptor. 1541b0b00e3SLawrence Tang /// 1551b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FRU_ID_VALID BIT0 1561b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FRU_STRING_VALID BIT1 1571b0b00e3SLawrence Tang 1581b0b00e3SLawrence Tang /// 1591b0b00e3SLawrence Tang /// Flag field contains information that describes the error section 1601b0b00e3SLawrence Tang /// in Error Section Descriptor. 1611b0b00e3SLawrence Tang /// 1621b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_PRIMARY BIT0 1631b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING BIT1 1641b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_RESET BIT2 1651b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED BIT3 1661b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4 1671b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5 1681b0b00e3SLawrence Tang 1691b0b00e3SLawrence Tang /// 1701b0b00e3SLawrence Tang /// Error Sectition Type GUIDs in Error Section Descriptor 1711b0b00e3SLawrence Tang ///@{ 1721b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \ 1731b0b00e3SLawrence Tang { \ 1741b0b00e3SLawrence Tang 0x9876ccad, 0x47b4, 0x4bdb, { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } \ 1751b0b00e3SLawrence Tang } 1761b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \ 1771b0b00e3SLawrence Tang { \ 1781b0b00e3SLawrence Tang 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \ 1791b0b00e3SLawrence Tang } 1801b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \ 1811b0b00e3SLawrence Tang { \ 1821b0b00e3SLawrence Tang 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \ 1831b0b00e3SLawrence Tang } 1841b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \ 1851b0b00e3SLawrence Tang { \ 1861b0b00e3SLawrence Tang 0xe19e3d16, 0xbc11, 0x11e4, { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 } \ 1871b0b00e3SLawrence Tang } 1881b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \ 1891b0b00e3SLawrence Tang { \ 1901b0b00e3SLawrence Tang 0xa5bc1114, 0x6f64, 0x4ede, { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } \ 1911b0b00e3SLawrence Tang } 1921b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \ 1931b0b00e3SLawrence Tang { \ 1941b0b00e3SLawrence Tang 0x61EC04FC, 0x48E6, 0xD813, { 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 } \ 1951b0b00e3SLawrence Tang } 1961b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCIE_GUID \ 1971b0b00e3SLawrence Tang { \ 1981b0b00e3SLawrence Tang 0xd995e954, 0xbbc1, 0x430f, { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } \ 1991b0b00e3SLawrence Tang } 2001b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \ 2011b0b00e3SLawrence Tang { \ 2021b0b00e3SLawrence Tang 0x81212a96, 0x09ed, 0x4996, { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } \ 2031b0b00e3SLawrence Tang } 2041b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \ 2051b0b00e3SLawrence Tang { \ 2061b0b00e3SLawrence Tang 0xc5753963, 0x3b84, 0x4095, { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } \ 2071b0b00e3SLawrence Tang } 2081b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCI_DEVICE_GUID \ 2091b0b00e3SLawrence Tang { \ 2101b0b00e3SLawrence Tang 0xeb5e4685, 0xca66, 0x4769, { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } \ 2111b0b00e3SLawrence Tang } 2121b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \ 2131b0b00e3SLawrence Tang { \ 2141b0b00e3SLawrence Tang 0x5b51fef7, 0xc79d, 0x4434, { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } \ 2151b0b00e3SLawrence Tang } 2161b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \ 2171b0b00e3SLawrence Tang { \ 2181b0b00e3SLawrence Tang 0x71761d37, 0x32b2, 0x45cd, { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } \ 2191b0b00e3SLawrence Tang } 2201b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \ 2211b0b00e3SLawrence Tang { \ 2221b0b00e3SLawrence Tang 0x036f84e1, 0x7f37, 0x428c, { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } \ 2231b0b00e3SLawrence Tang } 2241b0b00e3SLawrence Tang ///@} 2251b0b00e3SLawrence Tang 2261b0b00e3SLawrence Tang /// 2271b0b00e3SLawrence Tang /// Error Section Descriptor 2281b0b00e3SLawrence Tang /// 2291b0b00e3SLawrence Tang typedef struct { 2301b0b00e3SLawrence Tang UINT32 SectionOffset; 2311b0b00e3SLawrence Tang UINT32 SectionLength; 2321b0b00e3SLawrence Tang UINT16 Revision; 2331b0b00e3SLawrence Tang UINT8 SecValidMask; 2341b0b00e3SLawrence Tang UINT8 Resv1; 2351b0b00e3SLawrence Tang UINT32 SectionFlags; 2361b0b00e3SLawrence Tang EFI_GUID SectionType; 2371b0b00e3SLawrence Tang EFI_GUID FruId; 2381b0b00e3SLawrence Tang UINT32 Severity; 2391b0b00e3SLawrence Tang CHAR8 FruString[20]; 2401b0b00e3SLawrence Tang } EFI_ERROR_SECTION_DESCRIPTOR; 2411b0b00e3SLawrence Tang 2421b0b00e3SLawrence Tang /// 2431b0b00e3SLawrence Tang /// The validation bit mask indicates whether or not each of the following fields are 2441b0b00e3SLawrence Tang /// valid in Proessor Generic Error section. 2451b0b00e3SLawrence Tang ///@{ 2461b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_VALID BIT0 2471b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_VALID BIT1 2481b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID BIT2 2491b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_VALID BIT3 2501b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4 2511b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5 2521b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_VERSION_VALID BIT6 2531b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_BRAND_VALID BIT7 2541b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ID_VALID BIT8 2551b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID BIT9 2561b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID BIT10 2571b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID BIT11 2581b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_INST_IP_VALID BIT12 2591b0b00e3SLawrence Tang ///@} 2601b0b00e3SLawrence Tang 2611b0b00e3SLawrence Tang /// 2621b0b00e3SLawrence Tang /// The type of the processor architecture in Proessor Generic Error section. 2631b0b00e3SLawrence Tang ///@{ 2641b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64 0x00 2651b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_IA64 0x01 2661b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 2671b0b00e3SLawrence Tang ///@} 2681b0b00e3SLawrence Tang 2691b0b00e3SLawrence Tang /// 2701b0b00e3SLawrence Tang /// The type of the instruction set executing when the error occurred in Proessor 2711b0b00e3SLawrence Tang /// Generic Error section. 2721b0b00e3SLawrence Tang ///@{ 2731b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_IA32 0x00 2741b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_IA64 0x01 2751b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_X64 0x02 2761b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A32_T32 0x03 2771b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A64 0x04 2781b0b00e3SLawrence Tang ///@} 2791b0b00e3SLawrence Tang 2801b0b00e3SLawrence Tang /// 2811b0b00e3SLawrence Tang /// The type of error that occurred in Proessor Generic Error section. 2821b0b00e3SLawrence Tang ///@{ 2831b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN 0x00 2841b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE 0x01 2851b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB 0x02 2861b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS 0x04 2871b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH 0x08 2881b0b00e3SLawrence Tang ///@} 2891b0b00e3SLawrence Tang 2901b0b00e3SLawrence Tang /// 2911b0b00e3SLawrence Tang /// The type of operation in Proessor Generic Error section. 2921b0b00e3SLawrence Tang ///@{ 2931b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC 0x00 2941b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ 0x01 2951b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE 0x02 2961b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC 0x03 2971b0b00e3SLawrence Tang ///@} 2981b0b00e3SLawrence Tang 2991b0b00e3SLawrence Tang /// 3001b0b00e3SLawrence Tang /// Flags bit mask indicates additional information about the error in Proessor Generic 3011b0b00e3SLawrence Tang /// Error section 3021b0b00e3SLawrence Tang ///@{ 3031b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE BIT0 3041b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP BIT1 3051b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW BIT2 3061b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED BIT3 3071b0b00e3SLawrence Tang ///@} 3081b0b00e3SLawrence Tang 3091b0b00e3SLawrence Tang /// 3101b0b00e3SLawrence Tang /// Processor Generic Error Section 3111b0b00e3SLawrence Tang /// describes processor reported hardware errors for logical processors in the system. 3121b0b00e3SLawrence Tang /// 3131b0b00e3SLawrence Tang typedef struct { 3141b0b00e3SLawrence Tang UINT64 ValidFields; 3151b0b00e3SLawrence Tang UINT8 Type; 3161b0b00e3SLawrence Tang UINT8 Isa; 3171b0b00e3SLawrence Tang UINT8 ErrorType; 3181b0b00e3SLawrence Tang UINT8 Operation; 3191b0b00e3SLawrence Tang UINT8 Flags; 3201b0b00e3SLawrence Tang UINT8 Level; 3211b0b00e3SLawrence Tang UINT16 Resv1; 3221b0b00e3SLawrence Tang UINT64 VersionInfo; 3231b0b00e3SLawrence Tang CHAR8 BrandString[128]; 3241b0b00e3SLawrence Tang UINT64 ApicId; 3251b0b00e3SLawrence Tang UINT64 TargetAddr; 3261b0b00e3SLawrence Tang UINT64 RequestorId; 3271b0b00e3SLawrence Tang UINT64 ResponderId; 3281b0b00e3SLawrence Tang UINT64 InstructionIP; 3291b0b00e3SLawrence Tang } EFI_PROCESSOR_GENERIC_ERROR_DATA; 3301b0b00e3SLawrence Tang 3311b0b00e3SLawrence Tang /// 3321b0b00e3SLawrence Tang /// IA32 and x64 Specific definitions. 3331b0b00e3SLawrence Tang /// 3341b0b00e3SLawrence Tang 3351b0b00e3SLawrence Tang /// 3361b0b00e3SLawrence Tang /// GUID value indicating the type of Processor Error Information structure 3371b0b00e3SLawrence Tang /// in IA32/X64 Processor Error Information Structure. 3381b0b00e3SLawrence Tang ///@{ 3391b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \ 3401b0b00e3SLawrence Tang { \ 3411b0b00e3SLawrence Tang 0xA55701F5, 0xE3EF, 0x43de, {0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } \ 3421b0b00e3SLawrence Tang } 3431b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \ 3441b0b00e3SLawrence Tang { \ 3451b0b00e3SLawrence Tang 0xFC06B535, 0x5E1F, 0x4562, {0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } \ 3461b0b00e3SLawrence Tang } 3471b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \ 3481b0b00e3SLawrence Tang { \ 3491b0b00e3SLawrence Tang 0x1CF3F8B3, 0xC5B1, 0x49a2, {0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } \ 3501b0b00e3SLawrence Tang } 3511b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \ 3521b0b00e3SLawrence Tang { \ 3531b0b00e3SLawrence Tang 0x48AB7F57, 0xDC34, 0x4f6c, {0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } \ 3541b0b00e3SLawrence Tang } 355794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeCacheCheckGuid; 356794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeTlbCheckGuid; 357794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeBusCheckGuid; 358794312c8SLawrence Tang extern EFI_GUID gEfiIa32x64ErrorTypeMsCheckGuid; 359794312c8SLawrence Tang 3601b0b00e3SLawrence Tang ///@} 3611b0b00e3SLawrence Tang 3621b0b00e3SLawrence Tang /// 3631b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the IA32/X64 Processor 3641b0b00e3SLawrence Tang /// Error Record structure are valid. 3651b0b00e3SLawrence Tang ///@{ 3661b0b00e3SLawrence Tang #define EFI_IA32_X64_PROCESSOR_ERROR_APIC_ID_VALID BIT0 3671b0b00e3SLawrence Tang #define EFI_IA32_X64_PROCESSOR_ERROR_CPU_ID_INFO_VALID BIT1 3681b0b00e3SLawrence Tang ///@} 3691b0b00e3SLawrence Tang 3701b0b00e3SLawrence Tang /// 3711b0b00e3SLawrence Tang /// IA32/X64 Processor Error Record 3721b0b00e3SLawrence Tang /// 3731b0b00e3SLawrence Tang typedef struct { 3741b0b00e3SLawrence Tang UINT64 ValidFields; 3751b0b00e3SLawrence Tang UINT64 ApicId; 3761b0b00e3SLawrence Tang UINT8 CpuIdInfo[48]; 3771b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESSOR_ERROR_RECORD; 3781b0b00e3SLawrence Tang 3791b0b00e3SLawrence Tang /// 3801b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the Cache Check structure 3811b0b00e3SLawrence Tang /// are valid. 3821b0b00e3SLawrence Tang ///@{ 3831b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID BIT0 3841b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_VALID BIT1 3851b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_LEVEL_VALID BIT2 3861b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID BIT3 3871b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4 3881b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5 3891b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_RESTARTABLE_VALID BIT6 3901b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OVERFLOW_VALID BIT7 3911b0b00e3SLawrence Tang ///@} 3921b0b00e3SLawrence Tang 3931b0b00e3SLawrence Tang /// 3941b0b00e3SLawrence Tang /// Type of cache error in the Cache Check structure 3951b0b00e3SLawrence Tang ///@{ 3961b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION 0 3971b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS 1 3981b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC 2 3991b0b00e3SLawrence Tang ///@} 4001b0b00e3SLawrence Tang 4011b0b00e3SLawrence Tang /// 4021b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the Cache 4031b0b00e3SLawrence Tang /// Check structure 4041b0b00e3SLawrence Tang ///@{ 4051b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC 0 4061b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ 1 4071b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 4081b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ 3 4091b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE 4 4101b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH 5 4111b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH 6 4121b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION 7 4131b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP 8 4141b0b00e3SLawrence Tang ///@} 4151b0b00e3SLawrence Tang 4161b0b00e3SLawrence Tang /// 4171b0b00e3SLawrence Tang /// IA32/X64 Cache Check Structure 4181b0b00e3SLawrence Tang /// 4191b0b00e3SLawrence Tang typedef struct { 4201b0b00e3SLawrence Tang UINT64 ValidFields : 16; 4211b0b00e3SLawrence Tang UINT64 TransactionType : 2; 4221b0b00e3SLawrence Tang UINT64 Operation : 4; 4231b0b00e3SLawrence Tang UINT64 Level : 3; 4241b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 4251b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 4261b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 4271b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 4281b0b00e3SLawrence Tang UINT64 Overflow : 1; 4291b0b00e3SLawrence Tang UINT64 Resv1 : 34; 4301b0b00e3SLawrence Tang } EFI_IA32_X64_CACHE_CHECK_INFO; 4311b0b00e3SLawrence Tang 4321b0b00e3SLawrence Tang /// 4331b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the TLB Check structure 4341b0b00e3SLawrence Tang /// are valid. 4351b0b00e3SLawrence Tang ///@{ 4361b0b00e3SLawrence Tang #define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID BIT0 4371b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_VALID BIT1 4381b0b00e3SLawrence Tang #define EFI_TLB_CHECK_LEVEL_VALID BIT2 4391b0b00e3SLawrence Tang #define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID BIT3 4401b0b00e3SLawrence Tang #define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4 4411b0b00e3SLawrence Tang #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5 4421b0b00e3SLawrence Tang #define EFI_TLB_CHECK_RESTARTABLE_VALID BIT6 4431b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OVERFLOW_VALID BIT7 4441b0b00e3SLawrence Tang ///@} 4451b0b00e3SLawrence Tang 4461b0b00e3SLawrence Tang /// 4471b0b00e3SLawrence Tang /// Type of cache error in the TLB Check structure 4481b0b00e3SLawrence Tang ///@{ 4491b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION 0 4501b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS 1 4511b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_GENERIC 2 4521b0b00e3SLawrence Tang ///@} 4531b0b00e3SLawrence Tang 4541b0b00e3SLawrence Tang /// 4551b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the TLB 4561b0b00e3SLawrence Tang /// Check structure 4571b0b00e3SLawrence Tang ///@{ 4581b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC 0 4591b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ 1 4601b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 4611b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ 3 4621b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE 4 4631b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH 5 4641b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH 6 4651b0b00e3SLawrence Tang ///@} 4661b0b00e3SLawrence Tang 4671b0b00e3SLawrence Tang /// 4681b0b00e3SLawrence Tang /// IA32/X64 TLB Check Structure 4691b0b00e3SLawrence Tang /// 4701b0b00e3SLawrence Tang typedef struct { 4711b0b00e3SLawrence Tang UINT64 ValidFields : 16; 4721b0b00e3SLawrence Tang UINT64 TransactionType : 2; 4731b0b00e3SLawrence Tang UINT64 Operation : 4; 4741b0b00e3SLawrence Tang UINT64 Level : 3; 4751b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 4761b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 4771b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 4781b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 4791b0b00e3SLawrence Tang UINT64 Overflow : 1; 4801b0b00e3SLawrence Tang UINT64 Resv1 : 34; 4811b0b00e3SLawrence Tang } EFI_IA32_X64_TLB_CHECK_INFO; 4821b0b00e3SLawrence Tang 4831b0b00e3SLawrence Tang /// 4841b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the MS Check structure 4851b0b00e3SLawrence Tang /// are valid. 4861b0b00e3SLawrence Tang ///@{ 4871b0b00e3SLawrence Tang #define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID BIT0 4881b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_VALID BIT1 4891b0b00e3SLawrence Tang #define EFI_BUS_CHECK_LEVEL_VALID BIT2 4901b0b00e3SLawrence Tang #define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID BIT3 4911b0b00e3SLawrence Tang #define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4 4921b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5 4931b0b00e3SLawrence Tang #define EFI_BUS_CHECK_RESTARTABLE_VALID BIT6 4941b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OVERFLOW_VALID BIT7 4951b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID BIT8 4961b0b00e3SLawrence Tang #define EFI_BUS_CHECK_TIME_OUT_VALID BIT9 4971b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_VALID BIT10 4981b0b00e3SLawrence Tang ///@} 4991b0b00e3SLawrence Tang 5001b0b00e3SLawrence Tang /// 5011b0b00e3SLawrence Tang /// Type of cache error in the Bus Check structure 5021b0b00e3SLawrence Tang ///@{ 5031b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION 0 5041b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS 1 5051b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_GENERIC 2 5061b0b00e3SLawrence Tang ///@} 5071b0b00e3SLawrence Tang 5081b0b00e3SLawrence Tang /// 5091b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the Bus 5101b0b00e3SLawrence Tang /// Check structure 5111b0b00e3SLawrence Tang ///@{ 5121b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC 0 5131b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ 1 5141b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 5151b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ 3 5161b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE 4 5171b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH 5 5181b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH 6 5191b0b00e3SLawrence Tang ///@} 5201b0b00e3SLawrence Tang 5211b0b00e3SLawrence Tang /// 5221b0b00e3SLawrence Tang /// Type of Participation 5231b0b00e3SLawrence Tang ///@{ 5241b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST 0 5251b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED 1 5261b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED 2 5271b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC 3 5281b0b00e3SLawrence Tang ///@} 5291b0b00e3SLawrence Tang 5301b0b00e3SLawrence Tang /// 5311b0b00e3SLawrence Tang /// Type of Address Space 5321b0b00e3SLawrence Tang ///@{ 5331b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY 0 5341b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED 1 5351b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO 2 5361b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER 3 5371b0b00e3SLawrence Tang ///@} 5381b0b00e3SLawrence Tang 5391b0b00e3SLawrence Tang /// 5401b0b00e3SLawrence Tang /// IA32/X64 Bus Check Structure 5411b0b00e3SLawrence Tang /// 5421b0b00e3SLawrence Tang typedef struct { 5431b0b00e3SLawrence Tang UINT64 ValidFields : 16; 5441b0b00e3SLawrence Tang UINT64 TransactionType : 2; 5451b0b00e3SLawrence Tang UINT64 Operation : 4; 5461b0b00e3SLawrence Tang UINT64 Level : 3; 5471b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 5481b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 5491b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 5501b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 5511b0b00e3SLawrence Tang UINT64 Overflow : 1; 5521b0b00e3SLawrence Tang UINT64 ParticipationType : 2; 5531b0b00e3SLawrence Tang UINT64 TimeOut : 1; 5541b0b00e3SLawrence Tang UINT64 AddressSpace : 2; 5551b0b00e3SLawrence Tang UINT64 Resv1 : 29; 5561b0b00e3SLawrence Tang } EFI_IA32_X64_BUS_CHECK_INFO; 5571b0b00e3SLawrence Tang 5581b0b00e3SLawrence Tang /// 5591b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the MS Check structure 5601b0b00e3SLawrence Tang /// are valid. 5611b0b00e3SLawrence Tang ///@{ 5621b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_VALID BIT0 5631b0b00e3SLawrence Tang #define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID BIT1 5641b0b00e3SLawrence Tang #define EFI_MS_CHECK_UNCORRECTED_VALID BIT2 5651b0b00e3SLawrence Tang #define EFI_MS_CHECK_PRECISE_IP_VALID BIT3 5661b0b00e3SLawrence Tang #define EFI_MS_CHECK_RESTARTABLE_VALID BIT4 5671b0b00e3SLawrence Tang #define EFI_MS_CHECK_OVERFLOW_VALID BIT5 5681b0b00e3SLawrence Tang ///@} 5691b0b00e3SLawrence Tang 5701b0b00e3SLawrence Tang /// 5711b0b00e3SLawrence Tang /// Error type identifies the operation that caused the error. 5721b0b00e3SLawrence Tang ///@{ 5731b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_NO 0 5741b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED 1 5751b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY 2 5761b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL 3 5771b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_FRC 4 5781b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED 5 5791b0b00e3SLawrence Tang ///@} 5801b0b00e3SLawrence Tang 5811b0b00e3SLawrence Tang /// 5821b0b00e3SLawrence Tang /// IA32/X64 MS Check Field Description 5831b0b00e3SLawrence Tang /// 5841b0b00e3SLawrence Tang typedef struct { 5851b0b00e3SLawrence Tang UINT64 ValidFields : 16; 5861b0b00e3SLawrence Tang UINT64 ErrorType : 3; 5871b0b00e3SLawrence Tang UINT64 ContextCorrupt : 1; 5881b0b00e3SLawrence Tang UINT64 ErrorUncorrected : 1; 5891b0b00e3SLawrence Tang UINT64 PreciseIp : 1; 5901b0b00e3SLawrence Tang UINT64 RestartableIp : 1; 5911b0b00e3SLawrence Tang UINT64 Overflow : 1; 5921b0b00e3SLawrence Tang UINT64 Resv1 : 40; 5931b0b00e3SLawrence Tang } EFI_IA32_X64_MS_CHECK_INFO; 5941b0b00e3SLawrence Tang 5951b0b00e3SLawrence Tang /// 5961b0b00e3SLawrence Tang /// IA32/X64 Check Information Item 5971b0b00e3SLawrence Tang /// 5981b0b00e3SLawrence Tang typedef union { 5991b0b00e3SLawrence Tang EFI_IA32_X64_CACHE_CHECK_INFO CacheCheck; 6001b0b00e3SLawrence Tang EFI_IA32_X64_TLB_CHECK_INFO TlbCheck; 6011b0b00e3SLawrence Tang EFI_IA32_X64_BUS_CHECK_INFO BusCheck; 6021b0b00e3SLawrence Tang EFI_IA32_X64_MS_CHECK_INFO MsCheck; 6031b0b00e3SLawrence Tang UINT64 Data64; 6041b0b00e3SLawrence Tang } EFI_IA32_X64_CHECK_INFO_ITEM; 6051b0b00e3SLawrence Tang 6061b0b00e3SLawrence Tang /// 6071b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the IA32/X64 Processor Error 6081b0b00e3SLawrence Tang /// Information Structure are valid. 6091b0b00e3SLawrence Tang ///@{ 6101b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID BIT0 6111b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID BIT1 6121b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID BIT2 6131b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID BIT3 6141b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4 6151b0b00e3SLawrence Tang ///@} 6161b0b00e3SLawrence Tang 6171b0b00e3SLawrence Tang /// 6181b0b00e3SLawrence Tang /// IA32/X64 Processor Error Information Structure 6191b0b00e3SLawrence Tang /// 6201b0b00e3SLawrence Tang typedef struct { 6211b0b00e3SLawrence Tang EFI_GUID ErrorType; 6221b0b00e3SLawrence Tang UINT64 ValidFields; 6231b0b00e3SLawrence Tang EFI_IA32_X64_CHECK_INFO_ITEM CheckInfo; 6241b0b00e3SLawrence Tang UINT64 TargetId; 6251b0b00e3SLawrence Tang UINT64 RequestorId; 6261b0b00e3SLawrence Tang UINT64 ResponderId; 6271b0b00e3SLawrence Tang UINT64 InstructionIP; 6281b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESS_ERROR_INFO; 6291b0b00e3SLawrence Tang 6301b0b00e3SLawrence Tang /// 6311b0b00e3SLawrence Tang /// IA32/X64 Processor Context Information Structure 6321b0b00e3SLawrence Tang /// 6331b0b00e3SLawrence Tang typedef struct { 6341b0b00e3SLawrence Tang UINT16 RegisterType; 6351b0b00e3SLawrence Tang UINT16 ArraySize; 6361b0b00e3SLawrence Tang UINT32 MsrAddress; 6371b0b00e3SLawrence Tang UINT64 MmRegisterAddress; 6381b0b00e3SLawrence Tang // 6391b0b00e3SLawrence Tang // This field will provide the contents of the actual registers or raw data. 6401b0b00e3SLawrence Tang // The number of Registers or size of the raw data reported is determined 6411b0b00e3SLawrence Tang // by (Array Size / 8) or otherwise specified by the context structure type 6421b0b00e3SLawrence Tang // definition. 6431b0b00e3SLawrence Tang // 6441b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESSOR_CONTEXT_INFO; 6451b0b00e3SLawrence Tang 6461b0b00e3SLawrence Tang /// 6471b0b00e3SLawrence Tang /// Register Context Type 6481b0b00e3SLawrence Tang ///@{ 6491b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED 0x0000 6501b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_MSR 0x0001 6511b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_IA32 0x0002 6521b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_X64 0x0003 6531b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_FXSAVE 0x0004 6541b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_DR_IA32 0x0005 6551b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_DR_X64 0x0006 6561b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_MEM_MAP 0x0007 6571b0b00e3SLawrence Tang ///@} 6581b0b00e3SLawrence Tang 6591b0b00e3SLawrence Tang /// 6601b0b00e3SLawrence Tang /// IA32 Register State 6611b0b00e3SLawrence Tang /// 6621b0b00e3SLawrence Tang typedef struct { 6631b0b00e3SLawrence Tang UINT32 Eax; 6641b0b00e3SLawrence Tang UINT32 Ebx; 6651b0b00e3SLawrence Tang UINT32 Ecx; 6661b0b00e3SLawrence Tang UINT32 Edx; 6671b0b00e3SLawrence Tang UINT32 Esi; 6681b0b00e3SLawrence Tang UINT32 Edi; 6691b0b00e3SLawrence Tang UINT32 Ebp; 6701b0b00e3SLawrence Tang UINT32 Esp; 6711b0b00e3SLawrence Tang UINT16 Cs; 6721b0b00e3SLawrence Tang UINT16 Ds; 6731b0b00e3SLawrence Tang UINT16 Ss; 6741b0b00e3SLawrence Tang UINT16 Es; 6751b0b00e3SLawrence Tang UINT16 Fs; 6761b0b00e3SLawrence Tang UINT16 Gs; 6771b0b00e3SLawrence Tang UINT32 Eflags; 6781b0b00e3SLawrence Tang UINT32 Eip; 6791b0b00e3SLawrence Tang UINT32 Cr0; 6801b0b00e3SLawrence Tang UINT32 Cr1; 6811b0b00e3SLawrence Tang UINT32 Cr2; 6821b0b00e3SLawrence Tang UINT32 Cr3; 6831b0b00e3SLawrence Tang UINT32 Cr4; 6841b0b00e3SLawrence Tang UINT32 Gdtr[2]; 6851b0b00e3SLawrence Tang UINT32 Idtr[2]; 6861b0b00e3SLawrence Tang UINT16 Ldtr; 6871b0b00e3SLawrence Tang UINT16 Tr; 6881b0b00e3SLawrence Tang } EFI_CONTEXT_IA32_REGISTER_STATE; 6891b0b00e3SLawrence Tang 6901b0b00e3SLawrence Tang /// 6911b0b00e3SLawrence Tang /// X64 Register State 6921b0b00e3SLawrence Tang /// 6931b0b00e3SLawrence Tang typedef struct { 6941b0b00e3SLawrence Tang UINT64 Rax; 6951b0b00e3SLawrence Tang UINT64 Rbx; 6961b0b00e3SLawrence Tang UINT64 Rcx; 6971b0b00e3SLawrence Tang UINT64 Rdx; 6981b0b00e3SLawrence Tang UINT64 Rsi; 6991b0b00e3SLawrence Tang UINT64 Rdi; 7001b0b00e3SLawrence Tang UINT64 Rbp; 7011b0b00e3SLawrence Tang UINT64 Rsp; 7021b0b00e3SLawrence Tang UINT64 R8; 7031b0b00e3SLawrence Tang UINT64 R9; 7041b0b00e3SLawrence Tang UINT64 R10; 7051b0b00e3SLawrence Tang UINT64 R11; 7061b0b00e3SLawrence Tang UINT64 R12; 7071b0b00e3SLawrence Tang UINT64 R13; 7081b0b00e3SLawrence Tang UINT64 R14; 7091b0b00e3SLawrence Tang UINT64 R15; 7101b0b00e3SLawrence Tang UINT16 Cs; 7111b0b00e3SLawrence Tang UINT16 Ds; 7121b0b00e3SLawrence Tang UINT16 Ss; 7131b0b00e3SLawrence Tang UINT16 Es; 7141b0b00e3SLawrence Tang UINT16 Fs; 7151b0b00e3SLawrence Tang UINT16 Gs; 7161b0b00e3SLawrence Tang UINT32 Resv1; 7171b0b00e3SLawrence Tang UINT64 Rflags; 7181b0b00e3SLawrence Tang UINT64 Rip; 7191b0b00e3SLawrence Tang UINT64 Cr0; 7201b0b00e3SLawrence Tang UINT64 Cr1; 7211b0b00e3SLawrence Tang UINT64 Cr2; 7221b0b00e3SLawrence Tang UINT64 Cr3; 7231b0b00e3SLawrence Tang UINT64 Cr4; 7241b0b00e3SLawrence Tang UINT64 Gdtr[2]; 7251b0b00e3SLawrence Tang UINT64 Idtr[2]; 7261b0b00e3SLawrence Tang UINT16 Ldtr; 7271b0b00e3SLawrence Tang UINT16 Tr; 7281b0b00e3SLawrence Tang } EFI_CONTEXT_X64_REGISTER_STATE; 7291b0b00e3SLawrence Tang 7301b0b00e3SLawrence Tang /// 7311b0b00e3SLawrence Tang /// The validation bit mask indicates each of the following field is in IA32/X64 7321b0b00e3SLawrence Tang /// Processor Error Section. 7331b0b00e3SLawrence Tang /// 7341b0b00e3SLawrence Tang typedef struct { 7351b0b00e3SLawrence Tang UINT64 ApicIdValid : 1; 7361b0b00e3SLawrence Tang UINT64 CpuIdInforValid : 1; 7371b0b00e3SLawrence Tang UINT64 ErrorInfoNum : 6; 7381b0b00e3SLawrence Tang UINT64 ContextNum : 6; 7391b0b00e3SLawrence Tang UINT64 Resv1 : 50; 7401b0b00e3SLawrence Tang } EFI_IA32_X64_VALID_BITS; 7411b0b00e3SLawrence Tang 7423d0e4f24SLawrence Tang /// 7431b0b00e3SLawrence Tang /// Error Status Fields 7441b0b00e3SLawrence Tang /// 7451b0b00e3SLawrence Tang typedef struct { 7461b0b00e3SLawrence Tang UINT64 Resv1 : 8; 7471b0b00e3SLawrence Tang UINT64 Type : 8; 7481b0b00e3SLawrence Tang UINT64 AddressSignal : 1; ///< Error in Address signals or in Address portion of transaction 7491b0b00e3SLawrence Tang UINT64 ControlSignal : 1; ///< Error in Control signals or in Control portion of transaction 7501b0b00e3SLawrence Tang UINT64 DataSignal : 1; ///< Error in Data signals or in Data portion of transaction 7511b0b00e3SLawrence Tang UINT64 DetectedByResponder : 1; ///< Error detected by responder 7521b0b00e3SLawrence Tang UINT64 DetectedByRequester : 1; ///< Error detected by requestor 7531b0b00e3SLawrence Tang UINT64 FirstError : 1; ///< First Error in the sequence - option field 7541b0b00e3SLawrence Tang UINT64 OverflowNotLogged : 1; ///< Additional errors were not logged due to lack of resources 7551b0b00e3SLawrence Tang UINT64 Resv2 : 41; 7561b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_STATUS; 7571b0b00e3SLawrence Tang 7581b0b00e3SLawrence Tang /// 759a0865e38SLawrence Tang /// CPER Generic Error Codes 760a0865e38SLawrence Tang /// 761a0865e38SLawrence Tang #define CPER_GENERIC_ERROR_TYPES_KEYS (int []){1, 16, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26} 762a0865e38SLawrence Tang #define CPER_GENERIC_ERROR_TYPES_VALUES (const char*[]){"ERR_INTERNAL", "ERR_BUS", "ERR_MEM", "ERR_TLB", \ 763a0865e38SLawrence Tang "ERR_CACHE", "ERR_FUNCTION", "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", "ERR_IMPROPER", "ERR_UNIMPL", \ 764a0865e38SLawrence Tang "ERR_LOL", "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED"} 765a0865e38SLawrence Tang #define CPER_GENERIC_ERROR_TYPES_DESCRIPTIONS (const char*[]){\ 766a0865e38SLawrence Tang "Error detected internal to the component.", \ 767a0865e38SLawrence Tang "Error detected in the bus.", \ 768a0865e38SLawrence Tang "Storage error in memory (DRAM).", \ 769a0865e38SLawrence Tang "Storage error in TLB.", \ 770a0865e38SLawrence Tang "Storage error in cache.", \ 771a0865e38SLawrence Tang "Error in one or more functional units.", \ 772a0865e38SLawrence Tang "Component failed self test.", \ 773a0865e38SLawrence Tang "Overflow or underflow of internal queue.", \ 774a0865e38SLawrence Tang "Virtual address not found on IO-TLB or IO-PDIR.", \ 775a0865e38SLawrence Tang "Improper access error.", \ 776a0865e38SLawrence Tang "Access to a memory address which is not mapped to any component.", \ 777a0865e38SLawrence Tang "Loss of Lockstep error.", \ 778a0865e38SLawrence Tang "Response not associated with a request.", \ 779a0865e38SLawrence Tang "Bus parity error (must also set the A, C, or D bits).", \ 780a0865e38SLawrence Tang "Detection of a protocol error.", \ 781a0865e38SLawrence Tang "Detection of a PATH_ERROR.", \ 782a0865e38SLawrence Tang "Bus operation timeout.", \ 783a0865e38SLawrence Tang "A read was issued to data that has been poisoned."} 784a0865e38SLawrence Tang 785a0865e38SLawrence Tang /// 7861b0b00e3SLawrence Tang /// Error Type 7871b0b00e3SLawrence Tang /// 7881b0b00e3SLawrence Tang typedef enum { 7891b0b00e3SLawrence Tang /// 7901b0b00e3SLawrence Tang /// General Internal errors 7911b0b00e3SLawrence Tang /// 7921b0b00e3SLawrence Tang ErrorInternal = 1, 7931b0b00e3SLawrence Tang ErrorBus = 16, 7941b0b00e3SLawrence Tang /// 7951b0b00e3SLawrence Tang /// Component Internal errors 7961b0b00e3SLawrence Tang /// 7971b0b00e3SLawrence Tang ErrorMemStorage = 4, // Error in memory device 7981b0b00e3SLawrence Tang ErrorTlbStorage = 5, // TLB error in cache 7991b0b00e3SLawrence Tang ErrorCacheStorage = 6, 8001b0b00e3SLawrence Tang ErrorFunctionalUnit = 7, 8011b0b00e3SLawrence Tang ErrorSelftest = 8, 8021b0b00e3SLawrence Tang ErrorOverflow = 9, 8031b0b00e3SLawrence Tang /// 8041b0b00e3SLawrence Tang /// Bus internal errors 8051b0b00e3SLawrence Tang /// 8061b0b00e3SLawrence Tang ErrorVirtualMap = 17, 8071b0b00e3SLawrence Tang ErrorAccessInvalid = 18, // Improper access 8081b0b00e3SLawrence Tang ErrorUnimplAccess = 19, // Unimplemented memory access 8091b0b00e3SLawrence Tang ErrorLossOfLockstep = 20, 8101b0b00e3SLawrence Tang ErrorResponseInvalid = 21, // Response not associated with request 8111b0b00e3SLawrence Tang ErrorParity = 22, 8121b0b00e3SLawrence Tang ErrorProtocol = 23, 8131b0b00e3SLawrence Tang ErrorPath = 24, // Detected path error 8141b0b00e3SLawrence Tang ErrorTimeout = 25, // Bus timeout 8151b0b00e3SLawrence Tang ErrorPoisoned = 26 // Read data poisoned 8161b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_STATUS_ERROR_TYPE; 8171b0b00e3SLawrence Tang 8181b0b00e3SLawrence Tang /// 8191b0b00e3SLawrence Tang /// Validation bit mask indicates which fields in the memory error record are valid 8201b0b00e3SLawrence Tang /// in Memory Error section 8211b0b00e3SLawrence Tang ///@{ 8221b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID BIT0 8231b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID BIT1 8241b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID BIT2 8251b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_NODE_VALID BIT3 8261b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_CARD_VALID BIT4 8271b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5 8281b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_BANK_VALID BIT6 8291b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_DEVICE_VALID BIT7 8301b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ROW_VALID BIT8 8311b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_COLUMN_VALID BIT9 8321b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_BIT_POS_VALID BIT10 8331b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID BIT11 8341b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID BIT12 8351b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_TARGET_ID_VALID BIT13 8361b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID BIT14 8371b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID BIT15 8381b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID BIT16 8391b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT17 8401b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID BIT18 8411b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID BIT19 8421b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_BANK_ADDRESS_VALID BIT20 8431b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_CHIP_IDENTIFICATION_VALID BIT21 8441b0b00e3SLawrence Tang ///@} 8451b0b00e3SLawrence Tang 8461b0b00e3SLawrence Tang /// 8471b0b00e3SLawrence Tang /// Memory Error Type identifies the type of error that occurred in Memory 8481b0b00e3SLawrence Tang /// Error section 8491b0b00e3SLawrence Tang ///@{ 8501b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN 0x00 8511b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_NONE 0x01 8521b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC 0x02 8531b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC 0x03 8541b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL 0x04 8551b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL 0x05 8561b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT 0x06 8571b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT 0x07 8581b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_PARITY 0x08 8591b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_WDT 0x09 8601b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS 0x0A 8611b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED 0x0B 8621b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SPARING 0x0C 8631b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED 0x0D 8641b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED 0x0E 8651b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT 0x0F 8661b0b00e3SLawrence Tang ///@} 8671b0b00e3SLawrence Tang 8681b0b00e3SLawrence Tang /// 8691b0b00e3SLawrence Tang /// Memory Error Section 8701b0b00e3SLawrence Tang /// 8711b0b00e3SLawrence Tang typedef struct { 8721b0b00e3SLawrence Tang UINT64 ValidFields; 8731b0b00e3SLawrence Tang EFI_GENERIC_ERROR_STATUS ErrorStatus; 8741b0b00e3SLawrence Tang UINT64 PhysicalAddress; // Error physical address 8751b0b00e3SLawrence Tang UINT64 PhysicalAddressMask; // Grnaularity 8761b0b00e3SLawrence Tang UINT16 Node; // Node # 8771b0b00e3SLawrence Tang UINT16 Card; 8781b0b00e3SLawrence Tang UINT16 ModuleRank; // Module or Rank# 8791b0b00e3SLawrence Tang UINT16 Bank; 8801b0b00e3SLawrence Tang UINT16 Device; 8811b0b00e3SLawrence Tang UINT16 Row; 8821b0b00e3SLawrence Tang UINT16 Column; 8831b0b00e3SLawrence Tang UINT16 BitPosition; 8841b0b00e3SLawrence Tang UINT64 RequestorId; 8851b0b00e3SLawrence Tang UINT64 ResponderId; 8861b0b00e3SLawrence Tang UINT64 TargetId; 8871b0b00e3SLawrence Tang UINT8 ErrorType; 8881b0b00e3SLawrence Tang UINT8 Extended; 8891b0b00e3SLawrence Tang UINT16 RankNum; 8901b0b00e3SLawrence Tang UINT16 CardHandle; 8911b0b00e3SLawrence Tang UINT16 ModuleHandle; 8921b0b00e3SLawrence Tang } EFI_PLATFORM_MEMORY_ERROR_DATA; 8931b0b00e3SLawrence Tang 8941b0b00e3SLawrence Tang /// 8951b0b00e3SLawrence Tang /// Validation bit mask indicates which fields in the memory error record 2 are valid 8961b0b00e3SLawrence Tang /// in Memory Error section 2 8971b0b00e3SLawrence Tang ///@{ 8981b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_STATUS_VALID BIT0 8991b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_VALID BIT1 9001b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_MASK_VALID BIT2 9011b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_NODE_VALID BIT3 9021b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CARD_VALID BIT4 9031b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5 9041b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_VALID BIT6 9051b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_DEVICE_VALID BIT7 9061b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ROW_VALID BIT8 9071b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_COLUMN_VALID BIT9 9081b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_RANK_VALID BIT10 9091b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BIT_POS_VALID BIT11 9101b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CHIP_ID_VALID BIT12 9111b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MEMORY_ERROR_TYPE_VALID BIT13 9121b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_STATUS_VALID BIT14 9131b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_REQUESTOR_ID_VALID BIT15 9141b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_RESPONDER_ID_VALID BIT16 9151b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID BIT17 9161b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID BIT18 9171b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID BIT19 9181b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_GROUP_VALID BIT20 9191b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_ADDRESS_VALID BIT21 9201b0b00e3SLawrence Tang ///@} 9211b0b00e3SLawrence Tang 9221b0b00e3SLawrence Tang /// 9231b0b00e3SLawrence Tang /// Memory Error Type identifies the type of error that occurred in Memory 9241b0b00e3SLawrence Tang /// Error section 2 9251b0b00e3SLawrence Tang ///@{ 9261b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_UNKNOWN 0x00 9271b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_NONE 0x01 9281b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SINGLEBIT_ECC 0x02 9291b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MLTIBIT_ECC 0x03 9301b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SINGLESYMBOL_CHIPKILL 0x04 9311b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MULTISYMBOL_CHIPKILL 0x05 9321b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MASTER_ABORT 0x06 9331b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_TARGET_ABORT 0x07 9341b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_PARITY 0x08 9351b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_WDT 0x09 9361b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_INVALID_ADDRESS 0x0A 9371b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MIRROR_BROKEN 0x0B 9381b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_SPARING 0x0C 9391b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_CORRECTED 0x0D 9401b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_UNCORRECTED 0x0E 9411b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_MAP_EVENT 0x0F 9421b0b00e3SLawrence Tang ///@} 9431b0b00e3SLawrence Tang 9441b0b00e3SLawrence Tang /// 9451b0b00e3SLawrence Tang /// Memory Error Section 2 9461b0b00e3SLawrence Tang /// 9471b0b00e3SLawrence Tang typedef struct { 9481b0b00e3SLawrence Tang UINT64 ValidFields; 9491b0b00e3SLawrence Tang EFI_GENERIC_ERROR_STATUS ErrorStatus; 9501b0b00e3SLawrence Tang UINT64 PhysicalAddress; // Error physical address 9511b0b00e3SLawrence Tang UINT64 PhysicalAddressMask; // Grnaularity 9521b0b00e3SLawrence Tang UINT16 Node; // Node # 9531b0b00e3SLawrence Tang UINT16 Card; 9541b0b00e3SLawrence Tang UINT16 Module; // Module or Rank# 9551b0b00e3SLawrence Tang UINT16 Bank; 9561b0b00e3SLawrence Tang UINT32 Device; 9571b0b00e3SLawrence Tang UINT32 Row; 9581b0b00e3SLawrence Tang UINT32 Column; 9591b0b00e3SLawrence Tang UINT32 Rank; 9601b0b00e3SLawrence Tang UINT32 BitPosition; 9611b0b00e3SLawrence Tang UINT8 ChipId; 9621b0b00e3SLawrence Tang UINT8 MemErrorType; 9631b0b00e3SLawrence Tang UINT8 Status; 9641b0b00e3SLawrence Tang UINT8 Reserved; 9651b0b00e3SLawrence Tang UINT64 RequestorId; 9661b0b00e3SLawrence Tang UINT64 ResponderId; 9671b0b00e3SLawrence Tang UINT64 TargetId; 9681b0b00e3SLawrence Tang UINT32 CardHandle; 9691b0b00e3SLawrence Tang UINT32 ModuleHandle; 9701b0b00e3SLawrence Tang } EFI_PLATFORM_MEMORY2_ERROR_DATA; 9711b0b00e3SLawrence Tang 9721b0b00e3SLawrence Tang /// 9731b0b00e3SLawrence Tang /// Validation bits mask indicates which of the following fields is valid 9741b0b00e3SLawrence Tang /// in PCI Express Error Record. 9751b0b00e3SLawrence Tang ///@{ 9761b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_TYPE_VALID BIT0 9771b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_VERSION_VALID BIT1 9781b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_COMMAND_STATUS_VALID BIT2 9791b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_DEVICE_ID_VALID BIT3 9801b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4 9811b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5 9821b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID BIT6 9831b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_AER_INFO_VALID BIT7 9841b0b00e3SLawrence Tang ///@} 9851b0b00e3SLawrence Tang 9861b0b00e3SLawrence Tang /// 9871b0b00e3SLawrence Tang /// PCIe Device/Port Type as defined in the PCI Express capabilities register 9881b0b00e3SLawrence Tang ///@{ 9891b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT 0x00000000 9901b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT 0x00000001 9911b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_PORT 0x00000004 9921b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT 0x00000005 9931b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT 0x00000006 9941b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE 0x00000007 9951b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE 0x00000008 9961b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT 0x00000009 9971b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR 0x0000000A 9981b0b00e3SLawrence Tang ///@} 9991b0b00e3SLawrence Tang 10001b0b00e3SLawrence Tang /// 10011b0b00e3SLawrence Tang /// PCI Slot number 10021b0b00e3SLawrence Tang /// 10031b0b00e3SLawrence Tang typedef struct { 10041b0b00e3SLawrence Tang UINT16 Resv1 : 3; 10051b0b00e3SLawrence Tang UINT16 Number : 13; 10061b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCI_SLOT; 10071b0b00e3SLawrence Tang 10081b0b00e3SLawrence Tang /// 10091b0b00e3SLawrence Tang /// PCIe Root Port PCI/bridge PCI compatible device number and 10101b0b00e3SLawrence Tang /// bus number information to uniquely identify the root port or 10111b0b00e3SLawrence Tang /// bridge. Default values for both the bus numbers is zero. 10121b0b00e3SLawrence Tang /// 10131b0b00e3SLawrence Tang typedef struct { 10141b0b00e3SLawrence Tang UINT16 VendorId; 10151b0b00e3SLawrence Tang UINT16 DeviceId; 10161b0b00e3SLawrence Tang UINT8 ClassCode[3]; 10171b0b00e3SLawrence Tang UINT8 Function; 10181b0b00e3SLawrence Tang UINT8 Device; 10191b0b00e3SLawrence Tang UINT16 Segment; 10201b0b00e3SLawrence Tang UINT8 PrimaryOrDeviceBus; 10211b0b00e3SLawrence Tang UINT8 SecondaryBus; 10221b0b00e3SLawrence Tang EFI_GENERIC_ERROR_PCI_SLOT Slot; 10231b0b00e3SLawrence Tang UINT8 Resv1; 10241b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID; 10251b0b00e3SLawrence Tang 10261b0b00e3SLawrence Tang /// 10271b0b00e3SLawrence Tang /// PCIe Capability Structure 10281b0b00e3SLawrence Tang /// 10291b0b00e3SLawrence Tang typedef struct { 10301b0b00e3SLawrence Tang UINT8 PcieCap[60]; 10311b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA_CAPABILITY; 10321b0b00e3SLawrence Tang 10331b0b00e3SLawrence Tang /// 10341b0b00e3SLawrence Tang /// PCIe Advanced Error Reporting Extended Capability Structure. 10351b0b00e3SLawrence Tang /// 10361b0b00e3SLawrence Tang typedef struct { 10371b0b00e3SLawrence Tang UINT8 PcieAer[96]; 10381b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA_AER; 10391b0b00e3SLawrence Tang 10401b0b00e3SLawrence Tang /// 10411b0b00e3SLawrence Tang /// PCI Express Error Record 10421b0b00e3SLawrence Tang /// 10431b0b00e3SLawrence Tang typedef struct { 10441b0b00e3SLawrence Tang UINT64 ValidFields; 10451b0b00e3SLawrence Tang UINT32 PortType; 10461b0b00e3SLawrence Tang UINT32 Version; 10471b0b00e3SLawrence Tang UINT32 CommandStatus; 10481b0b00e3SLawrence Tang UINT32 Resv2; 10491b0b00e3SLawrence Tang EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID DevBridge; 10501b0b00e3SLawrence Tang UINT64 SerialNo; 10511b0b00e3SLawrence Tang UINT32 BridgeControlStatus; 10521b0b00e3SLawrence Tang EFI_PCIE_ERROR_DATA_CAPABILITY Capability; 10531b0b00e3SLawrence Tang EFI_PCIE_ERROR_DATA_AER AerInfo; 10541b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA; 10551b0b00e3SLawrence Tang 10561b0b00e3SLawrence Tang /// 10571b0b00e3SLawrence Tang /// Validation bits Indicates which of the following fields is valid 10581b0b00e3SLawrence Tang /// in PCI/PCI-X Bus Error Section. 10591b0b00e3SLawrence Tang ///@{ 10601b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID BIT0 10611b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID BIT1 10621b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID BIT2 10631b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID BIT3 10641b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4 10651b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5 10661b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID BIT6 10671b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID BIT7 10681b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID BIT8 10691b0b00e3SLawrence Tang ///@} 10701b0b00e3SLawrence Tang 10711b0b00e3SLawrence Tang /// 10721b0b00e3SLawrence Tang /// PCI Bus Error Type in PCI/PCI-X Bus Error Section 10731b0b00e3SLawrence Tang ///@{ 10741b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN 0x0000 10751b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY 0x0001 10761b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_SYSTEM 0x0002 10771b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT 0x0003 10781b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT 0x0004 10791b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY 0x0005 10801b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY 0x0006 10811b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY 0x0007 10821b0b00e3SLawrence Tang ///@} 10831b0b00e3SLawrence Tang 10841b0b00e3SLawrence Tang /// 10851b0b00e3SLawrence Tang /// PCI/PCI-X Bus Error Section 10861b0b00e3SLawrence Tang /// 10871b0b00e3SLawrence Tang typedef struct { 10881b0b00e3SLawrence Tang UINT64 ValidFields; 10891b0b00e3SLawrence Tang EFI_GENERIC_ERROR_STATUS ErrorStatus; 10901b0b00e3SLawrence Tang UINT16 Type; 10911b0b00e3SLawrence Tang UINT16 BusId; 10921b0b00e3SLawrence Tang UINT32 Resv2; 10931b0b00e3SLawrence Tang UINT64 BusAddress; 10941b0b00e3SLawrence Tang UINT64 BusData; 10951b0b00e3SLawrence Tang UINT64 BusCommand; 10961b0b00e3SLawrence Tang UINT64 RequestorId; 10971b0b00e3SLawrence Tang UINT64 ResponderId; 10981b0b00e3SLawrence Tang UINT64 TargetId; 10991b0b00e3SLawrence Tang } EFI_PCI_PCIX_BUS_ERROR_DATA; 11001b0b00e3SLawrence Tang 11011b0b00e3SLawrence Tang /// 11021b0b00e3SLawrence Tang /// Validation bits Indicates which of the following fields is valid 11031b0b00e3SLawrence Tang /// in PCI/PCI-X Component Error Section. 11041b0b00e3SLawrence Tang ///@{ 11051b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID BIT0 11061b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID BIT1 11071b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID BIT2 11081b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID BIT3 11091b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID BIT4 11101b0b00e3SLawrence Tang ///@} 11111b0b00e3SLawrence Tang 11121b0b00e3SLawrence Tang /// 11131b0b00e3SLawrence Tang /// PCI/PCI-X Device Identification Information 11141b0b00e3SLawrence Tang /// 11151b0b00e3SLawrence Tang typedef struct { 11161b0b00e3SLawrence Tang UINT16 VendorId; 11171b0b00e3SLawrence Tang UINT16 DeviceId; 11181b0b00e3SLawrence Tang UINT8 ClassCode[3]; 11191b0b00e3SLawrence Tang UINT8 Function; 11201b0b00e3SLawrence Tang UINT8 Device; 11211b0b00e3SLawrence Tang UINT8 Bus; 11221b0b00e3SLawrence Tang UINT8 Segment; 11231b0b00e3SLawrence Tang UINT8 Resv1; 11241b0b00e3SLawrence Tang UINT32 Resv2; 11251b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCI_DEVICE_ID; 11261b0b00e3SLawrence Tang 11271b0b00e3SLawrence Tang /// 11281b0b00e3SLawrence Tang /// Identifies the type of firmware error record 11291b0b00e3SLawrence Tang ///@{ 11301b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL 0x00 11311b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE1 0x01 11321b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE2 0x02 11331b0b00e3SLawrence Tang ///@} 11341b0b00e3SLawrence Tang 11351b0b00e3SLawrence Tang /// 11361b0b00e3SLawrence Tang /// Firmware Error Record Section 11371b0b00e3SLawrence Tang /// 11381b0b00e3SLawrence Tang typedef struct { 11391b0b00e3SLawrence Tang UINT8 ErrorType; 11401b0b00e3SLawrence Tang UINT8 Revision; 11411b0b00e3SLawrence Tang UINT8 Resv1[6]; 11421b0b00e3SLawrence Tang UINT64 RecordId; 11431b0b00e3SLawrence Tang EFI_GUID RecordIdGuid; 11441b0b00e3SLawrence Tang } EFI_FIRMWARE_ERROR_DATA; 11451b0b00e3SLawrence Tang 11461b0b00e3SLawrence Tang /// 11471b0b00e3SLawrence Tang /// Fault Reason in DMAr Generic Error Section 11481b0b00e3SLawrence Tang ///@{ 11491b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT 0x01 11501b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID 0x02 11511b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR 0x03 11521b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE 0x04 11531b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE 0x05 11541b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_ACCESS 0x06 11551b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_REQUEST 0x07 11561b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR 0x08 11571b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE 0x09 11581b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_COMMAOND 0x0A 11591b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR 0x0B 11601b0b00e3SLawrence Tang ///@} 11611b0b00e3SLawrence Tang 11621b0b00e3SLawrence Tang /// 11631b0b00e3SLawrence Tang /// DMA access type in DMAr Generic Error Section 11641b0b00e3SLawrence Tang ///@{ 11651b0b00e3SLawrence Tang #define EFI_DMA_ACCESS_TYPE_READ 0x00 11661b0b00e3SLawrence Tang #define EFI_DMA_ACCESS_TYPE_WRITE 0x01 11671b0b00e3SLawrence Tang ///@} 11681b0b00e3SLawrence Tang 11691b0b00e3SLawrence Tang /// 11701b0b00e3SLawrence Tang /// DMA address type in DMAr Generic Error Section 11711b0b00e3SLawrence Tang ///@{ 11721b0b00e3SLawrence Tang #define EFI_DMA_ADDRESS_UNTRANSLATED 0x00 11731b0b00e3SLawrence Tang #define EFI_DMA_ADDRESS_TRANSLATION 0x01 11741b0b00e3SLawrence Tang ///@} 11751b0b00e3SLawrence Tang 11761b0b00e3SLawrence Tang /// 11771b0b00e3SLawrence Tang /// Architecture type in DMAr Generic Error Section 11781b0b00e3SLawrence Tang ///@{ 11791b0b00e3SLawrence Tang #define EFI_DMA_ARCH_TYPE_VT 0x01 11801b0b00e3SLawrence Tang #define EFI_DMA_ARCH_TYPE_IOMMU 0x02 11811b0b00e3SLawrence Tang ///@} 11821b0b00e3SLawrence Tang 11831b0b00e3SLawrence Tang /// 11841b0b00e3SLawrence Tang /// DMAr Generic Error Section 11851b0b00e3SLawrence Tang /// 11861b0b00e3SLawrence Tang typedef struct { 11871b0b00e3SLawrence Tang UINT16 RequesterId; 11881b0b00e3SLawrence Tang UINT16 SegmentNumber; 11891b0b00e3SLawrence Tang UINT8 FaultReason; 11901b0b00e3SLawrence Tang UINT8 AccessType; 11911b0b00e3SLawrence Tang UINT8 AddressType; 11921b0b00e3SLawrence Tang UINT8 ArchType; 11931b0b00e3SLawrence Tang UINT64 DeviceAddr; 11941b0b00e3SLawrence Tang UINT8 Resv1[16]; 11951b0b00e3SLawrence Tang } EFI_DMAR_GENERIC_ERROR_DATA; 11961b0b00e3SLawrence Tang 11971b0b00e3SLawrence Tang /// 11981b0b00e3SLawrence Tang /// Intel VT for Directed I/O specific DMAr Errors 11991b0b00e3SLawrence Tang /// 12001b0b00e3SLawrence Tang typedef struct { 12011b0b00e3SLawrence Tang UINT8 Version; 12021b0b00e3SLawrence Tang UINT8 Revision; 12031b0b00e3SLawrence Tang UINT8 OemId[6]; 12041b0b00e3SLawrence Tang UINT64 Capability; 12051b0b00e3SLawrence Tang UINT64 CapabilityEx; 12061b0b00e3SLawrence Tang UINT32 GlobalCommand; 12071b0b00e3SLawrence Tang UINT32 GlobalStatus; 12081b0b00e3SLawrence Tang UINT32 FaultStatus; 12091b0b00e3SLawrence Tang UINT8 Resv1[12]; 12101b0b00e3SLawrence Tang UINT64 FaultRecord[2]; 12111b0b00e3SLawrence Tang UINT64 RootEntry[2]; 12121b0b00e3SLawrence Tang UINT64 ContextEntry[2]; 12131b0b00e3SLawrence Tang UINT64 PteL6; 12141b0b00e3SLawrence Tang UINT64 PteL5; 12151b0b00e3SLawrence Tang UINT64 PteL4; 12161b0b00e3SLawrence Tang UINT64 PteL3; 12171b0b00e3SLawrence Tang UINT64 PteL2; 12181b0b00e3SLawrence Tang UINT64 PteL1; 12191b0b00e3SLawrence Tang } EFI_DIRECTED_IO_DMAR_ERROR_DATA; 12201b0b00e3SLawrence Tang 12211b0b00e3SLawrence Tang /// 12221b0b00e3SLawrence Tang /// IOMMU specific DMAr Errors 12231b0b00e3SLawrence Tang /// 12241b0b00e3SLawrence Tang typedef struct { 12251b0b00e3SLawrence Tang UINT8 Revision; 12261b0b00e3SLawrence Tang UINT8 Resv1[7]; 12271b0b00e3SLawrence Tang UINT64 Control; 12281b0b00e3SLawrence Tang UINT64 Status; 12291b0b00e3SLawrence Tang UINT8 Resv2[8]; 12301b0b00e3SLawrence Tang UINT64 EventLogEntry[2]; 12311b0b00e3SLawrence Tang UINT8 Resv3[16]; 12321b0b00e3SLawrence Tang UINT64 DeviceTableEntry[4]; 12331b0b00e3SLawrence Tang UINT64 PteL6; 12341b0b00e3SLawrence Tang UINT64 PteL5; 12351b0b00e3SLawrence Tang UINT64 PteL4; 12361b0b00e3SLawrence Tang UINT64 PteL3; 12371b0b00e3SLawrence Tang UINT64 PteL2; 12381b0b00e3SLawrence Tang UINT64 PteL1; 12391b0b00e3SLawrence Tang } EFI_IOMMU_DMAR_ERROR_DATA; 12401b0b00e3SLawrence Tang 12411b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeCmcGuid; 12421b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeCpeGuid; 12431b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeMceGuid; 12441b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypePcieGuid; 12451b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeInitGuid; 12461b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeNmiGuid; 12471b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeBootGuid; 12481b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeDmarGuid; 12491b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeSeaGuid; 12501b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeSeiGuid; 12511b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypePeiGuid; 12521b0b00e3SLawrence Tang extern EFI_GUID gEfiEventNotificationTypeCxlGuid; 12531b0b00e3SLawrence Tang extern EFI_GUID gEfiProcessorGenericErrorSectionGuid; 12541b0b00e3SLawrence Tang extern EFI_GUID gEfiProcessorSpecificErrorSectionGuid; 12551b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ProcessorErrorSectionGuid; 1256cc0f5f38SLawrence Tang extern EFI_GUID gEfiIpfProcessorErrorSectionGuid; 12571b0b00e3SLawrence Tang extern EFI_GUID gEfiArmProcessorErrorSectionGuid; 12581b0b00e3SLawrence Tang extern EFI_GUID gEfiPlatformMemoryErrorSectionGuid; 1259a0865e38SLawrence Tang extern EFI_GUID gEfiPlatformMemoryError2SectionGuid; 12601b0b00e3SLawrence Tang extern EFI_GUID gEfiPcieErrorSectionGuid; 12611b0b00e3SLawrence Tang extern EFI_GUID gEfiFirmwareErrorSectionGuid; 12621b0b00e3SLawrence Tang extern EFI_GUID gEfiPciBusErrorSectionGuid; 12631b0b00e3SLawrence Tang extern EFI_GUID gEfiPciDevErrorSectionGuid; 12641b0b00e3SLawrence Tang extern EFI_GUID gEfiDMArGenericErrorSectionGuid; 12651b0b00e3SLawrence Tang extern EFI_GUID gEfiDirectedIoDMArErrorSectionGuid; 12661b0b00e3SLawrence Tang extern EFI_GUID gEfiIommuDMArErrorSectionGuid; 1267864c0da9SLawrence Tang extern EFI_GUID gEfiCcixPerLogErrorSectionGuid; 1268b98ec66cSLawrence Tang extern EFI_GUID gEfiCxlProtocolErrorSectionGuid; 1269*d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlGeneralMediaErrorSectionGuid; 1270*d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlDramEventErrorSectionGuid; 1271*d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlMemoryModuleErrorSectionGuid; 1272*d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlPhysicalSwitchErrorSectionGuid; 1273*d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlVirtualSwitchErrorSectionGuid; 1274*d7e8ca34SLawrence Tang extern EFI_GUID gEfiCxlMldPortErrorSectionGuid; 12751b0b00e3SLawrence Tang #pragma pack() 12761b0b00e3SLawrence Tang 12771b0b00e3SLawrence Tang #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) 12781b0b00e3SLawrence Tang /// 12791b0b00e3SLawrence Tang /// IA32 and x64 Specific definitions. 12801b0b00e3SLawrence Tang /// 12811b0b00e3SLawrence Tang 12821b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeCacheCheckGuid; 12831b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeTlbCheckGuid; 12841b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeBusCheckGuid; 12851b0b00e3SLawrence Tang extern EFI_GUID gEfiIa32X64ErrorTypeMsCheckGuid; 12861b0b00e3SLawrence Tang 12871b0b00e3SLawrence Tang #endif 12881b0b00e3SLawrence Tang 12891b0b00e3SLawrence Tang #endif 1290