xref: /openbmc/libcper/edk/Cper.h (revision 1b0b00e3)
1*1b0b00e3SLawrence Tang /** @file
2*1b0b00e3SLawrence Tang   GUIDs and definitions used for Common Platform Error Record.
3*1b0b00e3SLawrence Tang 
4*1b0b00e3SLawrence Tang   Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
5*1b0b00e3SLawrence Tang   (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
6*1b0b00e3SLawrence Tang   SPDX-License-Identifier: BSD-2-Clause-Patent
7*1b0b00e3SLawrence Tang 
8*1b0b00e3SLawrence Tang   @par Revision Reference:
9*1b0b00e3SLawrence Tang   GUIDs defined in UEFI 2.7 Specification.
10*1b0b00e3SLawrence Tang 
11*1b0b00e3SLawrence Tang **/
12*1b0b00e3SLawrence Tang #include "BaseTypes.h"
13*1b0b00e3SLawrence Tang 
14*1b0b00e3SLawrence Tang #ifndef __CPER_GUID_H__
15*1b0b00e3SLawrence Tang #define __CPER_GUID_H__
16*1b0b00e3SLawrence Tang 
17*1b0b00e3SLawrence Tang #pragma pack(1)
18*1b0b00e3SLawrence Tang 
19*1b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_SIGNATURE_START  SIGNATURE_32('C', 'P', 'E', 'R')
20*1b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_SIGNATURE_END    0xFFFFFFFF
21*1b0b00e3SLawrence Tang 
22*1b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_REVISION  0x0101
23*1b0b00e3SLawrence Tang 
24*1b0b00e3SLawrence Tang ///
25*1b0b00e3SLawrence Tang /// Error Severity in Error Record Header and Error Section Descriptor
26*1b0b00e3SLawrence Tang ///@{
27*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_RECOVERABLE  0x00000000
28*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_FATAL        0x00000001
29*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_CORRECTED    0x00000002
30*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_INFO         0x00000003
31*1b0b00e3SLawrence Tang ///@}
32*1b0b00e3SLawrence Tang 
33*1b0b00e3SLawrence Tang ///
34*1b0b00e3SLawrence Tang /// The validation bit mask indicates the validity of the following fields
35*1b0b00e3SLawrence Tang /// in Error Record Header.
36*1b0b00e3SLawrence Tang ///@{
37*1b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID   BIT0
38*1b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID    BIT1
39*1b0b00e3SLawrence Tang #define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID  BIT2
40*1b0b00e3SLawrence Tang ///@}
41*1b0b00e3SLawrence Tang 
42*1b0b00e3SLawrence Tang ///
43*1b0b00e3SLawrence Tang /// Timestamp is precise if this bit is set and correlates to the time of the
44*1b0b00e3SLawrence Tang /// error event.
45*1b0b00e3SLawrence Tang ///
46*1b0b00e3SLawrence Tang #define EFI_ERROR_TIME_STAMP_PRECISE  BIT0
47*1b0b00e3SLawrence Tang 
48*1b0b00e3SLawrence Tang ///
49*1b0b00e3SLawrence Tang /// The timestamp correlates to the time when the error information was collected
50*1b0b00e3SLawrence Tang /// by the system software and may not necessarily represent the time of the error
51*1b0b00e3SLawrence Tang /// event. The timestamp contains the local time in BCD format.
52*1b0b00e3SLawrence Tang ///
53*1b0b00e3SLawrence Tang typedef struct {
54*1b0b00e3SLawrence Tang   UINT8    Seconds;
55*1b0b00e3SLawrence Tang   UINT8    Minutes;
56*1b0b00e3SLawrence Tang   UINT8    Hours;
57*1b0b00e3SLawrence Tang   UINT8    Flag;
58*1b0b00e3SLawrence Tang   UINT8    Day;
59*1b0b00e3SLawrence Tang   UINT8    Month;
60*1b0b00e3SLawrence Tang   UINT8    Year;
61*1b0b00e3SLawrence Tang   UINT8    Century;
62*1b0b00e3SLawrence Tang } EFI_ERROR_TIME_STAMP;
63*1b0b00e3SLawrence Tang 
64*1b0b00e3SLawrence Tang ///
65*1b0b00e3SLawrence Tang /// GUID value indicating the record association with an error event notification type.
66*1b0b00e3SLawrence Tang ///@{
67*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \
68*1b0b00e3SLawrence Tang   { \
69*1b0b00e3SLawrence Tang     0x2DCE8BB1, 0xBDD7, 0x450e, { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } \
70*1b0b00e3SLawrence Tang   }
71*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \
72*1b0b00e3SLawrence Tang   { \
73*1b0b00e3SLawrence Tang     0x4E292F96, 0xD843, 0x4a55, { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } \
74*1b0b00e3SLawrence Tang   }
75*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \
76*1b0b00e3SLawrence Tang   { \
77*1b0b00e3SLawrence Tang     0xE8F56FFE, 0x919C, 0x4cc5, { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } \
78*1b0b00e3SLawrence Tang   }
79*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \
80*1b0b00e3SLawrence Tang   { \
81*1b0b00e3SLawrence Tang     0xCF93C01F, 0x1A16, 0x4dfc, { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } \
82*1b0b00e3SLawrence Tang   }
83*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \
84*1b0b00e3SLawrence Tang   { \
85*1b0b00e3SLawrence Tang     0xCC5263E8, 0x9308, 0x454a, { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } \
86*1b0b00e3SLawrence Tang   }
87*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \
88*1b0b00e3SLawrence Tang   { \
89*1b0b00e3SLawrence Tang     0x5BAD89FF, 0xB7E6, 0x42c9, { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } \
90*1b0b00e3SLawrence Tang   }
91*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \
92*1b0b00e3SLawrence Tang   { \
93*1b0b00e3SLawrence Tang     0x3D61A466, 0xAB40, 0x409a, { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } \
94*1b0b00e3SLawrence Tang   }
95*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \
96*1b0b00e3SLawrence Tang   { \
97*1b0b00e3SLawrence Tang     0x667DD791, 0xC6B3, 0x4c27, { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } \
98*1b0b00e3SLawrence Tang   }
99*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEA \
100*1b0b00e3SLawrence Tang   { \
101*1b0b00e3SLawrence Tang     0x9A78788A, 0xBBE8, 0x11E4, { 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 } \
102*1b0b00e3SLawrence Tang   }
103*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEI \
104*1b0b00e3SLawrence Tang   { \
105*1b0b00e3SLawrence Tang     0x5C284C81, 0xB0AE, 0x4E87, { 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 } \
106*1b0b00e3SLawrence Tang   }
107*1b0b00e3SLawrence Tang #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_PEI \
108*1b0b00e3SLawrence Tang   { \
109*1b0b00e3SLawrence Tang     0x09A9D5AC, 0x5204, 0x4214, { 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD } \
110*1b0b00e3SLawrence Tang   }
111*1b0b00e3SLawrence Tang ///@}
112*1b0b00e3SLawrence Tang 
113*1b0b00e3SLawrence Tang ///
114*1b0b00e3SLawrence Tang /// Error Record Header Flags
115*1b0b00e3SLawrence Tang ///@{
116*1b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_RECOVERED  0x00000001
117*1b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_PREVERR    0x00000002
118*1b0b00e3SLawrence Tang #define EFI_HW_ERROR_FLAGS_SIMULATED  0x00000004
119*1b0b00e3SLawrence Tang ///@}
120*1b0b00e3SLawrence Tang 
121*1b0b00e3SLawrence Tang ///
122*1b0b00e3SLawrence Tang /// Common error record header
123*1b0b00e3SLawrence Tang ///
124*1b0b00e3SLawrence Tang typedef struct {
125*1b0b00e3SLawrence Tang   UINT32                  SignatureStart;
126*1b0b00e3SLawrence Tang   UINT16                  Revision;
127*1b0b00e3SLawrence Tang   UINT32                  SignatureEnd;
128*1b0b00e3SLawrence Tang   UINT16                  SectionCount;
129*1b0b00e3SLawrence Tang   UINT32                  ErrorSeverity;
130*1b0b00e3SLawrence Tang   UINT32                  ValidationBits;
131*1b0b00e3SLawrence Tang   UINT32                  RecordLength;
132*1b0b00e3SLawrence Tang   EFI_ERROR_TIME_STAMP    TimeStamp;
133*1b0b00e3SLawrence Tang   EFI_GUID                PlatformID;
134*1b0b00e3SLawrence Tang   EFI_GUID                PartitionID;
135*1b0b00e3SLawrence Tang   EFI_GUID                CreatorID;
136*1b0b00e3SLawrence Tang   EFI_GUID                NotificationType;
137*1b0b00e3SLawrence Tang   UINT64                  RecordID;
138*1b0b00e3SLawrence Tang   UINT32                  Flags;
139*1b0b00e3SLawrence Tang   UINT64                  PersistenceInfo;
140*1b0b00e3SLawrence Tang   UINT8                   Resv1[12];
141*1b0b00e3SLawrence Tang   ///
142*1b0b00e3SLawrence Tang   /// An array of SectionCount descriptors for the associated
143*1b0b00e3SLawrence Tang   /// sections. The number of valid sections is equivalent to the
144*1b0b00e3SLawrence Tang   /// SectionCount. The buffer size of the record may include
145*1b0b00e3SLawrence Tang   /// more space to dynamically add additional Section
146*1b0b00e3SLawrence Tang   /// Descriptors to the error record.
147*1b0b00e3SLawrence Tang   ///
148*1b0b00e3SLawrence Tang } EFI_COMMON_ERROR_RECORD_HEADER;
149*1b0b00e3SLawrence Tang 
150*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_REVISION  0x0100
151*1b0b00e3SLawrence Tang 
152*1b0b00e3SLawrence Tang ///
153*1b0b00e3SLawrence Tang /// Validity Fields in Error Section Descriptor.
154*1b0b00e3SLawrence Tang ///
155*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FRU_ID_VALID      BIT0
156*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FRU_STRING_VALID  BIT1
157*1b0b00e3SLawrence Tang 
158*1b0b00e3SLawrence Tang ///
159*1b0b00e3SLawrence Tang /// Flag field contains information that describes the error section
160*1b0b00e3SLawrence Tang /// in Error Section Descriptor.
161*1b0b00e3SLawrence Tang ///
162*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_PRIMARY                   BIT0
163*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING       BIT1
164*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_RESET                     BIT2
165*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED  BIT3
166*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE   BIT4
167*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR              BIT5
168*1b0b00e3SLawrence Tang 
169*1b0b00e3SLawrence Tang ///
170*1b0b00e3SLawrence Tang /// Error Sectition Type GUIDs in Error Section Descriptor
171*1b0b00e3SLawrence Tang ///@{
172*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \
173*1b0b00e3SLawrence Tang   { \
174*1b0b00e3SLawrence Tang     0x9876ccad, 0x47b4, 0x4bdb, { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } \
175*1b0b00e3SLawrence Tang   }
176*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \
177*1b0b00e3SLawrence Tang   { \
178*1b0b00e3SLawrence Tang     0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \
179*1b0b00e3SLawrence Tang   }
180*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \
181*1b0b00e3SLawrence Tang   { \
182*1b0b00e3SLawrence Tang     0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \
183*1b0b00e3SLawrence Tang   }
184*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \
185*1b0b00e3SLawrence Tang   { \
186*1b0b00e3SLawrence Tang     0xe19e3d16, 0xbc11, 0x11e4, { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 } \
187*1b0b00e3SLawrence Tang   }
188*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \
189*1b0b00e3SLawrence Tang   { \
190*1b0b00e3SLawrence Tang     0xa5bc1114, 0x6f64, 0x4ede, { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } \
191*1b0b00e3SLawrence Tang   }
192*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \
193*1b0b00e3SLawrence Tang   { \
194*1b0b00e3SLawrence Tang     0x61EC04FC, 0x48E6, 0xD813, { 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 } \
195*1b0b00e3SLawrence Tang   }
196*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCIE_GUID \
197*1b0b00e3SLawrence Tang   { \
198*1b0b00e3SLawrence Tang     0xd995e954, 0xbbc1, 0x430f, { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } \
199*1b0b00e3SLawrence Tang   }
200*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \
201*1b0b00e3SLawrence Tang   { \
202*1b0b00e3SLawrence Tang     0x81212a96, 0x09ed, 0x4996, { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } \
203*1b0b00e3SLawrence Tang   }
204*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \
205*1b0b00e3SLawrence Tang   { \
206*1b0b00e3SLawrence Tang     0xc5753963, 0x3b84, 0x4095, { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } \
207*1b0b00e3SLawrence Tang   }
208*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_PCI_DEVICE_GUID \
209*1b0b00e3SLawrence Tang   { \
210*1b0b00e3SLawrence Tang     0xeb5e4685, 0xca66, 0x4769, { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } \
211*1b0b00e3SLawrence Tang   }
212*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \
213*1b0b00e3SLawrence Tang   { \
214*1b0b00e3SLawrence Tang     0x5b51fef7, 0xc79d, 0x4434, { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } \
215*1b0b00e3SLawrence Tang   }
216*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \
217*1b0b00e3SLawrence Tang   { \
218*1b0b00e3SLawrence Tang     0x71761d37, 0x32b2, 0x45cd, { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } \
219*1b0b00e3SLawrence Tang   }
220*1b0b00e3SLawrence Tang #define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \
221*1b0b00e3SLawrence Tang   { \
222*1b0b00e3SLawrence Tang     0x036f84e1, 0x7f37, 0x428c, { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } \
223*1b0b00e3SLawrence Tang   }
224*1b0b00e3SLawrence Tang ///@}
225*1b0b00e3SLawrence Tang 
226*1b0b00e3SLawrence Tang ///
227*1b0b00e3SLawrence Tang /// Error Section Descriptor
228*1b0b00e3SLawrence Tang ///
229*1b0b00e3SLawrence Tang typedef struct {
230*1b0b00e3SLawrence Tang   UINT32      SectionOffset;
231*1b0b00e3SLawrence Tang   UINT32      SectionLength;
232*1b0b00e3SLawrence Tang   UINT16      Revision;
233*1b0b00e3SLawrence Tang   UINT8       SecValidMask;
234*1b0b00e3SLawrence Tang   UINT8       Resv1;
235*1b0b00e3SLawrence Tang   UINT32      SectionFlags;
236*1b0b00e3SLawrence Tang   EFI_GUID    SectionType;
237*1b0b00e3SLawrence Tang   EFI_GUID    FruId;
238*1b0b00e3SLawrence Tang   UINT32      Severity;
239*1b0b00e3SLawrence Tang   CHAR8       FruString[20];
240*1b0b00e3SLawrence Tang } EFI_ERROR_SECTION_DESCRIPTOR;
241*1b0b00e3SLawrence Tang 
242*1b0b00e3SLawrence Tang ///
243*1b0b00e3SLawrence Tang /// The validation bit mask indicates whether or not each of the following fields are
244*1b0b00e3SLawrence Tang /// valid in Proessor Generic Error section.
245*1b0b00e3SLawrence Tang ///@{
246*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_VALID          BIT0
247*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_VALID           BIT1
248*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID    BIT2
249*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_VALID     BIT3
250*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_VALID         BIT4
251*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID         BIT5
252*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_VERSION_VALID       BIT6
253*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_BRAND_VALID         BIT7
254*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ID_VALID            BIT8
255*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID   BIT9
256*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID  BIT10
257*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID  BIT11
258*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_INST_IP_VALID       BIT12
259*1b0b00e3SLawrence Tang ///@}
260*1b0b00e3SLawrence Tang 
261*1b0b00e3SLawrence Tang ///
262*1b0b00e3SLawrence Tang /// The type of the processor architecture in Proessor Generic Error section.
263*1b0b00e3SLawrence Tang ///@{
264*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64  0x00
265*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_IA64      0x01
266*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_TYPE_ARM       0x02
267*1b0b00e3SLawrence Tang ///@}
268*1b0b00e3SLawrence Tang 
269*1b0b00e3SLawrence Tang ///
270*1b0b00e3SLawrence Tang /// The type of the instruction set executing when the error occurred in Proessor
271*1b0b00e3SLawrence Tang /// Generic Error section.
272*1b0b00e3SLawrence Tang ///@{
273*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_IA32         0x00
274*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_IA64         0x01
275*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_X64          0x02
276*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A32_T32  0x03
277*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A64      0x04
278*1b0b00e3SLawrence Tang ///@}
279*1b0b00e3SLawrence Tang 
280*1b0b00e3SLawrence Tang ///
281*1b0b00e3SLawrence Tang /// The type of error that occurred in Proessor Generic Error section.
282*1b0b00e3SLawrence Tang ///@{
283*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN     0x00
284*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE       0x01
285*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB         0x02
286*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS         0x04
287*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH  0x08
288*1b0b00e3SLawrence Tang ///@}
289*1b0b00e3SLawrence Tang 
290*1b0b00e3SLawrence Tang ///
291*1b0b00e3SLawrence Tang /// The type of operation in Proessor Generic Error section.
292*1b0b00e3SLawrence Tang ///@{
293*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC           0x00
294*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ         0x01
295*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE        0x02
296*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC  0x03
297*1b0b00e3SLawrence Tang ///@}
298*1b0b00e3SLawrence Tang 
299*1b0b00e3SLawrence Tang ///
300*1b0b00e3SLawrence Tang /// Flags bit mask indicates additional information about the error in Proessor Generic
301*1b0b00e3SLawrence Tang /// Error section
302*1b0b00e3SLawrence Tang ///@{
303*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE  BIT0
304*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP   BIT1
305*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW     BIT2
306*1b0b00e3SLawrence Tang #define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED    BIT3
307*1b0b00e3SLawrence Tang ///@}
308*1b0b00e3SLawrence Tang 
309*1b0b00e3SLawrence Tang ///
310*1b0b00e3SLawrence Tang /// Processor Generic Error Section
311*1b0b00e3SLawrence Tang /// describes processor reported hardware errors for logical processors in the system.
312*1b0b00e3SLawrence Tang ///
313*1b0b00e3SLawrence Tang typedef struct {
314*1b0b00e3SLawrence Tang   UINT64    ValidFields;
315*1b0b00e3SLawrence Tang   UINT8     Type;
316*1b0b00e3SLawrence Tang   UINT8     Isa;
317*1b0b00e3SLawrence Tang   UINT8     ErrorType;
318*1b0b00e3SLawrence Tang   UINT8     Operation;
319*1b0b00e3SLawrence Tang   UINT8     Flags;
320*1b0b00e3SLawrence Tang   UINT8     Level;
321*1b0b00e3SLawrence Tang   UINT16    Resv1;
322*1b0b00e3SLawrence Tang   UINT64    VersionInfo;
323*1b0b00e3SLawrence Tang   CHAR8     BrandString[128];
324*1b0b00e3SLawrence Tang   UINT64    ApicId;
325*1b0b00e3SLawrence Tang   UINT64    TargetAddr;
326*1b0b00e3SLawrence Tang   UINT64    RequestorId;
327*1b0b00e3SLawrence Tang   UINT64    ResponderId;
328*1b0b00e3SLawrence Tang   UINT64    InstructionIP;
329*1b0b00e3SLawrence Tang } EFI_PROCESSOR_GENERIC_ERROR_DATA;
330*1b0b00e3SLawrence Tang 
331*1b0b00e3SLawrence Tang #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
332*1b0b00e3SLawrence Tang ///
333*1b0b00e3SLawrence Tang /// IA32 and x64 Specific definitions.
334*1b0b00e3SLawrence Tang ///
335*1b0b00e3SLawrence Tang 
336*1b0b00e3SLawrence Tang ///
337*1b0b00e3SLawrence Tang /// GUID value indicating the type of Processor Error Information structure
338*1b0b00e3SLawrence Tang /// in IA32/X64 Processor Error Information Structure.
339*1b0b00e3SLawrence Tang ///@{
340*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \
341*1b0b00e3SLawrence Tang   { \
342*1b0b00e3SLawrence Tang     0xA55701F5, 0xE3EF, 0x43de, {0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } \
343*1b0b00e3SLawrence Tang   }
344*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \
345*1b0b00e3SLawrence Tang   { \
346*1b0b00e3SLawrence Tang     0xFC06B535, 0x5E1F, 0x4562, {0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } \
347*1b0b00e3SLawrence Tang   }
348*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \
349*1b0b00e3SLawrence Tang   { \
350*1b0b00e3SLawrence Tang     0x1CF3F8B3, 0xC5B1, 0x49a2, {0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } \
351*1b0b00e3SLawrence Tang   }
352*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \
353*1b0b00e3SLawrence Tang   { \
354*1b0b00e3SLawrence Tang     0x48AB7F57, 0xDC34, 0x4f6c, {0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } \
355*1b0b00e3SLawrence Tang   }
356*1b0b00e3SLawrence Tang ///@}
357*1b0b00e3SLawrence Tang 
358*1b0b00e3SLawrence Tang ///
359*1b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the IA32/X64 Processor
360*1b0b00e3SLawrence Tang /// Error Record structure are valid.
361*1b0b00e3SLawrence Tang ///@{
362*1b0b00e3SLawrence Tang #define EFI_IA32_X64_PROCESSOR_ERROR_APIC_ID_VALID      BIT0
363*1b0b00e3SLawrence Tang #define EFI_IA32_X64_PROCESSOR_ERROR_CPU_ID_INFO_VALID  BIT1
364*1b0b00e3SLawrence Tang ///@}
365*1b0b00e3SLawrence Tang 
366*1b0b00e3SLawrence Tang ///
367*1b0b00e3SLawrence Tang /// IA32/X64 Processor Error Record
368*1b0b00e3SLawrence Tang ///
369*1b0b00e3SLawrence Tang typedef struct {
370*1b0b00e3SLawrence Tang   UINT64    ValidFields;
371*1b0b00e3SLawrence Tang   UINT64    ApicId;
372*1b0b00e3SLawrence Tang   UINT8     CpuIdInfo[48];
373*1b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESSOR_ERROR_RECORD;
374*1b0b00e3SLawrence Tang 
375*1b0b00e3SLawrence Tang ///
376*1b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the Cache Check structure
377*1b0b00e3SLawrence Tang /// are valid.
378*1b0b00e3SLawrence Tang ///@{
379*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID  BIT0
380*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_VALID         BIT1
381*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_LEVEL_VALID             BIT2
382*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID   BIT3
383*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_UNCORRECTED_VALID       BIT4
384*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_PRECISE_IP_VALID        BIT5
385*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_RESTARTABLE_VALID       BIT6
386*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OVERFLOW_VALID          BIT7
387*1b0b00e3SLawrence Tang ///@}
388*1b0b00e3SLawrence Tang 
389*1b0b00e3SLawrence Tang ///
390*1b0b00e3SLawrence Tang /// Type of cache error in the Cache Check structure
391*1b0b00e3SLawrence Tang ///@{
392*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION  0
393*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS  1
394*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC      2
395*1b0b00e3SLawrence Tang ///@}
396*1b0b00e3SLawrence Tang 
397*1b0b00e3SLawrence Tang ///
398*1b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the Cache
399*1b0b00e3SLawrence Tang /// Check structure
400*1b0b00e3SLawrence Tang ///@{
401*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC            0
402*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ       1
403*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE      2
404*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ          3
405*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE         4
406*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH  5
407*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH           6
408*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION           7
409*1b0b00e3SLawrence Tang #define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP              8
410*1b0b00e3SLawrence Tang ///@}
411*1b0b00e3SLawrence Tang 
412*1b0b00e3SLawrence Tang ///
413*1b0b00e3SLawrence Tang /// IA32/X64 Cache Check Structure
414*1b0b00e3SLawrence Tang ///
415*1b0b00e3SLawrence Tang typedef struct {
416*1b0b00e3SLawrence Tang   UINT64    ValidFields      : 16;
417*1b0b00e3SLawrence Tang   UINT64    TransactionType  : 2;
418*1b0b00e3SLawrence Tang   UINT64    Operation        : 4;
419*1b0b00e3SLawrence Tang   UINT64    Level            : 3;
420*1b0b00e3SLawrence Tang   UINT64    ContextCorrupt   : 1;
421*1b0b00e3SLawrence Tang   UINT64    ErrorUncorrected : 1;
422*1b0b00e3SLawrence Tang   UINT64    PreciseIp        : 1;
423*1b0b00e3SLawrence Tang   UINT64    RestartableIp    : 1;
424*1b0b00e3SLawrence Tang   UINT64    Overflow         : 1;
425*1b0b00e3SLawrence Tang   UINT64    Resv1            : 34;
426*1b0b00e3SLawrence Tang } EFI_IA32_X64_CACHE_CHECK_INFO;
427*1b0b00e3SLawrence Tang 
428*1b0b00e3SLawrence Tang ///
429*1b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the TLB Check structure
430*1b0b00e3SLawrence Tang /// are valid.
431*1b0b00e3SLawrence Tang ///@{
432*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID  BIT0
433*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_VALID         BIT1
434*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_LEVEL_VALID             BIT2
435*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID   BIT3
436*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_UNCORRECTED_VALID       BIT4
437*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_PRECISE_IP_VALID        BIT5
438*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_RESTARTABLE_VALID       BIT6
439*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OVERFLOW_VALID          BIT7
440*1b0b00e3SLawrence Tang ///@}
441*1b0b00e3SLawrence Tang 
442*1b0b00e3SLawrence Tang ///
443*1b0b00e3SLawrence Tang /// Type of cache error in the TLB Check structure
444*1b0b00e3SLawrence Tang ///@{
445*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION  0
446*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS  1
447*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_ERROR_TYPE_GENERIC      2
448*1b0b00e3SLawrence Tang ///@}
449*1b0b00e3SLawrence Tang 
450*1b0b00e3SLawrence Tang ///
451*1b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the TLB
452*1b0b00e3SLawrence Tang /// Check structure
453*1b0b00e3SLawrence Tang ///@{
454*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC        0
455*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ   1
456*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE  2
457*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ      3
458*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE     4
459*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH     5
460*1b0b00e3SLawrence Tang #define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH       6
461*1b0b00e3SLawrence Tang ///@}
462*1b0b00e3SLawrence Tang 
463*1b0b00e3SLawrence Tang ///
464*1b0b00e3SLawrence Tang /// IA32/X64 TLB Check Structure
465*1b0b00e3SLawrence Tang ///
466*1b0b00e3SLawrence Tang typedef struct {
467*1b0b00e3SLawrence Tang   UINT64    ValidFields      : 16;
468*1b0b00e3SLawrence Tang   UINT64    TransactionType  : 2;
469*1b0b00e3SLawrence Tang   UINT64    Operation        : 4;
470*1b0b00e3SLawrence Tang   UINT64    Level            : 3;
471*1b0b00e3SLawrence Tang   UINT64    ContextCorrupt   : 1;
472*1b0b00e3SLawrence Tang   UINT64    ErrorUncorrected : 1;
473*1b0b00e3SLawrence Tang   UINT64    PreciseIp        : 1;
474*1b0b00e3SLawrence Tang   UINT64    RestartableIp    : 1;
475*1b0b00e3SLawrence Tang   UINT64    Overflow         : 1;
476*1b0b00e3SLawrence Tang   UINT64    Resv1            : 34;
477*1b0b00e3SLawrence Tang } EFI_IA32_X64_TLB_CHECK_INFO;
478*1b0b00e3SLawrence Tang 
479*1b0b00e3SLawrence Tang ///
480*1b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the MS Check structure
481*1b0b00e3SLawrence Tang /// are valid.
482*1b0b00e3SLawrence Tang ///@{
483*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID    BIT0
484*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_VALID           BIT1
485*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_LEVEL_VALID               BIT2
486*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID     BIT3
487*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_UNCORRECTED_VALID         BIT4
488*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PRECISE_IP_VALID          BIT5
489*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_RESTARTABLE_VALID         BIT6
490*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OVERFLOW_VALID            BIT7
491*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID  BIT8
492*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_TIME_OUT_VALID            BIT9
493*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_VALID       BIT10
494*1b0b00e3SLawrence Tang ///@}
495*1b0b00e3SLawrence Tang 
496*1b0b00e3SLawrence Tang ///
497*1b0b00e3SLawrence Tang /// Type of cache error in the Bus Check structure
498*1b0b00e3SLawrence Tang ///@{
499*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION  0
500*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS  1
501*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ERROR_TYPE_GENERIC      2
502*1b0b00e3SLawrence Tang ///@}
503*1b0b00e3SLawrence Tang 
504*1b0b00e3SLawrence Tang ///
505*1b0b00e3SLawrence Tang /// Type of cache operation that caused the error in the Bus
506*1b0b00e3SLawrence Tang /// Check structure
507*1b0b00e3SLawrence Tang ///@{
508*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC        0
509*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ   1
510*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE  2
511*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ      3
512*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE     4
513*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH     5
514*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH       6
515*1b0b00e3SLawrence Tang ///@}
516*1b0b00e3SLawrence Tang 
517*1b0b00e3SLawrence Tang ///
518*1b0b00e3SLawrence Tang /// Type of Participation
519*1b0b00e3SLawrence Tang ///@{
520*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST    0
521*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED  1
522*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED   2
523*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC    3
524*1b0b00e3SLawrence Tang ///@}
525*1b0b00e3SLawrence Tang 
526*1b0b00e3SLawrence Tang ///
527*1b0b00e3SLawrence Tang /// Type of Address Space
528*1b0b00e3SLawrence Tang ///@{
529*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY    0
530*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED  1
531*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO        2
532*1b0b00e3SLawrence Tang #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER     3
533*1b0b00e3SLawrence Tang ///@}
534*1b0b00e3SLawrence Tang 
535*1b0b00e3SLawrence Tang ///
536*1b0b00e3SLawrence Tang /// IA32/X64 Bus Check Structure
537*1b0b00e3SLawrence Tang ///
538*1b0b00e3SLawrence Tang typedef struct {
539*1b0b00e3SLawrence Tang   UINT64    ValidFields       : 16;
540*1b0b00e3SLawrence Tang   UINT64    TransactionType   : 2;
541*1b0b00e3SLawrence Tang   UINT64    Operation         : 4;
542*1b0b00e3SLawrence Tang   UINT64    Level             : 3;
543*1b0b00e3SLawrence Tang   UINT64    ContextCorrupt    : 1;
544*1b0b00e3SLawrence Tang   UINT64    ErrorUncorrected  : 1;
545*1b0b00e3SLawrence Tang   UINT64    PreciseIp         : 1;
546*1b0b00e3SLawrence Tang   UINT64    RestartableIp     : 1;
547*1b0b00e3SLawrence Tang   UINT64    Overflow          : 1;
548*1b0b00e3SLawrence Tang   UINT64    ParticipationType : 2;
549*1b0b00e3SLawrence Tang   UINT64    TimeOut           : 1;
550*1b0b00e3SLawrence Tang   UINT64    AddressSpace      : 2;
551*1b0b00e3SLawrence Tang   UINT64    Resv1             : 29;
552*1b0b00e3SLawrence Tang } EFI_IA32_X64_BUS_CHECK_INFO;
553*1b0b00e3SLawrence Tang 
554*1b0b00e3SLawrence Tang ///
555*1b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the MS Check structure
556*1b0b00e3SLawrence Tang /// are valid.
557*1b0b00e3SLawrence Tang ///@{
558*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_VALID       BIT0
559*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID  BIT1
560*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_UNCORRECTED_VALID      BIT2
561*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_PRECISE_IP_VALID       BIT3
562*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_RESTARTABLE_VALID      BIT4
563*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_OVERFLOW_VALID         BIT5
564*1b0b00e3SLawrence Tang ///@}
565*1b0b00e3SLawrence Tang 
566*1b0b00e3SLawrence Tang ///
567*1b0b00e3SLawrence Tang /// Error type identifies the operation that caused the error.
568*1b0b00e3SLawrence Tang ///@{
569*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_NO                     0
570*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED           1
571*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY       2
572*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL               3
573*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_FRC                    4
574*1b0b00e3SLawrence Tang #define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED  5
575*1b0b00e3SLawrence Tang ///@}
576*1b0b00e3SLawrence Tang 
577*1b0b00e3SLawrence Tang ///
578*1b0b00e3SLawrence Tang /// IA32/X64 MS Check Field Description
579*1b0b00e3SLawrence Tang ///
580*1b0b00e3SLawrence Tang typedef struct {
581*1b0b00e3SLawrence Tang   UINT64    ValidFields      : 16;
582*1b0b00e3SLawrence Tang   UINT64    ErrorType        : 3;
583*1b0b00e3SLawrence Tang   UINT64    ContextCorrupt   : 1;
584*1b0b00e3SLawrence Tang   UINT64    ErrorUncorrected : 1;
585*1b0b00e3SLawrence Tang   UINT64    PreciseIp        : 1;
586*1b0b00e3SLawrence Tang   UINT64    RestartableIp    : 1;
587*1b0b00e3SLawrence Tang   UINT64    Overflow         : 1;
588*1b0b00e3SLawrence Tang   UINT64    Resv1            : 40;
589*1b0b00e3SLawrence Tang } EFI_IA32_X64_MS_CHECK_INFO;
590*1b0b00e3SLawrence Tang 
591*1b0b00e3SLawrence Tang ///
592*1b0b00e3SLawrence Tang /// IA32/X64 Check Information Item
593*1b0b00e3SLawrence Tang ///
594*1b0b00e3SLawrence Tang typedef union {
595*1b0b00e3SLawrence Tang   EFI_IA32_X64_CACHE_CHECK_INFO    CacheCheck;
596*1b0b00e3SLawrence Tang   EFI_IA32_X64_TLB_CHECK_INFO      TlbCheck;
597*1b0b00e3SLawrence Tang   EFI_IA32_X64_BUS_CHECK_INFO      BusCheck;
598*1b0b00e3SLawrence Tang   EFI_IA32_X64_MS_CHECK_INFO       MsCheck;
599*1b0b00e3SLawrence Tang   UINT64                           Data64;
600*1b0b00e3SLawrence Tang } EFI_IA32_X64_CHECK_INFO_ITEM;
601*1b0b00e3SLawrence Tang 
602*1b0b00e3SLawrence Tang ///
603*1b0b00e3SLawrence Tang /// The validation bit mask indicates which fields in the IA32/X64 Processor Error
604*1b0b00e3SLawrence Tang /// Information Structure are valid.
605*1b0b00e3SLawrence Tang ///@{
606*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID    BIT0
607*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID   BIT1
608*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID  BIT2
609*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID  BIT3
610*1b0b00e3SLawrence Tang #define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID       BIT4
611*1b0b00e3SLawrence Tang ///@}
612*1b0b00e3SLawrence Tang 
613*1b0b00e3SLawrence Tang ///
614*1b0b00e3SLawrence Tang /// IA32/X64 Processor Error Information Structure
615*1b0b00e3SLawrence Tang ///
616*1b0b00e3SLawrence Tang typedef struct {
617*1b0b00e3SLawrence Tang   EFI_GUID                        ErrorType;
618*1b0b00e3SLawrence Tang   UINT64                          ValidFields;
619*1b0b00e3SLawrence Tang   EFI_IA32_X64_CHECK_INFO_ITEM    CheckInfo;
620*1b0b00e3SLawrence Tang   UINT64                          TargetId;
621*1b0b00e3SLawrence Tang   UINT64                          RequestorId;
622*1b0b00e3SLawrence Tang   UINT64                          ResponderId;
623*1b0b00e3SLawrence Tang   UINT64                          InstructionIP;
624*1b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESS_ERROR_INFO;
625*1b0b00e3SLawrence Tang 
626*1b0b00e3SLawrence Tang ///
627*1b0b00e3SLawrence Tang /// IA32/X64 Processor Context Information Structure
628*1b0b00e3SLawrence Tang ///
629*1b0b00e3SLawrence Tang typedef struct {
630*1b0b00e3SLawrence Tang   UINT16    RegisterType;
631*1b0b00e3SLawrence Tang   UINT16    ArraySize;
632*1b0b00e3SLawrence Tang   UINT32    MsrAddress;
633*1b0b00e3SLawrence Tang   UINT64    MmRegisterAddress;
634*1b0b00e3SLawrence Tang   //
635*1b0b00e3SLawrence Tang   // This field will provide the contents of the actual registers or raw data.
636*1b0b00e3SLawrence Tang   // The number of Registers or size of the raw data reported is determined
637*1b0b00e3SLawrence Tang   // by (Array Size / 8) or otherwise specified by the context structure type
638*1b0b00e3SLawrence Tang   // definition.
639*1b0b00e3SLawrence Tang   //
640*1b0b00e3SLawrence Tang } EFI_IA32_X64_PROCESSOR_CONTEXT_INFO;
641*1b0b00e3SLawrence Tang 
642*1b0b00e3SLawrence Tang ///
643*1b0b00e3SLawrence Tang /// Register Context Type
644*1b0b00e3SLawrence Tang ///@{
645*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED  0x0000
646*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_MSR           0x0001
647*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_IA32          0x0002
648*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_X64           0x0003
649*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_FXSAVE        0x0004
650*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_DR_IA32       0x0005
651*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_DR_X64        0x0006
652*1b0b00e3SLawrence Tang #define EFI_REG_CONTEXT_TYPE_MEM_MAP       0x0007
653*1b0b00e3SLawrence Tang ///@}
654*1b0b00e3SLawrence Tang 
655*1b0b00e3SLawrence Tang ///
656*1b0b00e3SLawrence Tang /// IA32 Register State
657*1b0b00e3SLawrence Tang ///
658*1b0b00e3SLawrence Tang typedef struct {
659*1b0b00e3SLawrence Tang   UINT32    Eax;
660*1b0b00e3SLawrence Tang   UINT32    Ebx;
661*1b0b00e3SLawrence Tang   UINT32    Ecx;
662*1b0b00e3SLawrence Tang   UINT32    Edx;
663*1b0b00e3SLawrence Tang   UINT32    Esi;
664*1b0b00e3SLawrence Tang   UINT32    Edi;
665*1b0b00e3SLawrence Tang   UINT32    Ebp;
666*1b0b00e3SLawrence Tang   UINT32    Esp;
667*1b0b00e3SLawrence Tang   UINT16    Cs;
668*1b0b00e3SLawrence Tang   UINT16    Ds;
669*1b0b00e3SLawrence Tang   UINT16    Ss;
670*1b0b00e3SLawrence Tang   UINT16    Es;
671*1b0b00e3SLawrence Tang   UINT16    Fs;
672*1b0b00e3SLawrence Tang   UINT16    Gs;
673*1b0b00e3SLawrence Tang   UINT32    Eflags;
674*1b0b00e3SLawrence Tang   UINT32    Eip;
675*1b0b00e3SLawrence Tang   UINT32    Cr0;
676*1b0b00e3SLawrence Tang   UINT32    Cr1;
677*1b0b00e3SLawrence Tang   UINT32    Cr2;
678*1b0b00e3SLawrence Tang   UINT32    Cr3;
679*1b0b00e3SLawrence Tang   UINT32    Cr4;
680*1b0b00e3SLawrence Tang   UINT32    Gdtr[2];
681*1b0b00e3SLawrence Tang   UINT32    Idtr[2];
682*1b0b00e3SLawrence Tang   UINT16    Ldtr;
683*1b0b00e3SLawrence Tang   UINT16    Tr;
684*1b0b00e3SLawrence Tang } EFI_CONTEXT_IA32_REGISTER_STATE;
685*1b0b00e3SLawrence Tang 
686*1b0b00e3SLawrence Tang ///
687*1b0b00e3SLawrence Tang /// X64 Register State
688*1b0b00e3SLawrence Tang ///
689*1b0b00e3SLawrence Tang typedef struct {
690*1b0b00e3SLawrence Tang   UINT64    Rax;
691*1b0b00e3SLawrence Tang   UINT64    Rbx;
692*1b0b00e3SLawrence Tang   UINT64    Rcx;
693*1b0b00e3SLawrence Tang   UINT64    Rdx;
694*1b0b00e3SLawrence Tang   UINT64    Rsi;
695*1b0b00e3SLawrence Tang   UINT64    Rdi;
696*1b0b00e3SLawrence Tang   UINT64    Rbp;
697*1b0b00e3SLawrence Tang   UINT64    Rsp;
698*1b0b00e3SLawrence Tang   UINT64    R8;
699*1b0b00e3SLawrence Tang   UINT64    R9;
700*1b0b00e3SLawrence Tang   UINT64    R10;
701*1b0b00e3SLawrence Tang   UINT64    R11;
702*1b0b00e3SLawrence Tang   UINT64    R12;
703*1b0b00e3SLawrence Tang   UINT64    R13;
704*1b0b00e3SLawrence Tang   UINT64    R14;
705*1b0b00e3SLawrence Tang   UINT64    R15;
706*1b0b00e3SLawrence Tang   UINT16    Cs;
707*1b0b00e3SLawrence Tang   UINT16    Ds;
708*1b0b00e3SLawrence Tang   UINT16    Ss;
709*1b0b00e3SLawrence Tang   UINT16    Es;
710*1b0b00e3SLawrence Tang   UINT16    Fs;
711*1b0b00e3SLawrence Tang   UINT16    Gs;
712*1b0b00e3SLawrence Tang   UINT32    Resv1;
713*1b0b00e3SLawrence Tang   UINT64    Rflags;
714*1b0b00e3SLawrence Tang   UINT64    Rip;
715*1b0b00e3SLawrence Tang   UINT64    Cr0;
716*1b0b00e3SLawrence Tang   UINT64    Cr1;
717*1b0b00e3SLawrence Tang   UINT64    Cr2;
718*1b0b00e3SLawrence Tang   UINT64    Cr3;
719*1b0b00e3SLawrence Tang   UINT64    Cr4;
720*1b0b00e3SLawrence Tang   UINT64    Gdtr[2];
721*1b0b00e3SLawrence Tang   UINT64    Idtr[2];
722*1b0b00e3SLawrence Tang   UINT16    Ldtr;
723*1b0b00e3SLawrence Tang   UINT16    Tr;
724*1b0b00e3SLawrence Tang } EFI_CONTEXT_X64_REGISTER_STATE;
725*1b0b00e3SLawrence Tang 
726*1b0b00e3SLawrence Tang ///
727*1b0b00e3SLawrence Tang /// The validation bit mask indicates each of the following field is in IA32/X64
728*1b0b00e3SLawrence Tang /// Processor Error Section.
729*1b0b00e3SLawrence Tang ///
730*1b0b00e3SLawrence Tang typedef struct {
731*1b0b00e3SLawrence Tang   UINT64    ApicIdValid     : 1;
732*1b0b00e3SLawrence Tang   UINT64    CpuIdInforValid : 1;
733*1b0b00e3SLawrence Tang   UINT64    ErrorInfoNum    : 6;
734*1b0b00e3SLawrence Tang   UINT64    ContextNum      : 6;
735*1b0b00e3SLawrence Tang   UINT64    Resv1           : 50;
736*1b0b00e3SLawrence Tang } EFI_IA32_X64_VALID_BITS;
737*1b0b00e3SLawrence Tang 
738*1b0b00e3SLawrence Tang #endif
739*1b0b00e3SLawrence Tang 
740*1b0b00e3SLawrence Tang ///
741*1b0b00e3SLawrence Tang /// Error Status Fields
742*1b0b00e3SLawrence Tang ///
743*1b0b00e3SLawrence Tang typedef struct {
744*1b0b00e3SLawrence Tang   UINT64    Resv1               : 8;
745*1b0b00e3SLawrence Tang   UINT64    Type                : 8;
746*1b0b00e3SLawrence Tang   UINT64    AddressSignal       : 1;      ///< Error in Address signals or in Address portion of transaction
747*1b0b00e3SLawrence Tang   UINT64    ControlSignal       : 1;      ///< Error in Control signals or in Control portion of transaction
748*1b0b00e3SLawrence Tang   UINT64    DataSignal          : 1;      ///< Error in Data signals or in Data portion of transaction
749*1b0b00e3SLawrence Tang   UINT64    DetectedByResponder : 1;      ///< Error detected by responder
750*1b0b00e3SLawrence Tang   UINT64    DetectedByRequester : 1;      ///< Error detected by requestor
751*1b0b00e3SLawrence Tang   UINT64    FirstError          : 1;      ///< First Error in the sequence - option field
752*1b0b00e3SLawrence Tang   UINT64    OverflowNotLogged   : 1;      ///< Additional errors were not logged due to lack of resources
753*1b0b00e3SLawrence Tang   UINT64    Resv2               : 41;
754*1b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_STATUS;
755*1b0b00e3SLawrence Tang 
756*1b0b00e3SLawrence Tang ///
757*1b0b00e3SLawrence Tang /// Error Type
758*1b0b00e3SLawrence Tang ///
759*1b0b00e3SLawrence Tang typedef enum {
760*1b0b00e3SLawrence Tang   ///
761*1b0b00e3SLawrence Tang   /// General Internal errors
762*1b0b00e3SLawrence Tang   ///
763*1b0b00e3SLawrence Tang   ErrorInternal = 1,
764*1b0b00e3SLawrence Tang   ErrorBus      = 16,
765*1b0b00e3SLawrence Tang   ///
766*1b0b00e3SLawrence Tang   /// Component Internal errors
767*1b0b00e3SLawrence Tang   ///
768*1b0b00e3SLawrence Tang   ErrorMemStorage     = 4,        // Error in memory device
769*1b0b00e3SLawrence Tang   ErrorTlbStorage     = 5,        // TLB error in cache
770*1b0b00e3SLawrence Tang   ErrorCacheStorage   = 6,
771*1b0b00e3SLawrence Tang   ErrorFunctionalUnit = 7,
772*1b0b00e3SLawrence Tang   ErrorSelftest       = 8,
773*1b0b00e3SLawrence Tang   ErrorOverflow       = 9,
774*1b0b00e3SLawrence Tang   ///
775*1b0b00e3SLawrence Tang   /// Bus internal errors
776*1b0b00e3SLawrence Tang   ///
777*1b0b00e3SLawrence Tang   ErrorVirtualMap      = 17,
778*1b0b00e3SLawrence Tang   ErrorAccessInvalid   = 18,      // Improper access
779*1b0b00e3SLawrence Tang   ErrorUnimplAccess    = 19,      // Unimplemented memory access
780*1b0b00e3SLawrence Tang   ErrorLossOfLockstep  = 20,
781*1b0b00e3SLawrence Tang   ErrorResponseInvalid = 21,       // Response not associated with request
782*1b0b00e3SLawrence Tang   ErrorParity          = 22,
783*1b0b00e3SLawrence Tang   ErrorProtocol        = 23,
784*1b0b00e3SLawrence Tang   ErrorPath            = 24,      // Detected path error
785*1b0b00e3SLawrence Tang   ErrorTimeout         = 25,      // Bus timeout
786*1b0b00e3SLawrence Tang   ErrorPoisoned        = 26       // Read data poisoned
787*1b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_STATUS_ERROR_TYPE;
788*1b0b00e3SLawrence Tang 
789*1b0b00e3SLawrence Tang ///
790*1b0b00e3SLawrence Tang /// Validation bit mask indicates which fields in the memory error record are valid
791*1b0b00e3SLawrence Tang /// in Memory Error section
792*1b0b00e3SLawrence Tang ///@{
793*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID                  BIT0
794*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID                   BIT1
795*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID              BIT2
796*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_NODE_VALID                          BIT3
797*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_CARD_VALID                          BIT4
798*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_MODULE_VALID                        BIT5
799*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_BANK_VALID                          BIT6
800*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_DEVICE_VALID                        BIT7
801*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ROW_VALID                           BIT8
802*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_COLUMN_VALID                        BIT9
803*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_BIT_POS_VALID                       BIT10
804*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID                  BIT11
805*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID                  BIT12
806*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_TARGET_ID_VALID                     BIT13
807*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID                    BIT14
808*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID                BIT15
809*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID             BIT16
810*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID           BIT17
811*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID  BIT18
812*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID              BIT19
813*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_BANK_ADDRESS_VALID            BIT20
814*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_CHIP_IDENTIFICATION_VALID     BIT21
815*1b0b00e3SLawrence Tang ///@}
816*1b0b00e3SLawrence Tang 
817*1b0b00e3SLawrence Tang ///
818*1b0b00e3SLawrence Tang /// Memory Error Type identifies the type of error that occurred in Memory
819*1b0b00e3SLawrence Tang /// Error section
820*1b0b00e3SLawrence Tang ///@{
821*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN                 0x00
822*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_NONE                    0x01
823*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC           0x02
824*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC             0x03
825*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL  0x04
826*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL    0x05
827*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT             0x06
828*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT            0x07
829*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_PARITY                  0x08
830*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_WDT                     0x09
831*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS         0x0A
832*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED           0x0B
833*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SPARING                 0x0C
834*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED         0x0D
835*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED       0x0E
836*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT        0x0F
837*1b0b00e3SLawrence Tang ///@}
838*1b0b00e3SLawrence Tang 
839*1b0b00e3SLawrence Tang ///
840*1b0b00e3SLawrence Tang /// Memory Error Section
841*1b0b00e3SLawrence Tang ///
842*1b0b00e3SLawrence Tang typedef struct {
843*1b0b00e3SLawrence Tang   UINT64                      ValidFields;
844*1b0b00e3SLawrence Tang   EFI_GENERIC_ERROR_STATUS    ErrorStatus;
845*1b0b00e3SLawrence Tang   UINT64                      PhysicalAddress;     // Error physical address
846*1b0b00e3SLawrence Tang   UINT64                      PhysicalAddressMask; // Grnaularity
847*1b0b00e3SLawrence Tang   UINT16                      Node;                // Node #
848*1b0b00e3SLawrence Tang   UINT16                      Card;
849*1b0b00e3SLawrence Tang   UINT16                      ModuleRank;        // Module or Rank#
850*1b0b00e3SLawrence Tang   UINT16                      Bank;
851*1b0b00e3SLawrence Tang   UINT16                      Device;
852*1b0b00e3SLawrence Tang   UINT16                      Row;
853*1b0b00e3SLawrence Tang   UINT16                      Column;
854*1b0b00e3SLawrence Tang   UINT16                      BitPosition;
855*1b0b00e3SLawrence Tang   UINT64                      RequestorId;
856*1b0b00e3SLawrence Tang   UINT64                      ResponderId;
857*1b0b00e3SLawrence Tang   UINT64                      TargetId;
858*1b0b00e3SLawrence Tang   UINT8                       ErrorType;
859*1b0b00e3SLawrence Tang   UINT8                       Extended;
860*1b0b00e3SLawrence Tang   UINT16                      RankNum;
861*1b0b00e3SLawrence Tang   UINT16                      CardHandle;
862*1b0b00e3SLawrence Tang   UINT16                      ModuleHandle;
863*1b0b00e3SLawrence Tang } EFI_PLATFORM_MEMORY_ERROR_DATA;
864*1b0b00e3SLawrence Tang 
865*1b0b00e3SLawrence Tang ///
866*1b0b00e3SLawrence Tang /// Validation bit mask indicates which fields in the memory error record 2 are valid
867*1b0b00e3SLawrence Tang /// in Memory Error section 2
868*1b0b00e3SLawrence Tang ///@{
869*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_STATUS_VALID       BIT0
870*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_VALID        BIT1
871*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_MASK_VALID   BIT2
872*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_NODE_VALID               BIT3
873*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CARD_VALID               BIT4
874*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MODULE_VALID             BIT5
875*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_VALID               BIT6
876*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_DEVICE_VALID             BIT7
877*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ROW_VALID                BIT8
878*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_COLUMN_VALID             BIT9
879*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_RANK_VALID               BIT10
880*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BIT_POS_VALID            BIT11
881*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CHIP_ID_VALID            BIT12
882*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MEMORY_ERROR_TYPE_VALID  BIT13
883*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_STATUS_VALID             BIT14
884*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_REQUESTOR_ID_VALID       BIT15
885*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_RESPONDER_ID_VALID       BIT16
886*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID          BIT17
887*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID        BIT18
888*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID      BIT19
889*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_GROUP_VALID         BIT20
890*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_BANK_ADDRESS_VALID       BIT21
891*1b0b00e3SLawrence Tang ///@}
892*1b0b00e3SLawrence Tang 
893*1b0b00e3SLawrence Tang ///
894*1b0b00e3SLawrence Tang /// Memory Error Type identifies the type of error that occurred in Memory
895*1b0b00e3SLawrence Tang /// Error section 2
896*1b0b00e3SLawrence Tang ///@{
897*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_UNKNOWN                0x00
898*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_NONE                   0x01
899*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SINGLEBIT_ECC          0x02
900*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MLTIBIT_ECC            0x03
901*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SINGLESYMBOL_CHIPKILL  0x04
902*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MULTISYMBOL_CHIPKILL   0x05
903*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MASTER_ABORT           0x06
904*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_TARGET_ABORT           0x07
905*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_PARITY                 0x08
906*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_WDT                    0x09
907*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_INVALID_ADDRESS        0x0A
908*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MIRROR_BROKEN          0x0B
909*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_SPARING         0x0C
910*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_CORRECTED        0x0D
911*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_UNCORRECTED      0x0E
912*1b0b00e3SLawrence Tang #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_MAP_EVENT       0x0F
913*1b0b00e3SLawrence Tang ///@}
914*1b0b00e3SLawrence Tang 
915*1b0b00e3SLawrence Tang ///
916*1b0b00e3SLawrence Tang /// Memory Error Section 2
917*1b0b00e3SLawrence Tang ///
918*1b0b00e3SLawrence Tang typedef struct {
919*1b0b00e3SLawrence Tang   UINT64                      ValidFields;
920*1b0b00e3SLawrence Tang   EFI_GENERIC_ERROR_STATUS    ErrorStatus;
921*1b0b00e3SLawrence Tang   UINT64                      PhysicalAddress;     // Error physical address
922*1b0b00e3SLawrence Tang   UINT64                      PhysicalAddressMask; // Grnaularity
923*1b0b00e3SLawrence Tang   UINT16                      Node;                // Node #
924*1b0b00e3SLawrence Tang   UINT16                      Card;
925*1b0b00e3SLawrence Tang   UINT16                      Module;             // Module or Rank#
926*1b0b00e3SLawrence Tang   UINT16                      Bank;
927*1b0b00e3SLawrence Tang   UINT32                      Device;
928*1b0b00e3SLawrence Tang   UINT32                      Row;
929*1b0b00e3SLawrence Tang   UINT32                      Column;
930*1b0b00e3SLawrence Tang   UINT32                      Rank;
931*1b0b00e3SLawrence Tang   UINT32                      BitPosition;
932*1b0b00e3SLawrence Tang   UINT8                       ChipId;
933*1b0b00e3SLawrence Tang   UINT8                       MemErrorType;
934*1b0b00e3SLawrence Tang   UINT8                       Status;
935*1b0b00e3SLawrence Tang   UINT8                       Reserved;
936*1b0b00e3SLawrence Tang   UINT64                      RequestorId;
937*1b0b00e3SLawrence Tang   UINT64                      ResponderId;
938*1b0b00e3SLawrence Tang   UINT64                      TargetId;
939*1b0b00e3SLawrence Tang   UINT32                      CardHandle;
940*1b0b00e3SLawrence Tang   UINT32                      ModuleHandle;
941*1b0b00e3SLawrence Tang } EFI_PLATFORM_MEMORY2_ERROR_DATA;
942*1b0b00e3SLawrence Tang 
943*1b0b00e3SLawrence Tang ///
944*1b0b00e3SLawrence Tang /// Validation bits mask indicates which of the following fields is valid
945*1b0b00e3SLawrence Tang /// in PCI Express Error Record.
946*1b0b00e3SLawrence Tang ///@{
947*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_TYPE_VALID        BIT0
948*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_VERSION_VALID          BIT1
949*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_COMMAND_STATUS_VALID   BIT2
950*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_DEVICE_ID_VALID        BIT3
951*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_SERIAL_NO_VALID        BIT4
952*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID   BIT5
953*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID  BIT6
954*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_AER_INFO_VALID         BIT7
955*1b0b00e3SLawrence Tang ///@}
956*1b0b00e3SLawrence Tang 
957*1b0b00e3SLawrence Tang ///
958*1b0b00e3SLawrence Tang /// PCIe Device/Port Type as defined in the PCI Express capabilities register
959*1b0b00e3SLawrence Tang ///@{
960*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT         0x00000000
961*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT          0x00000001
962*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_PORT             0x00000004
963*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT         0x00000005
964*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT       0x00000006
965*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE    0x00000007
966*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE    0x00000008
967*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT     0x00000009
968*1b0b00e3SLawrence Tang #define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR  0x0000000A
969*1b0b00e3SLawrence Tang ///@}
970*1b0b00e3SLawrence Tang 
971*1b0b00e3SLawrence Tang ///
972*1b0b00e3SLawrence Tang /// PCI Slot number
973*1b0b00e3SLawrence Tang ///
974*1b0b00e3SLawrence Tang typedef struct {
975*1b0b00e3SLawrence Tang   UINT16    Resv1  : 3;
976*1b0b00e3SLawrence Tang   UINT16    Number : 13;
977*1b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCI_SLOT;
978*1b0b00e3SLawrence Tang 
979*1b0b00e3SLawrence Tang ///
980*1b0b00e3SLawrence Tang /// PCIe Root Port PCI/bridge PCI compatible device number and
981*1b0b00e3SLawrence Tang /// bus number information to uniquely identify the root port or
982*1b0b00e3SLawrence Tang /// bridge. Default values for both the bus numbers is zero.
983*1b0b00e3SLawrence Tang ///
984*1b0b00e3SLawrence Tang typedef struct {
985*1b0b00e3SLawrence Tang   UINT16                        VendorId;
986*1b0b00e3SLawrence Tang   UINT16                        DeviceId;
987*1b0b00e3SLawrence Tang   UINT8                         ClassCode[3];
988*1b0b00e3SLawrence Tang   UINT8                         Function;
989*1b0b00e3SLawrence Tang   UINT8                         Device;
990*1b0b00e3SLawrence Tang   UINT16                        Segment;
991*1b0b00e3SLawrence Tang   UINT8                         PrimaryOrDeviceBus;
992*1b0b00e3SLawrence Tang   UINT8                         SecondaryBus;
993*1b0b00e3SLawrence Tang   EFI_GENERIC_ERROR_PCI_SLOT    Slot;
994*1b0b00e3SLawrence Tang   UINT8                         Resv1;
995*1b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID;
996*1b0b00e3SLawrence Tang 
997*1b0b00e3SLawrence Tang ///
998*1b0b00e3SLawrence Tang /// PCIe Capability Structure
999*1b0b00e3SLawrence Tang ///
1000*1b0b00e3SLawrence Tang typedef struct {
1001*1b0b00e3SLawrence Tang   UINT8    PcieCap[60];
1002*1b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA_CAPABILITY;
1003*1b0b00e3SLawrence Tang 
1004*1b0b00e3SLawrence Tang ///
1005*1b0b00e3SLawrence Tang /// PCIe Advanced Error Reporting Extended Capability Structure.
1006*1b0b00e3SLawrence Tang ///
1007*1b0b00e3SLawrence Tang typedef struct {
1008*1b0b00e3SLawrence Tang   UINT8    PcieAer[96];
1009*1b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA_AER;
1010*1b0b00e3SLawrence Tang 
1011*1b0b00e3SLawrence Tang ///
1012*1b0b00e3SLawrence Tang /// PCI Express Error Record
1013*1b0b00e3SLawrence Tang ///
1014*1b0b00e3SLawrence Tang typedef struct {
1015*1b0b00e3SLawrence Tang   UINT64                                  ValidFields;
1016*1b0b00e3SLawrence Tang   UINT32                                  PortType;
1017*1b0b00e3SLawrence Tang   UINT32                                  Version;
1018*1b0b00e3SLawrence Tang   UINT32                                  CommandStatus;
1019*1b0b00e3SLawrence Tang   UINT32                                  Resv2;
1020*1b0b00e3SLawrence Tang   EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID    DevBridge;
1021*1b0b00e3SLawrence Tang   UINT64                                  SerialNo;
1022*1b0b00e3SLawrence Tang   UINT32                                  BridgeControlStatus;
1023*1b0b00e3SLawrence Tang   EFI_PCIE_ERROR_DATA_CAPABILITY          Capability;
1024*1b0b00e3SLawrence Tang   EFI_PCIE_ERROR_DATA_AER                 AerInfo;
1025*1b0b00e3SLawrence Tang } EFI_PCIE_ERROR_DATA;
1026*1b0b00e3SLawrence Tang 
1027*1b0b00e3SLawrence Tang ///
1028*1b0b00e3SLawrence Tang /// Validation bits Indicates which of the following fields is valid
1029*1b0b00e3SLawrence Tang /// in PCI/PCI-X Bus Error Section.
1030*1b0b00e3SLawrence Tang ///@{
1031*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID        BIT0
1032*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID          BIT1
1033*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID        BIT2
1034*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID   BIT3
1035*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID      BIT4
1036*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID       BIT5
1037*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID  BIT6
1038*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID  BIT7
1039*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID     BIT8
1040*1b0b00e3SLawrence Tang ///@}
1041*1b0b00e3SLawrence Tang 
1042*1b0b00e3SLawrence Tang ///
1043*1b0b00e3SLawrence Tang /// PCI Bus Error Type in PCI/PCI-X Bus Error Section
1044*1b0b00e3SLawrence Tang ///@{
1045*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN             0x0000
1046*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY         0x0001
1047*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_SYSTEM              0x0002
1048*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT        0x0003
1049*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT         0x0004
1050*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY  0x0005
1051*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY      0x0006
1052*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY      0x0007
1053*1b0b00e3SLawrence Tang ///@}
1054*1b0b00e3SLawrence Tang 
1055*1b0b00e3SLawrence Tang ///
1056*1b0b00e3SLawrence Tang /// PCI/PCI-X Bus Error Section
1057*1b0b00e3SLawrence Tang ///
1058*1b0b00e3SLawrence Tang typedef struct {
1059*1b0b00e3SLawrence Tang   UINT64                      ValidFields;
1060*1b0b00e3SLawrence Tang   EFI_GENERIC_ERROR_STATUS    ErrorStatus;
1061*1b0b00e3SLawrence Tang   UINT16                      Type;
1062*1b0b00e3SLawrence Tang   UINT16                      BusId;
1063*1b0b00e3SLawrence Tang   UINT32                      Resv2;
1064*1b0b00e3SLawrence Tang   UINT64                      BusAddress;
1065*1b0b00e3SLawrence Tang   UINT64                      BusData;
1066*1b0b00e3SLawrence Tang   UINT64                      BusCommand;
1067*1b0b00e3SLawrence Tang   UINT64                      RequestorId;
1068*1b0b00e3SLawrence Tang   UINT64                      ResponderId;
1069*1b0b00e3SLawrence Tang   UINT64                      TargetId;
1070*1b0b00e3SLawrence Tang } EFI_PCI_PCIX_BUS_ERROR_DATA;
1071*1b0b00e3SLawrence Tang 
1072*1b0b00e3SLawrence Tang ///
1073*1b0b00e3SLawrence Tang /// Validation bits Indicates which of the following fields is valid
1074*1b0b00e3SLawrence Tang /// in PCI/PCI-X Component Error Section.
1075*1b0b00e3SLawrence Tang ///@{
1076*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID         BIT0
1077*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID        BIT1
1078*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID        BIT2
1079*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID         BIT3
1080*1b0b00e3SLawrence Tang #define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID  BIT4
1081*1b0b00e3SLawrence Tang ///@}
1082*1b0b00e3SLawrence Tang 
1083*1b0b00e3SLawrence Tang ///
1084*1b0b00e3SLawrence Tang /// PCI/PCI-X Device Identification Information
1085*1b0b00e3SLawrence Tang ///
1086*1b0b00e3SLawrence Tang typedef struct {
1087*1b0b00e3SLawrence Tang   UINT16    VendorId;
1088*1b0b00e3SLawrence Tang   UINT16    DeviceId;
1089*1b0b00e3SLawrence Tang   UINT8     ClassCode[3];
1090*1b0b00e3SLawrence Tang   UINT8     Function;
1091*1b0b00e3SLawrence Tang   UINT8     Device;
1092*1b0b00e3SLawrence Tang   UINT8     Bus;
1093*1b0b00e3SLawrence Tang   UINT8     Segment;
1094*1b0b00e3SLawrence Tang   UINT8     Resv1;
1095*1b0b00e3SLawrence Tang   UINT32    Resv2;
1096*1b0b00e3SLawrence Tang } EFI_GENERIC_ERROR_PCI_DEVICE_ID;
1097*1b0b00e3SLawrence Tang 
1098*1b0b00e3SLawrence Tang ///
1099*1b0b00e3SLawrence Tang /// Identifies the type of firmware error record
1100*1b0b00e3SLawrence Tang ///@{
1101*1b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL    0x00
1102*1b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE1  0x01
1103*1b0b00e3SLawrence Tang #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE2  0x02
1104*1b0b00e3SLawrence Tang ///@}
1105*1b0b00e3SLawrence Tang 
1106*1b0b00e3SLawrence Tang ///
1107*1b0b00e3SLawrence Tang /// Firmware Error Record Section
1108*1b0b00e3SLawrence Tang ///
1109*1b0b00e3SLawrence Tang typedef struct {
1110*1b0b00e3SLawrence Tang   UINT8       ErrorType;
1111*1b0b00e3SLawrence Tang   UINT8       Revision;
1112*1b0b00e3SLawrence Tang   UINT8       Resv1[6];
1113*1b0b00e3SLawrence Tang   UINT64      RecordId;
1114*1b0b00e3SLawrence Tang   EFI_GUID    RecordIdGuid;
1115*1b0b00e3SLawrence Tang } EFI_FIRMWARE_ERROR_DATA;
1116*1b0b00e3SLawrence Tang 
1117*1b0b00e3SLawrence Tang ///
1118*1b0b00e3SLawrence Tang /// Fault Reason in DMAr Generic Error Section
1119*1b0b00e3SLawrence Tang ///@{
1120*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT            0x01
1121*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID                0x02
1122*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR         0x03
1123*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE    0x04
1124*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE           0x05
1125*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_ACCESS                     0x06
1126*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_REQUEST                    0x07
1127*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR       0x08
1128*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE  0x09
1129*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_INVALID_COMMAOND                   0x0A
1130*1b0b00e3SLawrence Tang #define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR        0x0B
1131*1b0b00e3SLawrence Tang ///@}
1132*1b0b00e3SLawrence Tang 
1133*1b0b00e3SLawrence Tang ///
1134*1b0b00e3SLawrence Tang /// DMA access type in DMAr Generic Error Section
1135*1b0b00e3SLawrence Tang ///@{
1136*1b0b00e3SLawrence Tang #define EFI_DMA_ACCESS_TYPE_READ   0x00
1137*1b0b00e3SLawrence Tang #define EFI_DMA_ACCESS_TYPE_WRITE  0x01
1138*1b0b00e3SLawrence Tang ///@}
1139*1b0b00e3SLawrence Tang 
1140*1b0b00e3SLawrence Tang ///
1141*1b0b00e3SLawrence Tang /// DMA address type in DMAr Generic Error Section
1142*1b0b00e3SLawrence Tang ///@{
1143*1b0b00e3SLawrence Tang #define EFI_DMA_ADDRESS_UNTRANSLATED  0x00
1144*1b0b00e3SLawrence Tang #define EFI_DMA_ADDRESS_TRANSLATION   0x01
1145*1b0b00e3SLawrence Tang ///@}
1146*1b0b00e3SLawrence Tang 
1147*1b0b00e3SLawrence Tang ///
1148*1b0b00e3SLawrence Tang /// Architecture type in DMAr Generic Error Section
1149*1b0b00e3SLawrence Tang ///@{
1150*1b0b00e3SLawrence Tang #define EFI_DMA_ARCH_TYPE_VT     0x01
1151*1b0b00e3SLawrence Tang #define EFI_DMA_ARCH_TYPE_IOMMU  0x02
1152*1b0b00e3SLawrence Tang ///@}
1153*1b0b00e3SLawrence Tang 
1154*1b0b00e3SLawrence Tang ///
1155*1b0b00e3SLawrence Tang /// DMAr Generic Error Section
1156*1b0b00e3SLawrence Tang ///
1157*1b0b00e3SLawrence Tang typedef struct {
1158*1b0b00e3SLawrence Tang   UINT16    RequesterId;
1159*1b0b00e3SLawrence Tang   UINT16    SegmentNumber;
1160*1b0b00e3SLawrence Tang   UINT8     FaultReason;
1161*1b0b00e3SLawrence Tang   UINT8     AccessType;
1162*1b0b00e3SLawrence Tang   UINT8     AddressType;
1163*1b0b00e3SLawrence Tang   UINT8     ArchType;
1164*1b0b00e3SLawrence Tang   UINT64    DeviceAddr;
1165*1b0b00e3SLawrence Tang   UINT8     Resv1[16];
1166*1b0b00e3SLawrence Tang } EFI_DMAR_GENERIC_ERROR_DATA;
1167*1b0b00e3SLawrence Tang 
1168*1b0b00e3SLawrence Tang ///
1169*1b0b00e3SLawrence Tang /// Intel VT for Directed I/O specific DMAr Errors
1170*1b0b00e3SLawrence Tang ///
1171*1b0b00e3SLawrence Tang typedef struct {
1172*1b0b00e3SLawrence Tang   UINT8     Version;
1173*1b0b00e3SLawrence Tang   UINT8     Revision;
1174*1b0b00e3SLawrence Tang   UINT8     OemId[6];
1175*1b0b00e3SLawrence Tang   UINT64    Capability;
1176*1b0b00e3SLawrence Tang   UINT64    CapabilityEx;
1177*1b0b00e3SLawrence Tang   UINT32    GlobalCommand;
1178*1b0b00e3SLawrence Tang   UINT32    GlobalStatus;
1179*1b0b00e3SLawrence Tang   UINT32    FaultStatus;
1180*1b0b00e3SLawrence Tang   UINT8     Resv1[12];
1181*1b0b00e3SLawrence Tang   UINT64    FaultRecord[2];
1182*1b0b00e3SLawrence Tang   UINT64    RootEntry[2];
1183*1b0b00e3SLawrence Tang   UINT64    ContextEntry[2];
1184*1b0b00e3SLawrence Tang   UINT64    PteL6;
1185*1b0b00e3SLawrence Tang   UINT64    PteL5;
1186*1b0b00e3SLawrence Tang   UINT64    PteL4;
1187*1b0b00e3SLawrence Tang   UINT64    PteL3;
1188*1b0b00e3SLawrence Tang   UINT64    PteL2;
1189*1b0b00e3SLawrence Tang   UINT64    PteL1;
1190*1b0b00e3SLawrence Tang } EFI_DIRECTED_IO_DMAR_ERROR_DATA;
1191*1b0b00e3SLawrence Tang 
1192*1b0b00e3SLawrence Tang ///
1193*1b0b00e3SLawrence Tang /// IOMMU specific DMAr Errors
1194*1b0b00e3SLawrence Tang ///
1195*1b0b00e3SLawrence Tang typedef struct {
1196*1b0b00e3SLawrence Tang   UINT8     Revision;
1197*1b0b00e3SLawrence Tang   UINT8     Resv1[7];
1198*1b0b00e3SLawrence Tang   UINT64    Control;
1199*1b0b00e3SLawrence Tang   UINT64    Status;
1200*1b0b00e3SLawrence Tang   UINT8     Resv2[8];
1201*1b0b00e3SLawrence Tang   UINT64    EventLogEntry[2];
1202*1b0b00e3SLawrence Tang   UINT8     Resv3[16];
1203*1b0b00e3SLawrence Tang   UINT64    DeviceTableEntry[4];
1204*1b0b00e3SLawrence Tang   UINT64    PteL6;
1205*1b0b00e3SLawrence Tang   UINT64    PteL5;
1206*1b0b00e3SLawrence Tang   UINT64    PteL4;
1207*1b0b00e3SLawrence Tang   UINT64    PteL3;
1208*1b0b00e3SLawrence Tang   UINT64    PteL2;
1209*1b0b00e3SLawrence Tang   UINT64    PteL1;
1210*1b0b00e3SLawrence Tang } EFI_IOMMU_DMAR_ERROR_DATA;
1211*1b0b00e3SLawrence Tang 
1212*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeCmcGuid;
1213*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeCpeGuid;
1214*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeMceGuid;
1215*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypePcieGuid;
1216*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeInitGuid;
1217*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeNmiGuid;
1218*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeBootGuid;
1219*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeDmarGuid;
1220*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeSeaGuid;
1221*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeSeiGuid;
1222*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypePeiGuid;
1223*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiEventNotificationTypeCxlGuid;
1224*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiProcessorGenericErrorSectionGuid;
1225*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiProcessorSpecificErrorSectionGuid;
1226*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiIa32X64ProcessorErrorSectionGuid;
1227*1b0b00e3SLawrence Tang //todo: Why does the IPF GUID have an excess of elements?
1228*1b0b00e3SLawrence Tang //extern EFI_GUID   gEfiIpfProcessorErrorSectionGuid;
1229*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiArmProcessorErrorSectionGuid;
1230*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiPlatformMemoryErrorSectionGuid;
1231*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiPcieErrorSectionGuid;
1232*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiFirmwareErrorSectionGuid;
1233*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiPciBusErrorSectionGuid;
1234*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiPciDevErrorSectionGuid;
1235*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiDMArGenericErrorSectionGuid;
1236*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiDirectedIoDMArErrorSectionGuid;
1237*1b0b00e3SLawrence Tang extern EFI_GUID   gEfiIommuDMArErrorSectionGuid;
1238*1b0b00e3SLawrence Tang 
1239*1b0b00e3SLawrence Tang #pragma pack()
1240*1b0b00e3SLawrence Tang 
1241*1b0b00e3SLawrence Tang #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
1242*1b0b00e3SLawrence Tang ///
1243*1b0b00e3SLawrence Tang /// IA32 and x64 Specific definitions.
1244*1b0b00e3SLawrence Tang ///
1245*1b0b00e3SLawrence Tang 
1246*1b0b00e3SLawrence Tang extern EFI_GUID  gEfiIa32X64ErrorTypeCacheCheckGuid;
1247*1b0b00e3SLawrence Tang extern EFI_GUID  gEfiIa32X64ErrorTypeTlbCheckGuid;
1248*1b0b00e3SLawrence Tang extern EFI_GUID  gEfiIa32X64ErrorTypeBusCheckGuid;
1249*1b0b00e3SLawrence Tang extern EFI_GUID  gEfiIa32X64ErrorTypeMsCheckGuid;
1250*1b0b00e3SLawrence Tang 
1251*1b0b00e3SLawrence Tang #endif
1252*1b0b00e3SLawrence Tang 
1253*1b0b00e3SLawrence Tang #endif
1254