1 /* 2 * Copyright (c) 2003 Sun Microsystems, Inc. All Rights Reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * Redistribution of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 11 * Redistribution in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * Neither the name of Sun Microsystems, Inc. or the names of 16 * contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * This software is provided "AS IS," without a warranty of any kind. 20 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 21 * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. 23 * SUN MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE 24 * FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING 25 * OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL 26 * SUN OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, 27 * OR FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR 28 * PUNITIVE DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF 29 * LIABILITY, ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, 30 * EVEN IF SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 31 */ 32 33 #include <stddef.h> 34 #include <ipmitool/ipmi_strings.h> 35 #include <ipmitool/ipmi_constants.h> 36 #include <ipmitool/ipmi_sensor.h> 37 #include <ipmitool/ipmi_sel.h> /* for IPMI_OEM */ 38 39 const struct valstr ipmi_oem_info[] = { 40 41 { IPMI_OEM_UNKNOWN, "Unknown" }, 42 { IPMI_OEM_HP, "Hewlett-Packard" }, 43 { IPMI_OEM_SUN, "Sun Microsystems" }, 44 { IPMI_OEM_INTEL, "Intel Corporation" }, 45 { IPMI_OEM_LMC, "LMC" }, 46 { IPMI_OEM_RADISYS, "RadiSys Corporation" }, 47 { IPMI_OEM_TYAN, "Tyan Computer Corporation" }, 48 { IPMI_OEM_NEWISYS, "Newisys" }, 49 { IPMI_OEM_SUPERMICRO, "Supermicro" }, 50 { IPMI_OEM_GOOGLE, "Google" }, 51 { IPMI_OEM_KONTRON, "Kontron" }, 52 { IPMI_OEM_NOKIA, "Nokia" }, 53 { IPMI_OEM_PICMG, "PICMG" }, 54 { IPMI_OEM_PEPPERCON, "Peppercon AG" }, 55 { IPMI_OEM_DELL, "DELL Inc" }, 56 { IPMI_OEM_NEC, "NEC" }, 57 { IPMI_OEM_MAGNUM, "Magnum Technologies" }, 58 { IPMI_OEM_FUJITSU_SIEMENS, "Fujitsu Siemens" }, 59 { IPMI_OEM_TATUNG, "Tatung" }, 60 { IPMI_OEM_AMI, "AMI" }, 61 { IPMI_OEM_RARITAN, "Raritan" }, 62 { IPMI_OEM_AVOCENT, "Avocent" }, 63 { IPMI_OEM_OSA, "OSA" }, 64 { IPMI_OEM_TOSHIBA, "Toshiba" }, 65 { IPMI_OEM_HITACHI_116, "Hitachi" }, 66 { IPMI_OEM_HITACHI_399, "Hitachi" }, 67 { IPMI_OEM_NOKIA_SIEMENS_NETWORKS, "Nokia Siemens Networks" }, 68 { IPMI_OEM_BULL, "Bull Company" }, 69 { IPMI_OEM_PPS, "Pigeon Point Systems" }, 70 { IPMI_OEM_BROADCOM, "Broadcom Corporation" }, 71 { 0xffff , NULL }, 72 }; 73 74 const struct oemvalstr ipmi_oem_product_info[] = { 75 /* Keep OEM grouped together */ 76 /* Intel stuff, thanks to Tim Bell */ 77 { IPMI_OEM_INTEL, 0x000C, "TSRLT2" }, 78 { IPMI_OEM_INTEL, 0x001B, "TIGPR2U" }, 79 { IPMI_OEM_INTEL, 0x0022, "TIGI2U" }, 80 { IPMI_OEM_INTEL, 0x0026, "Bridgeport" }, 81 { IPMI_OEM_INTEL, 0x0028, "S5000PAL" }, 82 { IPMI_OEM_INTEL, 0x0029, "S5000PSL" }, 83 { IPMI_OEM_INTEL, 0x0100, "Tiger4" }, 84 { IPMI_OEM_INTEL, 0x0103, "McCarran" }, 85 { IPMI_OEM_INTEL, 0x0800, "ZT5504" }, 86 { IPMI_OEM_INTEL, 0x0808, "MPCBL0001" }, 87 { IPMI_OEM_INTEL, 0x0811, "TIGW1U" }, 88 { IPMI_OEM_INTEL, 0x4311, "NSI2U" }, 89 /* Kontron */ 90 { IPMI_OEM_KONTRON,4000, "AM4000 AdvancedMC" }, 91 { IPMI_OEM_KONTRON,4001, "AM4001 AdvancedMC" }, 92 { IPMI_OEM_KONTRON,4002, "AM4002 AdvancedMC" }, 93 { IPMI_OEM_KONTRON,4010, "AM4010 AdvancedMC" }, 94 { IPMI_OEM_KONTRON,5503, "AM4500/4520 AdvancedMC" }, 95 { IPMI_OEM_KONTRON,5504, "AM4300 AdvancedMC" }, 96 { IPMI_OEM_KONTRON,5507, "AM4301 AdvancedMC" }, 97 { IPMI_OEM_KONTRON,5508, "AM4330 AdvancedMC" }, 98 { IPMI_OEM_KONTRON,5520, "KTC5520/EATX" }, 99 { IPMI_OEM_KONTRON,5703, "RTM8020" }, 100 { IPMI_OEM_KONTRON,5704, "RTM8030" }, 101 { IPMI_OEM_KONTRON,5705, "RTM8050" }, 102 { IPMI_OEM_KONTRON,6000, "CP6000" }, 103 { IPMI_OEM_KONTRON,6006, "DT-64" }, 104 { IPMI_OEM_KONTRON,6010, "CP6010" }, 105 { IPMI_OEM_KONTRON,6011, "CP6011" }, 106 { IPMI_OEM_KONTRON,6012, "CP6012" }, 107 { IPMI_OEM_KONTRON,6014, "CP6014" }, 108 { IPMI_OEM_KONTRON,5002, "AT8001" }, 109 { IPMI_OEM_KONTRON,5003, "AT8010" }, 110 { IPMI_OEM_KONTRON,5004, "AT8020" }, 111 { IPMI_OEM_KONTRON,5006, "AT8030 IPMC" }, 112 { IPMI_OEM_KONTRON,2025, "AT8030 MMC" }, 113 { IPMI_OEM_KONTRON,5007, "AT8050" }, 114 { IPMI_OEM_KONTRON,5301, "AT8400" }, 115 { IPMI_OEM_KONTRON,5303, "AT8901" }, 116 /* Broadcom */ 117 { IPMI_OEM_BROADCOM, 5725, "BCM5725" }, 118 119 { 0xffffff , 0xffff , NULL }, 120 }; 121 122 const struct oemvalstr ipmi_oem_sdr_type_vals[] = { 123 /* Keep OEM grouped together */ 124 { IPMI_OEM_KONTRON , 0xC0 , "OEM Firmware Info" }, 125 { IPMI_OEM_KONTRON , 0xC2 , "OEM Init Agent" }, 126 { IPMI_OEM_KONTRON , 0xC3 , "OEM IPMBL Link State" }, 127 { IPMI_OEM_KONTRON , 0xC4 , "OEM Board Reset" }, 128 { IPMI_OEM_KONTRON , 0xC5 , "OEM FRU Information Agent" }, 129 { IPMI_OEM_KONTRON , 0xC6 , "OEM POST Value Sensor" }, 130 { IPMI_OEM_KONTRON , 0xC7 , "OEM FWUM Status" }, 131 { IPMI_OEM_KONTRON , 0xC8 , "OEM Switch Mngt Software Status" }, 132 { IPMI_OEM_KONTRON , 0xC9 , "OEM OEM Diagnostic Status" }, 133 { IPMI_OEM_KONTRON , 0xCA , "OEM Component Firmware Upgrade" }, 134 { IPMI_OEM_KONTRON , 0xCB , "OEM FRU Over Current" }, 135 { IPMI_OEM_KONTRON , 0xCC , "OEM FRU Sensor Error" }, 136 { IPMI_OEM_KONTRON , 0xCD , "OEM FRU Power Denied" }, 137 { IPMI_OEM_KONTRON , 0xCE , "OEM Reserved" }, 138 { IPMI_OEM_KONTRON , 0xCF , "OEM Board Reset" }, 139 { IPMI_OEM_KONTRON , 0xD0 , "OEM Clock Resource Control" }, 140 { IPMI_OEM_KONTRON , 0xD1 , "OEM Power State" }, 141 { IPMI_OEM_KONTRON , 0xD2 , "OEM FRU Mngt Power Failure" }, 142 { IPMI_OEM_KONTRON , 0xD3 , "OEM Jumper Status" }, 143 { IPMI_OEM_KONTRON , 0xF2 , "OEM RTM Module Hotswap" }, 144 145 { IPMI_OEM_PICMG , 0xF0 , "PICMG FRU Hotswap" }, 146 { IPMI_OEM_PICMG , 0xF1 , "PICMG IPMB0 Link State" }, 147 { IPMI_OEM_PICMG , 0xF2 , "PICMG Module Hotswap" }, 148 149 { 0xffffff, 0x00, NULL } 150 }; 151 152 const struct valstr ipmi_netfn_vals[] = { 153 { IPMI_NETFN_CHASSIS, "Chassis" }, 154 { IPMI_NETFN_BRIDGE, "Bridge" }, 155 { IPMI_NETFN_SE, "SensorEvent" }, 156 { IPMI_NETFN_APP, "Application" }, 157 { IPMI_NETFN_FIRMWARE, "Firmware" }, 158 { IPMI_NETFN_STORAGE, "Storage" }, 159 { IPMI_NETFN_TRANSPORT, "Transport" }, 160 { 0xff, NULL }, 161 }; 162 163 /* 164 * From table 26-4 of the IPMI v2 specification 165 */ 166 const struct valstr ipmi_bit_rate_vals[] = { 167 { 0x00, "IPMI-Over-Serial-Setting"}, /* Using the value in the IPMI Over Serial Config */ 168 { 0x06, "9.6" }, 169 { 0x07, "19.2" }, 170 { 0x08, "38.4" }, 171 { 0x09, "57.6" }, 172 { 0x0A, "115.2" }, 173 { 0x00, NULL }, 174 }; 175 176 const struct valstr ipmi_channel_activity_type_vals[] = { 177 { 0, "IPMI Messaging session active" }, 178 { 1, "Callback Messaging session active" }, 179 { 2, "Dial-out Alert active" }, 180 { 3, "TAP Page Active" }, 181 { 0x00, NULL }, 182 }; 183 184 185 const struct valstr ipmi_privlvl_vals[] = { 186 { IPMI_SESSION_PRIV_CALLBACK, "CALLBACK" }, 187 { IPMI_SESSION_PRIV_USER, "USER" }, 188 { IPMI_SESSION_PRIV_OPERATOR, "OPERATOR" }, 189 { IPMI_SESSION_PRIV_ADMIN, "ADMINISTRATOR" }, 190 { IPMI_SESSION_PRIV_OEM, "OEM" }, 191 { 0xF, "NO ACCESS" }, 192 { 0xFF, NULL }, 193 }; 194 195 196 const struct valstr ipmi_set_in_progress_vals[] = { 197 { IPMI_SET_IN_PROGRESS_SET_COMPLETE, "set-complete" }, 198 { IPMI_SET_IN_PROGRESS_IN_PROGRESS, "set-in-progress" }, 199 { IPMI_SET_IN_PROGRESS_COMMIT_WRITE, "commit-write" }, 200 { 0, NULL }, 201 }; 202 203 204 const struct valstr ipmi_authtype_session_vals[] = { 205 { IPMI_SESSION_AUTHTYPE_NONE, "NONE" }, 206 { IPMI_SESSION_AUTHTYPE_MD2, "MD2" }, 207 { IPMI_SESSION_AUTHTYPE_MD5, "MD5" }, 208 { IPMI_SESSION_AUTHTYPE_PASSWORD, "PASSWORD" }, 209 { IPMI_SESSION_AUTHTYPE_OEM, "OEM" }, 210 { IPMI_SESSION_AUTHTYPE_RMCP_PLUS,"RMCP+" }, 211 { 0xFF, NULL }, 212 }; 213 214 215 const struct valstr ipmi_authtype_vals[] = { 216 { IPMI_1_5_AUTH_TYPE_BIT_NONE, "NONE" }, 217 { IPMI_1_5_AUTH_TYPE_BIT_MD2, "MD2" }, 218 { IPMI_1_5_AUTH_TYPE_BIT_MD5, "MD5" }, 219 { IPMI_1_5_AUTH_TYPE_BIT_PASSWORD, "PASSWORD" }, 220 { IPMI_1_5_AUTH_TYPE_BIT_OEM, "OEM" }, 221 { 0, NULL }, 222 }; 223 224 const struct valstr entity_id_vals[] = { 225 { 0x00, "Unspecified" }, 226 { 0x01, "Other" }, 227 { 0x02, "Unknown" }, 228 { 0x03, "Processor" }, 229 { 0x04, "Disk or Disk Bay" }, 230 { 0x05, "Peripheral Bay" }, 231 { 0x06, "System Management Module" }, 232 { 0x07, "System Board" }, 233 { 0x08, "Memory Module" }, 234 { 0x09, "Processor Module" }, 235 { 0x0a, "Power Supply" }, 236 { 0x0b, "Add-in Card" }, 237 { 0x0c, "Front Panel Board" }, 238 { 0x0d, "Back Panel Board" }, 239 { 0x0e, "Power System Board" }, 240 { 0x0f, "Drive Backplane" }, 241 { 0x10, "System Internal Expansion Board" }, 242 { 0x11, "Other System Board" }, 243 { 0x12, "Processor Board" }, 244 { 0x13, "Power Unit" }, 245 { 0x14, "Power Module" }, 246 { 0x15, "Power Management" }, 247 { 0x16, "Chassis Back Panel Board" }, 248 { 0x17, "System Chassis" }, 249 { 0x18, "Sub-Chassis" }, 250 { 0x19, "Other Chassis Board" }, 251 { 0x1a, "Disk Drive Bay" }, 252 { 0x1b, "Peripheral Bay" }, 253 { 0x1c, "Device Bay" }, 254 { 0x1d, "Fan Device" }, 255 { 0x1e, "Cooling Unit" }, 256 { 0x1f, "Cable/Interconnect" }, 257 { 0x20, "Memory Device" }, 258 { 0x21, "System Management Software" }, 259 { 0x22, "BIOS" }, 260 { 0x23, "Operating System" }, 261 { 0x24, "System Bus" }, 262 { 0x25, "Group" }, 263 { 0x26, "Remote Management Device" }, 264 { 0x27, "External Environment" }, 265 { 0x28, "Battery" }, 266 { 0x29, "Processing Blade" }, 267 { 0x2A, "Connectivity Switch" }, 268 { 0x2B, "Processor/Memory Module" }, 269 { 0x2C, "I/O Module" }, 270 { 0x2D, "Processor/IO Module" }, 271 { 0x2E, "Management Controller Firmware" }, 272 { 0x2F, "IPMI Channel" }, 273 { 0x30, "PCI Bus" }, 274 { 0x31, "PCI Express Bus" }, 275 { 0x32, "SCSI Bus (parallel)" }, 276 { 0x33, "SATA/SAS Bus" }, 277 { 0x34, "Processor/Front-Side Bus" }, 278 { 0x35, "Real Time Clock(RTC)" }, 279 { 0x36, "Reserved" }, 280 { 0x37, "Air Inlet" }, 281 { 0x38, "Reserved" }, 282 { 0x39, "Reserved" }, 283 { 0x3A, "Reserved" }, 284 { 0x3B, "Reserved" }, 285 { 0x3C, "Reserved" }, 286 { 0x3D, "Reserved" }, 287 { 0x3E, "Reserved" }, 288 { 0x3F, "Reserved" }, 289 { 0x40, "Air Inlet" }, 290 { 0x41, "Processor" }, 291 { 0x42, "Baseboard/Main System Board" }, 292 /* PICMG */ 293 { 0xA0, "PICMG Front Board" }, 294 { 0xC0, "PICMG Rear Transition Module" }, 295 { 0xC1, "PICMG AdvancedMC Module" }, 296 { 0xF0, "PICMG Shelf Management Controller" }, 297 { 0xF1, "PICMG Filtration Unit" }, 298 { 0xF2, "PICMG Shelf FRU Information" }, 299 { 0xF3, "PICMG Alarm Panel" }, 300 { 0x00, NULL }, 301 }; 302 303 const struct valstr entity_device_type_vals[] = { 304 { 0x00, "Reserved" }, 305 { 0x01, "Reserved" }, 306 { 0x02, "DS1624 temperature sensor" }, 307 { 0x03, "DS1621 temperature sensor" }, 308 { 0x04, "LM75 Temperature Sensor" }, 309 { 0x05, "Heceta ASIC" }, 310 { 0x06, "Reserved" }, 311 { 0x07, "Reserved" }, 312 { 0x08, "EEPROM, 24C01" }, 313 { 0x09, "EEPROM, 24C02" }, 314 { 0x0a, "EEPROM, 24C04" }, 315 { 0x0b, "EEPROM, 24C08" }, 316 { 0x0c, "EEPROM, 24C16" }, 317 { 0x0d, "EEPROM, 24C17" }, 318 { 0x0e, "EEPROM, 24C32" }, 319 { 0x0f, "EEPROM, 24C64" }, 320 { 0x1000, "IPMI FRU Inventory" }, 321 { 0x1001, "DIMM Memory ID" }, 322 { 0x1002, "IPMI FRU Inventory" }, 323 { 0x1003, "System Processor Cartridge FRU" }, 324 { 0x11, "Reserved" }, 325 { 0x12, "Reserved" }, 326 { 0x13, "Reserved" }, 327 { 0x14, "PCF 8570 256 byte RAM" }, 328 { 0x15, "PCF 8573 clock/calendar" }, 329 { 0x16, "PCF 8574A I/O Port" }, 330 { 0x17, "PCF 8583 clock/calendar" }, 331 { 0x18, "PCF 8593 clock/calendar" }, 332 { 0x19, "Clock calendar" }, 333 { 0x1a, "PCF 8591 A/D, D/A Converter" }, 334 { 0x1b, "I/O Port" }, 335 { 0x1c, "A/D Converter" }, 336 { 0x1d, "D/A Converter" }, 337 { 0x1e, "A/D, D/A Converter" }, 338 { 0x1f, "LCD Controller/Driver" }, 339 { 0x20, "Core Logic (Chip set) Device" }, 340 { 0x21, "LMC6874 Intelligent Battery controller" }, 341 { 0x22, "Intelligent Batter controller" }, 342 { 0x23, "Combo Management ASIC" }, 343 { 0x24, "Maxim 1617 Temperature Sensor" }, 344 { 0xbf, "Other/Unspecified" }, 345 { 0x00, NULL }, 346 }; 347 348 const struct valstr ipmi_channel_protocol_vals[] = { 349 { 0x00, "reserved" }, 350 { 0x01, "IPMB-1.0" }, 351 { 0x02, "ICMB-1.0" }, 352 { 0x03, "reserved" }, 353 { 0x04, "IPMI-SMBus" }, 354 { 0x05, "KCS" }, 355 { 0x06, "SMIC" }, 356 { 0x07, "BT-10" }, 357 { 0x08, "BT-15" }, 358 { 0x09, "TMode" }, 359 { 0x1c, "OEM 1" }, 360 { 0x1d, "OEM 2" }, 361 { 0x1e, "OEM 3" }, 362 { 0x1f, "OEM 4" }, 363 { 0x00, NULL }, 364 }; 365 366 367 const struct valstr ipmi_channel_medium_vals[] = { 368 { IPMI_CHANNEL_MEDIUM_RESERVED, "reserved" }, 369 { IPMI_CHANNEL_MEDIUM_IPMB_I2C, "IPMB (I2C)" }, 370 { IPMI_CHANNEL_MEDIUM_ICMB_1, "ICMB v1.0" }, 371 { IPMI_CHANNEL_MEDIUM_ICMB_09, "ICMB v0.9" }, 372 { IPMI_CHANNEL_MEDIUM_LAN, "802.3 LAN" }, 373 { IPMI_CHANNEL_MEDIUM_SERIAL, "Serial/Modem" }, 374 { IPMI_CHANNEL_MEDIUM_LAN_OTHER,"Other LAN" }, 375 { IPMI_CHANNEL_MEDIUM_SMBUS_PCI,"PCI SMBus" }, 376 { IPMI_CHANNEL_MEDIUM_SMBUS_1, "SMBus v1.0/v1.1" }, 377 { IPMI_CHANNEL_MEDIUM_SMBUS_2, "SMBus v2.0" }, 378 { IPMI_CHANNEL_MEDIUM_USB_1, "USB 1.x" }, 379 { IPMI_CHANNEL_MEDIUM_USB_2, "USB 2.x" }, 380 { IPMI_CHANNEL_MEDIUM_SYSTEM, "System Interface" }, 381 { 0x00, NULL }, 382 }; 383 384 const struct valstr completion_code_vals[] = { 385 { 0x00, "Command completed normally" }, 386 { 0xc0, "Node busy" }, 387 { 0xc1, "Invalid command" }, 388 { 0xc2, "Invalid command on LUN" }, 389 { 0xc3, "Timeout" }, 390 { 0xc4, "Out of space" }, 391 { 0xc5, "Reservation cancelled or invalid" }, 392 { 0xc6, "Request data truncated" }, 393 { 0xc7, "Request data length invalid" }, 394 { 0xc8, "Request data field length limit exceeded" }, 395 { 0xc9, "Parameter out of range" }, 396 { 0xca, "Cannot return number of requested data bytes" }, 397 { 0xcb, "Requested sensor, data, or record not found" }, 398 { 0xcc, "Invalid data field in request" }, 399 { 0xcd, "Command illegal for specified sensor or record type" }, 400 { 0xce, "Command response could not be provided" }, 401 { 0xcf, "Cannot execute duplicated request" }, 402 { 0xd0, "SDR Repository in update mode" }, 403 { 0xd1, "Device firmeware in update mode" }, 404 { 0xd2, "BMC initialization in progress" }, 405 { 0xd3, "Destination unavailable" }, 406 { 0xd4, "Insufficient privilege level" }, 407 { 0xd5, "Command not supported in present state" }, 408 { 0xd6, "Cannot execute command, command disabled" }, 409 { 0xff, "Unspecified error" }, 410 { 0x00, NULL } 411 }; 412 413 const struct valstr ipmi_chassis_power_control_vals[] = { 414 { IPMI_CHASSIS_CTL_POWER_DOWN, "Down/Off" }, 415 { IPMI_CHASSIS_CTL_POWER_UP, "Up/On" }, 416 { IPMI_CHASSIS_CTL_POWER_CYCLE, "Cycle" }, 417 { IPMI_CHASSIS_CTL_HARD_RESET, "Reset" }, 418 { IPMI_CHASSIS_CTL_PULSE_DIAG, "Diag" }, 419 { IPMI_CHASSIS_CTL_ACPI_SOFT, "Soft" }, 420 { 0x00, NULL }, 421 }; 422 423 const struct valstr ipmi_auth_algorithms[] = { 424 { IPMI_AUTH_RAKP_NONE, "none" }, 425 { IPMI_AUTH_RAKP_HMAC_SHA1, "hmac_sha1" }, 426 { IPMI_AUTH_RAKP_HMAC_MD5, "hmac_md5" }, 427 { 0x00, NULL } 428 }; 429 430 const struct valstr ipmi_integrity_algorithms[] = { 431 { IPMI_INTEGRITY_NONE, "none" }, 432 { IPMI_INTEGRITY_HMAC_SHA1_96, "hmac_sha1_96" }, 433 { IPMI_INTEGRITY_HMAC_MD5_128, "hmac_md5_128" }, 434 { IPMI_INTEGRITY_MD5_128 , "md5_128" }, 435 { 0x00, NULL } 436 }; 437 438 const struct valstr ipmi_encryption_algorithms[] = { 439 { IPMI_CRYPT_NONE, "none" }, 440 { IPMI_CRYPT_AES_CBC_128, "aes_cbc_128" }, 441 { IPMI_CRYPT_XRC4_128, "xrc4_128" }, 442 { IPMI_CRYPT_XRC4_40, "xrc4_40" }, 443 { 0x00, NULL } 444 }; 445 446 const struct valstr picmg_frucontrol_vals[] = { 447 { 0, "Cold Reset" }, 448 { 1, "Warm Reset" }, 449 { 2, "Graceful Reboot" }, 450 { 3, "Issue Diagnostic Interrupt" }, 451 { 4, "Quiesce" }, 452 { 5, NULL }, 453 }; 454 455 const struct valstr picmg_clk_family_vals[] = { 456 { 0x00, "Unspecified" }, 457 { 0x01, "SONET/SDH/PDH" }, 458 { 0x02, "Reserved for PCI Express" }, 459 { 0x03, "Reserved" }, /* from 03h to C8h */ 460 { 0xC9, "Vendor defined clock family" }, /* from C9h to FFh */ 461 { 0x00, NULL }, 462 }; 463 464 const struct oemvalstr picmg_clk_accuracy_vals[] = { 465 { 0x01, 10, "PRS" }, 466 { 0x01, 20, "STU" }, 467 { 0x01, 30, "ST2" }, 468 { 0x01, 40, "TNC" }, 469 { 0x01, 50, "ST3E" }, 470 { 0x01, 60, "ST3" }, 471 { 0x01, 70, "SMC" }, 472 { 0x01, 80, "ST4" }, 473 { 0x01, 90, "DUS" }, 474 { 0x02, 0xE0, "PCI Express Generation 2" }, 475 { 0x02, 0xF0, "PCI Express Generation 1" }, 476 { 0xffffff, 0x00, NULL } 477 }; 478 479 const struct oemvalstr picmg_clk_resource_vals[] = { 480 { 0x0, 0, "On-Carrier Device 0" }, 481 { 0x0, 1, "On-Carrier Device 1" }, 482 { 0x1, 1, "AMC Site 1 - A1" }, 483 { 0x1, 2, "AMC Site 1 - A2" }, 484 { 0x1, 3, "AMC Site 1 - A3" }, 485 { 0x1, 4, "AMC Site 1 - A4" }, 486 { 0x1, 5, "AMC Site 1 - B1" }, 487 { 0x1, 6, "AMC Site 1 - B2" }, 488 { 0x1, 7, "AMC Site 1 - B3" }, 489 { 0x1, 8, "AMC Site 1 - B4" }, 490 { 0x2, 0, "ATCA Backplane" }, 491 { 0xffffff, 0x00, NULL } 492 }; 493 494 const struct oemvalstr picmg_clk_id_vals[] = { 495 { 0x0, 0, "Clock 0" }, 496 { 0x0, 1, "Clock 1" }, 497 { 0x0, 2, "Clock 2" }, 498 { 0x0, 3, "Clock 3" }, 499 { 0x0, 4, "Clock 4" }, 500 { 0x0, 5, "Clock 5" }, 501 { 0x0, 6, "Clock 6" }, 502 { 0x0, 7, "Clock 7" }, 503 { 0x0, 8, "Clock 8" }, 504 { 0x0, 9, "Clock 9" }, 505 { 0x0, 10, "Clock 10" }, 506 { 0x0, 11, "Clock 11" }, 507 { 0x0, 12, "Clock 12" }, 508 { 0x0, 13, "Clock 13" }, 509 { 0x0, 14, "Clock 14" }, 510 { 0x0, 15, "Clock 15" }, 511 { 0x1, 1, "TCLKA" }, 512 { 0x1, 2, "TCLKB" }, 513 { 0x1, 3, "TCLKC" }, 514 { 0x1, 4, "TCLKD" }, 515 { 0x1, 5, "FLCKA" }, 516 { 0x2, 1, "CLK1A" }, 517 { 0x2, 2, "CLK1A" }, 518 { 0x2, 3, "CLK1A" }, 519 { 0x2, 4, "CLK1A" }, 520 { 0x2, 5, "CLK1A" }, 521 { 0x2, 6, "CLK1A" }, 522 { 0x2, 7, "CLK1A" }, 523 { 0x2, 8, "CLK1A" }, 524 { 0x2, 9, "CLK1A" }, 525 { 0xffffff, 0x00, NULL } 526 }; 527 528 const struct valstr picmg_busres_id_vals[] = { 529 { 0x0, "Metallic Test Bus pair #1" }, 530 { 0x1, "Metallic Test Bus pair #2" }, 531 { 0x2, "Synch clock group 1 (CLK1)" }, 532 { 0x3, "Synch clock group 2 (CLK2)" }, 533 { 0x4, "Synch clock group 3 (CLK3)" }, 534 { 0x5, NULL } 535 }; 536 const struct valstr picmg_busres_board_cmd_vals[] = { 537 { 0x0, "Query" }, 538 { 0x1, "Release" }, 539 { 0x2, "Force" }, 540 { 0x3, "Bus Free" }, 541 { 0x4, NULL } 542 }; 543 544 const struct valstr picmg_busres_shmc_cmd_vals[] = { 545 { 0x0, "Request" }, 546 { 0x1, "Relinquish" }, 547 { 0x2, "Notify" }, 548 { 0x3, NULL } 549 }; 550 551 const struct oemvalstr picmg_busres_board_status_vals[] = { 552 { 0x0, 0x0, "In control" }, 553 { 0x0, 0x1, "No control" }, 554 { 0x1, 0x0, "Ack" }, 555 { 0x1, 0x1, "Refused" }, 556 { 0x1, 0x2, "No control" }, 557 { 0x2, 0x0, "Ack" }, 558 { 0x2, 0x1, "No control" }, 559 { 0x3, 0x0, "Accept" }, 560 { 0x3, 0x1, "Not Needed" }, 561 { 0xffffff, 0x00, NULL } 562 }; 563 564 const struct oemvalstr picmg_busres_shmc_status_vals[] = { 565 { 0x0, 0x0, "Grant" }, 566 { 0x0, 0x1, "Busy" }, 567 { 0x0, 0x2, "Defer" }, 568 { 0x0, 0x3, "Deny" }, 569 570 { 0x1, 0x0, "Ack" }, 571 { 0x1, 0x1, "Error" }, 572 573 { 0x2, 0x0, "Ack" }, 574 { 0x2, 0x1, "Error" }, 575 { 0x2, 0x2, "Deny" }, 576 577 { 0xffffff, 0x00, NULL } 578 }; 579