1 /* 2 * Copyright (c) 2003 Sun Microsystems, Inc. All Rights Reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * Redistribution of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 11 * Redistribution in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * Neither the name of Sun Microsystems, Inc. or the names of 16 * contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * This software is provided "AS IS," without a warranty of any kind. 20 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 21 * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. 23 * SUN MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE 24 * FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING 25 * OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL 26 * SUN OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, 27 * OR FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR 28 * PUNITIVE DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF 29 * LIABILITY, ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, 30 * EVEN IF SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 31 */ 32 33 #include <stddef.h> 34 #include <ipmitool/ipmi_strings.h> 35 #include <ipmitool/ipmi_constants.h> 36 #include <ipmitool/ipmi_sensor.h> 37 #include <ipmitool/ipmi_sel.h> /* for IPMI_OEM */ 38 39 const struct valstr ipmi_oem_info[] = { 40 41 { IPMI_OEM_UNKNOWN, "Unknown" }, 42 { IPMI_OEM_HP, "Hewlett-Packard" }, 43 { IPMI_OEM_SUN, "Sun Microsystems" }, 44 { IPMI_OEM_INTEL, "Intel Corporation" }, 45 { IPMI_OEM_LMC, "LMC" }, 46 { IPMI_OEM_RADISYS, "RadiSys Corporation" }, 47 { IPMI_OEM_TYAN, "Tyan Computer Corporation" }, 48 { IPMI_OEM_NEWISYS, "Newisys" }, 49 { IPMI_OEM_SUPERMICRO, "Supermicro" }, 50 { IPMI_OEM_GOOGLE, "Google" }, 51 { IPMI_OEM_KONTRON, "Kontron" }, 52 { IPMI_OEM_NOKIA, "Nokia" }, 53 { IPMI_OEM_PICMG, "PICMG" }, 54 { IPMI_OEM_PEPPERCON, "Peppercon AG" }, 55 { IPMI_OEM_DELL, "DELL Inc" }, 56 { IPMI_OEM_NEC, "NEC" }, 57 { IPMI_OEM_MAGNUM, "Magnum Technologies" }, 58 { IPMI_OEM_FUJITSU_SIEMENS, "Fujitsu Siemens" }, 59 { IPMI_OEM_TATUNG, "Tatung" }, 60 { IPMI_OEM_AMI, "AMI" }, 61 { IPMI_OEM_RARITAN, "Raritan" }, 62 { IPMI_OEM_AVOCENT, "Avocent" }, 63 { IPMI_OEM_OSA, "OSA" }, 64 { IPMI_OEM_TOSHIBA, "Toshiba" }, 65 { IPMI_OEM_HITACHI_116, "Hitachi" }, 66 { IPMI_OEM_HITACHI_399, "Hitachi" }, 67 { IPMI_OEM_NOKIA_SIEMENS_NETWORKS, "Nokia Siemens Networks" }, 68 { IPMI_OEM_BULL, "Bull Company" }, 69 { IPMI_OEM_PPS, "Pigeon Point Systems" }, 70 { IPMI_OEM_BROADCOM, "Broadcom Corporation" }, 71 { IPMI_OEM_ERICSSON, "Ericsson AB"}, 72 { IPMI_OEM_QUANTA, "Quanta" }, 73 { 0xffff , NULL }, 74 }; 75 76 const struct oemvalstr ipmi_oem_product_info[] = { 77 /* Keep OEM grouped together */ 78 /* Intel stuff, thanks to Tim Bell */ 79 { IPMI_OEM_INTEL, 0x000C, "TSRLT2" }, 80 { IPMI_OEM_INTEL, 0x001B, "TIGPR2U" }, 81 { IPMI_OEM_INTEL, 0x0022, "TIGI2U" }, 82 { IPMI_OEM_INTEL, 0x0026, "Bridgeport" }, 83 { IPMI_OEM_INTEL, 0x0028, "S5000PAL" }, 84 { IPMI_OEM_INTEL, 0x0029, "S5000PSL" }, 85 { IPMI_OEM_INTEL, 0x0100, "Tiger4" }, 86 { IPMI_OEM_INTEL, 0x0103, "McCarran" }, 87 { IPMI_OEM_INTEL, 0x0800, "ZT5504" }, 88 { IPMI_OEM_INTEL, 0x0808, "MPCBL0001" }, 89 { IPMI_OEM_INTEL, 0x0811, "TIGW1U" }, 90 { IPMI_OEM_INTEL, 0x4311, "NSI2U" }, 91 /* Kontron */ 92 { IPMI_OEM_KONTRON,4000, "AM4000 AdvancedMC" }, 93 { IPMI_OEM_KONTRON,4001, "AM4001 AdvancedMC" }, 94 { IPMI_OEM_KONTRON,4002, "AM4002 AdvancedMC" }, 95 { IPMI_OEM_KONTRON,4010, "AM4010 AdvancedMC" }, 96 { IPMI_OEM_KONTRON,5503, "AM4500/4520 AdvancedMC" }, 97 { IPMI_OEM_KONTRON,5504, "AM4300 AdvancedMC" }, 98 { IPMI_OEM_KONTRON,5507, "AM4301 AdvancedMC" }, 99 { IPMI_OEM_KONTRON,5508, "AM4330 AdvancedMC" }, 100 { IPMI_OEM_KONTRON,5520, "KTC5520/EATX" }, 101 { IPMI_OEM_KONTRON,5703, "RTM8020" }, 102 { IPMI_OEM_KONTRON,5704, "RTM8030" }, 103 { IPMI_OEM_KONTRON,5705, "RTM8050" }, 104 { IPMI_OEM_KONTRON,6000, "CP6000" }, 105 { IPMI_OEM_KONTRON,6006, "DT-64" }, 106 { IPMI_OEM_KONTRON,6010, "CP6010" }, 107 { IPMI_OEM_KONTRON,6011, "CP6011" }, 108 { IPMI_OEM_KONTRON,6012, "CP6012" }, 109 { IPMI_OEM_KONTRON,6014, "CP6014" }, 110 { IPMI_OEM_KONTRON,5002, "AT8001" }, 111 { IPMI_OEM_KONTRON,5003, "AT8010" }, 112 { IPMI_OEM_KONTRON,5004, "AT8020" }, 113 { IPMI_OEM_KONTRON,5006, "AT8030 IPMC" }, 114 { IPMI_OEM_KONTRON,2025, "AT8030 MMC" }, 115 { IPMI_OEM_KONTRON,5007, "AT8050" }, 116 { IPMI_OEM_KONTRON,5301, "AT8400" }, 117 { IPMI_OEM_KONTRON,5303, "AT8901" }, 118 /* Broadcom */ 119 { IPMI_OEM_BROADCOM, 5725, "BCM5725" }, 120 /* Ericsson */ 121 { IPMI_OEM_ERICSSON, 0x0054, "Phantom" }, 122 123 { 0xffffff , 0xffff , NULL }, 124 }; 125 126 const struct oemvalstr ipmi_oem_sdr_type_vals[] = { 127 /* Keep OEM grouped together */ 128 { IPMI_OEM_KONTRON , 0xC0 , "OEM Firmware Info" }, 129 { IPMI_OEM_KONTRON , 0xC2 , "OEM Init Agent" }, 130 { IPMI_OEM_KONTRON , 0xC3 , "OEM IPMBL Link State" }, 131 { IPMI_OEM_KONTRON , 0xC4 , "OEM Board Reset" }, 132 { IPMI_OEM_KONTRON , 0xC5 , "OEM FRU Information Agent" }, 133 { IPMI_OEM_KONTRON , 0xC6 , "OEM POST Value Sensor" }, 134 { IPMI_OEM_KONTRON , 0xC7 , "OEM FWUM Status" }, 135 { IPMI_OEM_KONTRON , 0xC8 , "OEM Switch Mngt Software Status" }, 136 { IPMI_OEM_KONTRON , 0xC9 , "OEM OEM Diagnostic Status" }, 137 { IPMI_OEM_KONTRON , 0xCA , "OEM Component Firmware Upgrade" }, 138 { IPMI_OEM_KONTRON , 0xCB , "OEM FRU Over Current" }, 139 { IPMI_OEM_KONTRON , 0xCC , "OEM FRU Sensor Error" }, 140 { IPMI_OEM_KONTRON , 0xCD , "OEM FRU Power Denied" }, 141 { IPMI_OEM_KONTRON , 0xCE , "OEM Reserved" }, 142 { IPMI_OEM_KONTRON , 0xCF , "OEM Board Reset" }, 143 { IPMI_OEM_KONTRON , 0xD0 , "OEM Clock Resource Control" }, 144 { IPMI_OEM_KONTRON , 0xD1 , "OEM Power State" }, 145 { IPMI_OEM_KONTRON , 0xD2 , "OEM FRU Mngt Power Failure" }, 146 { IPMI_OEM_KONTRON , 0xD3 , "OEM Jumper Status" }, 147 { IPMI_OEM_KONTRON , 0xF2 , "OEM RTM Module Hotswap" }, 148 149 { IPMI_OEM_PICMG , 0xF0 , "PICMG FRU Hotswap" }, 150 { IPMI_OEM_PICMG , 0xF1 , "PICMG IPMB0 Link State" }, 151 { IPMI_OEM_PICMG , 0xF2 , "PICMG Module Hotswap" }, 152 153 { 0xffffff, 0x00, NULL } 154 }; 155 156 const struct valstr ipmi_netfn_vals[] = { 157 { IPMI_NETFN_CHASSIS, "Chassis" }, 158 { IPMI_NETFN_BRIDGE, "Bridge" }, 159 { IPMI_NETFN_SE, "SensorEvent" }, 160 { IPMI_NETFN_APP, "Application" }, 161 { IPMI_NETFN_FIRMWARE, "Firmware" }, 162 { IPMI_NETFN_STORAGE, "Storage" }, 163 { IPMI_NETFN_TRANSPORT, "Transport" }, 164 { 0xff, NULL }, 165 }; 166 167 /* 168 * From table 26-4 of the IPMI v2 specification 169 */ 170 const struct valstr ipmi_bit_rate_vals[] = { 171 { 0x00, "IPMI-Over-Serial-Setting"}, /* Using the value in the IPMI Over Serial Config */ 172 { 0x06, "9.6" }, 173 { 0x07, "19.2" }, 174 { 0x08, "38.4" }, 175 { 0x09, "57.6" }, 176 { 0x0A, "115.2" }, 177 { 0x00, NULL }, 178 }; 179 180 const struct valstr ipmi_channel_activity_type_vals[] = { 181 { 0, "IPMI Messaging session active" }, 182 { 1, "Callback Messaging session active" }, 183 { 2, "Dial-out Alert active" }, 184 { 3, "TAP Page Active" }, 185 { 0x00, NULL }, 186 }; 187 188 189 const struct valstr ipmi_privlvl_vals[] = { 190 { IPMI_SESSION_PRIV_CALLBACK, "CALLBACK" }, 191 { IPMI_SESSION_PRIV_USER, "USER" }, 192 { IPMI_SESSION_PRIV_OPERATOR, "OPERATOR" }, 193 { IPMI_SESSION_PRIV_ADMIN, "ADMINISTRATOR" }, 194 { IPMI_SESSION_PRIV_OEM, "OEM" }, 195 { 0xF, "NO ACCESS" }, 196 { 0xFF, NULL }, 197 }; 198 199 200 const struct valstr ipmi_set_in_progress_vals[] = { 201 { IPMI_SET_IN_PROGRESS_SET_COMPLETE, "set-complete" }, 202 { IPMI_SET_IN_PROGRESS_IN_PROGRESS, "set-in-progress" }, 203 { IPMI_SET_IN_PROGRESS_COMMIT_WRITE, "commit-write" }, 204 { 0, NULL }, 205 }; 206 207 208 const struct valstr ipmi_authtype_session_vals[] = { 209 { IPMI_SESSION_AUTHTYPE_NONE, "NONE" }, 210 { IPMI_SESSION_AUTHTYPE_MD2, "MD2" }, 211 { IPMI_SESSION_AUTHTYPE_MD5, "MD5" }, 212 { IPMI_SESSION_AUTHTYPE_PASSWORD, "PASSWORD" }, 213 { IPMI_SESSION_AUTHTYPE_OEM, "OEM" }, 214 { IPMI_SESSION_AUTHTYPE_RMCP_PLUS,"RMCP+" }, 215 { 0xFF, NULL }, 216 }; 217 218 219 const struct valstr ipmi_authtype_vals[] = { 220 { IPMI_1_5_AUTH_TYPE_BIT_NONE, "NONE" }, 221 { IPMI_1_5_AUTH_TYPE_BIT_MD2, "MD2" }, 222 { IPMI_1_5_AUTH_TYPE_BIT_MD5, "MD5" }, 223 { IPMI_1_5_AUTH_TYPE_BIT_PASSWORD, "PASSWORD" }, 224 { IPMI_1_5_AUTH_TYPE_BIT_OEM, "OEM" }, 225 { 0, NULL }, 226 }; 227 228 const struct valstr entity_id_vals[] = { 229 { 0x00, "Unspecified" }, 230 { 0x01, "Other" }, 231 { 0x02, "Unknown" }, 232 { 0x03, "Processor" }, 233 { 0x04, "Disk or Disk Bay" }, 234 { 0x05, "Peripheral Bay" }, 235 { 0x06, "System Management Module" }, 236 { 0x07, "System Board" }, 237 { 0x08, "Memory Module" }, 238 { 0x09, "Processor Module" }, 239 { 0x0a, "Power Supply" }, 240 { 0x0b, "Add-in Card" }, 241 { 0x0c, "Front Panel Board" }, 242 { 0x0d, "Back Panel Board" }, 243 { 0x0e, "Power System Board" }, 244 { 0x0f, "Drive Backplane" }, 245 { 0x10, "System Internal Expansion Board" }, 246 { 0x11, "Other System Board" }, 247 { 0x12, "Processor Board" }, 248 { 0x13, "Power Unit" }, 249 { 0x14, "Power Module" }, 250 { 0x15, "Power Management" }, 251 { 0x16, "Chassis Back Panel Board" }, 252 { 0x17, "System Chassis" }, 253 { 0x18, "Sub-Chassis" }, 254 { 0x19, "Other Chassis Board" }, 255 { 0x1a, "Disk Drive Bay" }, 256 { 0x1b, "Peripheral Bay" }, 257 { 0x1c, "Device Bay" }, 258 { 0x1d, "Fan Device" }, 259 { 0x1e, "Cooling Unit" }, 260 { 0x1f, "Cable/Interconnect" }, 261 { 0x20, "Memory Device" }, 262 { 0x21, "System Management Software" }, 263 { 0x22, "BIOS" }, 264 { 0x23, "Operating System" }, 265 { 0x24, "System Bus" }, 266 { 0x25, "Group" }, 267 { 0x26, "Remote Management Device" }, 268 { 0x27, "External Environment" }, 269 { 0x28, "Battery" }, 270 { 0x29, "Processing Blade" }, 271 { 0x2A, "Connectivity Switch" }, 272 { 0x2B, "Processor/Memory Module" }, 273 { 0x2C, "I/O Module" }, 274 { 0x2D, "Processor/IO Module" }, 275 { 0x2E, "Management Controller Firmware" }, 276 { 0x2F, "IPMI Channel" }, 277 { 0x30, "PCI Bus" }, 278 { 0x31, "PCI Express Bus" }, 279 { 0x32, "SCSI Bus (parallel)" }, 280 { 0x33, "SATA/SAS Bus" }, 281 { 0x34, "Processor/Front-Side Bus" }, 282 { 0x35, "Real Time Clock(RTC)" }, 283 { 0x36, "Reserved" }, 284 { 0x37, "Air Inlet" }, 285 { 0x38, "Reserved" }, 286 { 0x39, "Reserved" }, 287 { 0x3A, "Reserved" }, 288 { 0x3B, "Reserved" }, 289 { 0x3C, "Reserved" }, 290 { 0x3D, "Reserved" }, 291 { 0x3E, "Reserved" }, 292 { 0x3F, "Reserved" }, 293 { 0x40, "Air Inlet" }, 294 { 0x41, "Processor" }, 295 { 0x42, "Baseboard/Main System Board" }, 296 /* PICMG */ 297 { 0xA0, "PICMG Front Board" }, 298 { 0xC0, "PICMG Rear Transition Module" }, 299 { 0xC1, "PICMG AdvancedMC Module" }, 300 { 0xF0, "PICMG Shelf Management Controller" }, 301 { 0xF1, "PICMG Filtration Unit" }, 302 { 0xF2, "PICMG Shelf FRU Information" }, 303 { 0xF3, "PICMG Alarm Panel" }, 304 { 0x00, NULL }, 305 }; 306 307 const struct valstr entity_device_type_vals[] = { 308 { 0x00, "Reserved" }, 309 { 0x01, "Reserved" }, 310 { 0x02, "DS1624 temperature sensor" }, 311 { 0x03, "DS1621 temperature sensor" }, 312 { 0x04, "LM75 Temperature Sensor" }, 313 { 0x05, "Heceta ASIC" }, 314 { 0x06, "Reserved" }, 315 { 0x07, "Reserved" }, 316 { 0x08, "EEPROM, 24C01" }, 317 { 0x09, "EEPROM, 24C02" }, 318 { 0x0a, "EEPROM, 24C04" }, 319 { 0x0b, "EEPROM, 24C08" }, 320 { 0x0c, "EEPROM, 24C16" }, 321 { 0x0d, "EEPROM, 24C17" }, 322 { 0x0e, "EEPROM, 24C32" }, 323 { 0x0f, "EEPROM, 24C64" }, 324 { 0x1000, "IPMI FRU Inventory" }, 325 { 0x1001, "DIMM Memory ID" }, 326 { 0x1002, "IPMI FRU Inventory" }, 327 { 0x1003, "System Processor Cartridge FRU" }, 328 { 0x11, "Reserved" }, 329 { 0x12, "Reserved" }, 330 { 0x13, "Reserved" }, 331 { 0x14, "PCF 8570 256 byte RAM" }, 332 { 0x15, "PCF 8573 clock/calendar" }, 333 { 0x16, "PCF 8574A I/O Port" }, 334 { 0x17, "PCF 8583 clock/calendar" }, 335 { 0x18, "PCF 8593 clock/calendar" }, 336 { 0x19, "Clock calendar" }, 337 { 0x1a, "PCF 8591 A/D, D/A Converter" }, 338 { 0x1b, "I/O Port" }, 339 { 0x1c, "A/D Converter" }, 340 { 0x1d, "D/A Converter" }, 341 { 0x1e, "A/D, D/A Converter" }, 342 { 0x1f, "LCD Controller/Driver" }, 343 { 0x20, "Core Logic (Chip set) Device" }, 344 { 0x21, "LMC6874 Intelligent Battery controller" }, 345 { 0x22, "Intelligent Batter controller" }, 346 { 0x23, "Combo Management ASIC" }, 347 { 0x24, "Maxim 1617 Temperature Sensor" }, 348 { 0xbf, "Other/Unspecified" }, 349 { 0x00, NULL }, 350 }; 351 352 const struct valstr ipmi_channel_protocol_vals[] = { 353 { 0x00, "reserved" }, 354 { 0x01, "IPMB-1.0" }, 355 { 0x02, "ICMB-1.0" }, 356 { 0x03, "reserved" }, 357 { 0x04, "IPMI-SMBus" }, 358 { 0x05, "KCS" }, 359 { 0x06, "SMIC" }, 360 { 0x07, "BT-10" }, 361 { 0x08, "BT-15" }, 362 { 0x09, "TMode" }, 363 { 0x1c, "OEM 1" }, 364 { 0x1d, "OEM 2" }, 365 { 0x1e, "OEM 3" }, 366 { 0x1f, "OEM 4" }, 367 { 0x00, NULL }, 368 }; 369 370 371 const struct valstr ipmi_channel_medium_vals[] = { 372 { IPMI_CHANNEL_MEDIUM_RESERVED, "reserved" }, 373 { IPMI_CHANNEL_MEDIUM_IPMB_I2C, "IPMB (I2C)" }, 374 { IPMI_CHANNEL_MEDIUM_ICMB_1, "ICMB v1.0" }, 375 { IPMI_CHANNEL_MEDIUM_ICMB_09, "ICMB v0.9" }, 376 { IPMI_CHANNEL_MEDIUM_LAN, "802.3 LAN" }, 377 { IPMI_CHANNEL_MEDIUM_SERIAL, "Serial/Modem" }, 378 { IPMI_CHANNEL_MEDIUM_LAN_OTHER,"Other LAN" }, 379 { IPMI_CHANNEL_MEDIUM_SMBUS_PCI,"PCI SMBus" }, 380 { IPMI_CHANNEL_MEDIUM_SMBUS_1, "SMBus v1.0/v1.1" }, 381 { IPMI_CHANNEL_MEDIUM_SMBUS_2, "SMBus v2.0" }, 382 { IPMI_CHANNEL_MEDIUM_USB_1, "USB 1.x" }, 383 { IPMI_CHANNEL_MEDIUM_USB_2, "USB 2.x" }, 384 { IPMI_CHANNEL_MEDIUM_SYSTEM, "System Interface" }, 385 { 0x00, NULL }, 386 }; 387 388 const struct valstr completion_code_vals[] = { 389 { 0x00, "Command completed normally" }, 390 { 0xc0, "Node busy" }, 391 { 0xc1, "Invalid command" }, 392 { 0xc2, "Invalid command on LUN" }, 393 { 0xc3, "Timeout" }, 394 { 0xc4, "Out of space" }, 395 { 0xc5, "Reservation cancelled or invalid" }, 396 { 0xc6, "Request data truncated" }, 397 { 0xc7, "Request data length invalid" }, 398 { 0xc8, "Request data field length limit exceeded" }, 399 { 0xc9, "Parameter out of range" }, 400 { 0xca, "Cannot return number of requested data bytes" }, 401 { 0xcb, "Requested sensor, data, or record not found" }, 402 { 0xcc, "Invalid data field in request" }, 403 { 0xcd, "Command illegal for specified sensor or record type" }, 404 { 0xce, "Command response could not be provided" }, 405 { 0xcf, "Cannot execute duplicated request" }, 406 { 0xd0, "SDR Repository in update mode" }, 407 { 0xd1, "Device firmeware in update mode" }, 408 { 0xd2, "BMC initialization in progress" }, 409 { 0xd3, "Destination unavailable" }, 410 { 0xd4, "Insufficient privilege level" }, 411 { 0xd5, "Command not supported in present state" }, 412 { 0xd6, "Cannot execute command, command disabled" }, 413 { 0xff, "Unspecified error" }, 414 { 0x00, NULL } 415 }; 416 417 const struct valstr ipmi_chassis_power_control_vals[] = { 418 { IPMI_CHASSIS_CTL_POWER_DOWN, "Down/Off" }, 419 { IPMI_CHASSIS_CTL_POWER_UP, "Up/On" }, 420 { IPMI_CHASSIS_CTL_POWER_CYCLE, "Cycle" }, 421 { IPMI_CHASSIS_CTL_HARD_RESET, "Reset" }, 422 { IPMI_CHASSIS_CTL_PULSE_DIAG, "Diag" }, 423 { IPMI_CHASSIS_CTL_ACPI_SOFT, "Soft" }, 424 { 0x00, NULL }, 425 }; 426 427 const struct valstr ipmi_auth_algorithms[] = { 428 { IPMI_AUTH_RAKP_NONE, "none" }, 429 { IPMI_AUTH_RAKP_HMAC_SHA1, "hmac_sha1" }, 430 { IPMI_AUTH_RAKP_HMAC_MD5, "hmac_md5" }, 431 { 0x00, NULL } 432 }; 433 434 const struct valstr ipmi_integrity_algorithms[] = { 435 { IPMI_INTEGRITY_NONE, "none" }, 436 { IPMI_INTEGRITY_HMAC_SHA1_96, "hmac_sha1_96" }, 437 { IPMI_INTEGRITY_HMAC_MD5_128, "hmac_md5_128" }, 438 { IPMI_INTEGRITY_MD5_128 , "md5_128" }, 439 { 0x00, NULL } 440 }; 441 442 const struct valstr ipmi_encryption_algorithms[] = { 443 { IPMI_CRYPT_NONE, "none" }, 444 { IPMI_CRYPT_AES_CBC_128, "aes_cbc_128" }, 445 { IPMI_CRYPT_XRC4_128, "xrc4_128" }, 446 { IPMI_CRYPT_XRC4_40, "xrc4_40" }, 447 { 0x00, NULL } 448 }; 449 450 const struct valstr picmg_frucontrol_vals[] = { 451 { 0, "Cold Reset" }, 452 { 1, "Warm Reset" }, 453 { 2, "Graceful Reboot" }, 454 { 3, "Issue Diagnostic Interrupt" }, 455 { 4, "Quiesce" }, 456 { 5, NULL }, 457 }; 458 459 const struct valstr picmg_clk_family_vals[] = { 460 { 0x00, "Unspecified" }, 461 { 0x01, "SONET/SDH/PDH" }, 462 { 0x02, "Reserved for PCI Express" }, 463 { 0x03, "Reserved" }, /* from 03h to C8h */ 464 { 0xC9, "Vendor defined clock family" }, /* from C9h to FFh */ 465 { 0x00, NULL }, 466 }; 467 468 const struct oemvalstr picmg_clk_accuracy_vals[] = { 469 { 0x01, 10, "PRS" }, 470 { 0x01, 20, "STU" }, 471 { 0x01, 30, "ST2" }, 472 { 0x01, 40, "TNC" }, 473 { 0x01, 50, "ST3E" }, 474 { 0x01, 60, "ST3" }, 475 { 0x01, 70, "SMC" }, 476 { 0x01, 80, "ST4" }, 477 { 0x01, 90, "DUS" }, 478 { 0x02, 0xE0, "PCI Express Generation 2" }, 479 { 0x02, 0xF0, "PCI Express Generation 1" }, 480 { 0xffffff, 0x00, NULL } 481 }; 482 483 const struct oemvalstr picmg_clk_resource_vals[] = { 484 { 0x0, 0, "On-Carrier Device 0" }, 485 { 0x0, 1, "On-Carrier Device 1" }, 486 { 0x1, 1, "AMC Site 1 - A1" }, 487 { 0x1, 2, "AMC Site 1 - A2" }, 488 { 0x1, 3, "AMC Site 1 - A3" }, 489 { 0x1, 4, "AMC Site 1 - A4" }, 490 { 0x1, 5, "AMC Site 1 - B1" }, 491 { 0x1, 6, "AMC Site 1 - B2" }, 492 { 0x1, 7, "AMC Site 1 - B3" }, 493 { 0x1, 8, "AMC Site 1 - B4" }, 494 { 0x2, 0, "ATCA Backplane" }, 495 { 0xffffff, 0x00, NULL } 496 }; 497 498 const struct oemvalstr picmg_clk_id_vals[] = { 499 { 0x0, 0, "Clock 0" }, 500 { 0x0, 1, "Clock 1" }, 501 { 0x0, 2, "Clock 2" }, 502 { 0x0, 3, "Clock 3" }, 503 { 0x0, 4, "Clock 4" }, 504 { 0x0, 5, "Clock 5" }, 505 { 0x0, 6, "Clock 6" }, 506 { 0x0, 7, "Clock 7" }, 507 { 0x0, 8, "Clock 8" }, 508 { 0x0, 9, "Clock 9" }, 509 { 0x0, 10, "Clock 10" }, 510 { 0x0, 11, "Clock 11" }, 511 { 0x0, 12, "Clock 12" }, 512 { 0x0, 13, "Clock 13" }, 513 { 0x0, 14, "Clock 14" }, 514 { 0x0, 15, "Clock 15" }, 515 { 0x1, 1, "TCLKA" }, 516 { 0x1, 2, "TCLKB" }, 517 { 0x1, 3, "TCLKC" }, 518 { 0x1, 4, "TCLKD" }, 519 { 0x1, 5, "FLCKA" }, 520 { 0x2, 1, "CLK1A" }, 521 { 0x2, 2, "CLK1A" }, 522 { 0x2, 3, "CLK1A" }, 523 { 0x2, 4, "CLK1A" }, 524 { 0x2, 5, "CLK1A" }, 525 { 0x2, 6, "CLK1A" }, 526 { 0x2, 7, "CLK1A" }, 527 { 0x2, 8, "CLK1A" }, 528 { 0x2, 9, "CLK1A" }, 529 { 0xffffff, 0x00, NULL } 530 }; 531 532 const struct valstr picmg_busres_id_vals[] = { 533 { 0x0, "Metallic Test Bus pair #1" }, 534 { 0x1, "Metallic Test Bus pair #2" }, 535 { 0x2, "Synch clock group 1 (CLK1)" }, 536 { 0x3, "Synch clock group 2 (CLK2)" }, 537 { 0x4, "Synch clock group 3 (CLK3)" }, 538 { 0x5, NULL } 539 }; 540 const struct valstr picmg_busres_board_cmd_vals[] = { 541 { 0x0, "Query" }, 542 { 0x1, "Release" }, 543 { 0x2, "Force" }, 544 { 0x3, "Bus Free" }, 545 { 0x4, NULL } 546 }; 547 548 const struct valstr picmg_busres_shmc_cmd_vals[] = { 549 { 0x0, "Request" }, 550 { 0x1, "Relinquish" }, 551 { 0x2, "Notify" }, 552 { 0x3, NULL } 553 }; 554 555 const struct oemvalstr picmg_busres_board_status_vals[] = { 556 { 0x0, 0x0, "In control" }, 557 { 0x0, 0x1, "No control" }, 558 { 0x1, 0x0, "Ack" }, 559 { 0x1, 0x1, "Refused" }, 560 { 0x1, 0x2, "No control" }, 561 { 0x2, 0x0, "Ack" }, 562 { 0x2, 0x1, "No control" }, 563 { 0x3, 0x0, "Accept" }, 564 { 0x3, 0x1, "Not Needed" }, 565 { 0xffffff, 0x00, NULL } 566 }; 567 568 const struct oemvalstr picmg_busres_shmc_status_vals[] = { 569 { 0x0, 0x0, "Grant" }, 570 { 0x0, 0x1, "Busy" }, 571 { 0x0, 0x2, "Defer" }, 572 { 0x0, 0x3, "Deny" }, 573 574 { 0x1, 0x0, "Ack" }, 575 { 0x1, 0x1, "Error" }, 576 577 { 0x2, 0x0, "Ack" }, 578 { 0x2, 0x1, "Error" }, 579 { 0x2, 0x2, "Deny" }, 580 581 { 0xffffff, 0x00, NULL } 582 }; 583