1 /*
2 // Copyright (c) 2018 Intel Corporation
3 //
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
7 //
8 //      http://www.apache.org/licenses/LICENSE-2.0
9 //
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
15 */
16 
17 #pragma once
18 
19 #include <user_channel/user_layer.hpp>
20 enum class IPMINetfnIntelOEMGeneralCmd
21 {
22     cmdGetSmSignal = 0x14,
23     cmdSetSmSignal = 0x15,
24     cmdSetBIOSID = 0x26,
25     cmdGetOEMDeviceInfo = 0x27,
26     cmdSetColdRedundancyConfig = 0x2d,
27     cmdGetColdRedundancyConfig = 0x2e,
28     cmdGetAICSlotFRUIDSlotPosRecords = 0x31,
29     cmdSetSystemGUID = 0x41,
30     cmdDisableBMCSystemReset = 0x42,
31     cmdGetBMCResetDisables = 0x43,
32     cmdSendEmbeddedFWUpdStatus = 0x44,
33     cmdSetPowerRestoreDelay = 0x54,
34     cmdGetPowerRestoreDelay = 0x55,
35     cmdSetFaultIndication = 0x57,
36     cmdSetOEMUser2Activation = 0x5A,
37     cmdSetSpecialUserPassword = 0x5F,
38     cmdSetShutdownPolicy = 0x60,
39     cmdGetShutdownPolicy = 0x62,
40     cmdSetFanConfig = 0x89,
41     cmdGetFanConfig = 0x8a,
42     cmdSetFanSpeedOffset = 0x8c,
43     cmdGetFanSpeedOffset = 0x8d,
44     cmdSetDimmOffset = 0x8e,
45     cmdGetDimmOffset = 0x8f,
46     cmdSetFscParameter = 0x90,
47     cmdGetFscParameter = 0x91,
48     cmdGetChassisIdentifier = 0x92,
49     cmdReadBaseBoardProductId = 0x93,
50     cmdGetProcessorErrConfig = 0x9A,
51     cmdSetProcessorErrConfig = 0x9B,
52     cmdSetManufacturingData = 0xA1,
53     cmdGetManufacturingData = 0xA2,
54     cmdGetLEDStatus = 0xB0,
55     cmdControlBmcServices = 0xB1,
56     cmdGetBmcServiceStatus = 0xB2,
57     cmdGetSecurityMode = 0xB3,
58     cmdSetSecurityMode = 0xB4,
59     cmdMtmKeepAlive = 0xB5,
60     cmdGetNmiStatus = 0xE5,
61     cmdSetEfiBootOptions = 0xEA,
62     cmdGetEfiBootOptions = 0xEB,
63     cmdSetNmiStatus = 0xED,
64 };
65 
66 enum class IPMINetfnIntelOEMPlatformCmd
67 {
68     cmdCfgHostSerialPortSpeed = 0x90,
69 };
70 
71 enum class IPMIIntelOEMReturnCodes
72 {
73     ipmiCCPayloadActive = 0x80,
74     ipmiCCInvalidPCIESlotID = 0x80,
75     ipmiCCParameterNotSupported = 0x80,
76     ipmiCCPayloadAlreadyDeactivated = 0x80,
77     ipmiCCSetInProcess = 0x81,
78     ipmiCCPayloadDisable = 0x81,
79     ipmiCCLostArbitration = 0x81,
80     ipmiCCInvalidCablePortIndex = 0x81,
81     ipmiCCHealthStatusNotAvailable = 0x81,
82     ipmiCCBusError = 0x82,
83     ipmiCCReadOnly = 0x82,
84     ipmiCCWriteOnly = 0x82,
85     ipmiCCNoCablePresent = 0x82,
86     ipmiCCDataCollectionInProgress = 0x82,
87     ipmiCCPayloadActivationLimitReached = 0x82,
88     ipmiCCNACKOnWrite = 0x83,
89     ipmiCCDataCollectionFailed = 0x83,
90     ipmiCCCanNotActivateWithEncrption = 0x83,
91     ipmiCCCanNotActivateWithoutEncryption = 0x84,
92     ipmiCCInvalidChecksum = 0x85,
93     ipmiCCNoCabledPCIEPortsAvailable = 0xC2,
94 
95 };
96 
97 enum class IPMIReturnCodeExt
98 {
99     ipmiCCInvalidLUN = 0xC2,
100     ipmiCCTimeout = 0xC3,
101     ipmiCCStorageLeak = 0xC4,
102     ipmiCCRequestDataTruncated = 0xC6,
103     ipmiCCRequestDataFieldLengthLimitExceeded = 0xC8,
104     ipmiCCCanNotReturnNumberOfRequestedDataBytes = 0xCA,
105     ipmiCCRequestSensorDataRecordNotFound = 0xCB,
106     ipmiCCDestinationUnavailable = 0xD3,
107     ipmiCCParamterNotSupportInPresentState = 0xD5,
108 };
109 
110 constexpr const uint8_t netfunIntelAppOEM = 0x3E;
111 static constexpr ipmi_netfn_t netfnIntcOEMGeneral =
112     NETFUN_NONE; // Netfun_none. In our platform, we use it as "intel oem
113                  // general". The code is 0x30
114 
115 // Intel OEM Platform code is 0x32
116 static constexpr ipmi_netfn_t netfnIntcOEMPlatform = NETFUN_OEM;
117 static constexpr const uint8_t maxBIOSIDLength = 0xFF;
118 static constexpr const uint8_t maxCPUNum = 4;
119 static constexpr const char* biosObjPath = "/xyz/openbmc_project/bios";
120 static constexpr const char* biosIntf =
121     "xyz.openbmc_project.Inventory.Item.Bios";
122 static constexpr const char* biosProp = "BiosId";
123 
124 static constexpr const char* powerRestoreDelayObjPath =
125     "/xyz/openbmc_project/control/power_restore_delay";
126 static constexpr const char* powerRestoreDelayIntf =
127     "xyz.openbmc_project.Control.Power.RestoreDelay";
128 static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay";
129 static constexpr const char* processorErrConfigObjPath =
130     "/xyz/openbmc_project/control/processor_error_config";
131 static constexpr const char* processorErrConfigIntf =
132     "xyz.openbmc_project.Control.Processor.ErrConfig";
133 static constexpr const char* bmcResetDisablesPath =
134     "/xyz/openbmc_project/control/bmc_reset_disables";
135 static constexpr const char* bmcResetDisablesIntf =
136     "xyz.openbmc_project.Control.ResetDisables";
137 
138 static constexpr const char* postCodesObjPath =
139     "/xyz/openbmc_project/State/Boot/PostCode";
140 static constexpr const char* postCodesIntf =
141     "xyz.openbmc_project.State.Boot.PostCode";
142 
143 static constexpr const char* identifyLEDObjPath =
144     "/xyz/openbmc_project/led/physical/identify";
145 static constexpr const char* ledIntf = "xyz.openbmc_project.Led.Physical";
146 static constexpr const char* statusAmberObjPath =
147     "/xyz/openbmc_project/led/physical/status_amber";
148 static constexpr const char* statusGreenObjPath =
149     "/xyz/openbmc_project/led/physical/status_green";
150 
151 static constexpr const uint8_t noShutdownOnOCOT = 0;
152 static constexpr const uint8_t shutdownOnOCOT = 1;
153 static constexpr const uint8_t noShutdownPolicySupported = 0;
154 static constexpr const uint8_t shutdownPolicySupported = 1;
155 static constexpr const char* oemShutdownPolicyIntf =
156     "com.intel.Control.OCOTShutdownPolicy";
157 static constexpr const char* oemShutdownPolicyObjPath =
158     "/com/intel/control/ocotshutdown_policy_config";
159 static constexpr const char* oemShutdownPolicyObjPathProp = "OCOTPolicy";
160 
161 static constexpr const char* fwGetEnvCmd = "/sbin/fw_printenv";
162 static constexpr const char* fwSetEnvCmd = "/sbin/fw_setenv";
163 static constexpr const char* fwHostSerailCfgEnvName = "hostserialcfg";
164 
165 constexpr const char* settingsBusName = "xyz.openbmc_project.Settings";
166 
167 static constexpr const uint8_t getHostSerialCfgCmd = 0;
168 static constexpr const uint8_t setHostSerialCfgCmd = 1;
169 
170 // parameters:
171 // 0: host serial port 1 and 2 normal speed
172 // 1: host serial port 1 high spend, port 2 normal speed
173 // 2: host serial port 1 normal spend, port 2 high speed
174 // 3: host serial port 1 and 2 high speed
175 static constexpr const uint8_t HostSerialCfgParamMax = 3;
176 static constexpr uint8_t ipmiDefaultUserId = 2;
177 
178 static constexpr const uint8_t selEvtTargetMask = 0xF0;
179 static constexpr const uint8_t selEvtTargetShift = 4;
180 
181 static constexpr const uint8_t targetInstanceMask = 0x0E;
182 static constexpr const uint8_t targetInstanceShift = 1;
183 
184 enum class IPMINetfnIntelOEMAppCmd
185 {
186     mdrStatus = 0x20,
187     mdrComplete = 0x21,
188     mdrEvent = 0x22,
189     mdrRead = 0x23,
190     mdrWrite = 0x24,
191     mdrLock = 0x25,
192     mdr2AgentStatus = 0x30,
193     mdr2GetDir = 0x31,
194     mdr2GetDataInfo = 0x32,
195     mdr2LockData = 0x33,
196     mdr2UnlockData = 0x34,
197     mdr2GetDataBlock = 0x35,
198     mdr2SendDir = 0x38,
199     mdr2SendDataInfoOffer = 0x39,
200     mdr2SendDataInfo = 0x3a,
201     mdr2DataStart = 0x3b,
202     mdr2DataDone = 0x3c,
203     mdr2SendDataBlock = 0x3d,
204 };
205 
206 enum class OEMDevEntityType
207 {
208     biosId,
209     devVer,
210     sdrVer,
211 };
212 
213 enum class FWUpdateTarget : uint8_t
214 {
215     targetBMC = 0x0,
216     targetBIOS = 0x1,
217     targetME = 0x2,
218     targetOEMEWS = 0x4,
219 };
220 
221 enum class CPUStatus
222 {
223     disabled = 0x0,
224     enabled = 0x1,
225     notPresent = 0x3,
226 };
227 
228 #pragma pack(push, 1)
229 struct GUIDData
230 {
231     uint8_t node1;
232     uint8_t node2;
233     uint8_t node3;
234     uint8_t node4;
235     uint8_t node5;
236     uint8_t node6;
237     uint8_t clock1;
238     uint8_t clock2;
239     uint8_t timeHigh1;
240     uint8_t timeHigh2;
241     uint8_t timeMid1;
242     uint8_t timeMid2;
243     uint8_t timeLow1;
244     uint8_t timeLow2;
245     uint8_t timeLow3;
246     uint8_t timeLow4;
247 };
248 
249 struct DeviceInfo
250 {
251     uint8_t biosIDLength;
252     uint8_t biosId[maxBIOSIDLength];
253 };
254 
255 struct SetPowerRestoreDelayReq
256 {
257     uint8_t byteMSB;
258     uint8_t byteLSB;
259 };
260 
261 struct GetPowerRestoreDelayRes
262 {
263     uint8_t byteMSB;
264     uint8_t byteLSB;
265 };
266 
267 struct GetOemDeviceInfoReq
268 {
269     uint8_t entityType;
270     uint8_t countToRead;
271     uint8_t offset;
272 };
273 
274 struct GetOemDeviceInfoRes
275 {
276     uint8_t resDatalen;
277     uint8_t data[maxBIOSIDLength];
278 };
279 
280 struct GetOEMShutdownPolicyRes
281 {
282     uint8_t policy;
283     uint8_t policySupport;
284 };
285 
286 struct SetFanConfigReq
287 {
288     uint8_t selectedProfile;
289     uint8_t flags;
290     // other parameters from previous generation are not supported
291 };
292 struct CfgHostSerialReq
293 {
294     uint8_t command;
295     uint8_t parameter;
296 };
297 #pragma pack(pop)
298 
299 //
300 // Fault type enumeration
301 //
302 enum class RemoteFaultType
303 {
304     fan,         // 0
305     temperature, // 1
306     power,       // 2
307     driveslot,   // 3
308     software,    // 4
309     memory,      // 5
310     max = 6      // 6
311 };
312 
313 // Enumeration for remote fault states as required by the HSC
314 //
315 enum class RemoteFaultState
316 {
317     // fault indicators
318     fanLEDs,
319     cpu1DimmLeds,
320     cpu2DimmLeds,
321     cpu3DimmLeds,
322     cpu4DimmLeds,
323     maxFaultState,
324 };
325 
326 enum class DimmFaultType
327 {
328     cpu1cpu2Dimm,
329     cpu3cpu4Dimm,
330     maxFaultGroup,
331 };
332 
333 enum class setFanProfileFlags : uint8_t
334 {
335     setFanProfile = 7,
336     setPerfAcousMode = 6,
337     // reserved [5:3]
338     performAcousSelect = 2
339     // reserved [1:0]
340 };
341 
342 enum class setFscParamFlags : uint8_t
343 {
344     tcontrol = 0x1,
345     pwmOffset = 0x2,
346     maxPwm = 0x3,
347     cfm = 0x4
348 };
349 
350 enum class dimmOffsetTypes : uint8_t
351 {
352     staticCltt = 0x0,
353     dimmPower = 0x2
354 };
355 
356 // FIXME: this stuff needs to be rewritten
357 enum IPMI_INTEL_OEM_RETURN_CODES
358 {
359     IPMI_CC_OEM_PAYLOAD_ACTIVE = 0x80,
360     IPMI_CC_OEM_INVALID_PCIE_SLOTID = 0x80,
361     IPMI_CC_OEM_PARAMETER_NOT_SUPPORTED = 0x80,
362     IPMI_CC_OEM_PAYLOAD_ALREADY_DEACTIVATED = 0x80,
363     IPMI_CC_OEM_SET_IN_PROCESS = 0x81,
364     IPMI_CC_OEM_PAYLOAD_DISABLE = 0x81,
365     IPMI_CC_OEM_LOST_ARBITRATION = 0x81,
366     IPMI_CC_OEM_INVALID_CABLE_PORT_INDEX = 0x81,
367     IPMI_CC_OEM_HEALTH_STATUS_NOT_AVAILABLE = 0x81,
368     IPMI_CC_OEM_BUS_ERROR = 0x82,
369     IPMI_CC_OEM_READ_ONLY = 0x82,
370     IPMI_CC_OEM_WRITE_ONLY = 0x82,
371     IPMI_CC_OEM_NO_CABLE_PRESENT = 0x82,
372     IPMI_CC_OEM_DATA_COLLECTION_IN_PROGRESS = 0x82,
373     IPMI_CC_OEM_PAYLOAD_ACTIVATION_LIMIT_REACH = 0x82,
374     IPMI_CC_OEM_NACK_ON_WRITE = 0x83,
375     IPMI_CC_OEM_DATA_COLLECTION_FAILED = 0x83,
376     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITH_ENCRYPTION = 0x83,
377     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITHOUT_ENCRYPTION = 0x84,
378     IPMI_CC_OEM_INVALID_CHECKSUM = 0x85,
379     IPMI_CC_OEM_NO_CABLED_PCIE_PORTS_AVAILABLE = 0xC2,
380 };
381 
382 enum IPMI_RETURN_CODE_EXT
383 {
384     IPMI_CC_INVALID_LUN = 0xC2,
385     IPMI_CC_STORGE_LEAK = 0xC4,
386     IPMI_CC_REQUEST_DATA_TRUNCATED = 0xC6,
387     IPMI_CC_REQUEST_DATA_FIELD_LENGTH_LIMIT_EXCEEDED = 0xC8,
388     IPMI_CC_CANNOT_RETURN_NUMBER_OF_REQUESTED_DATA_BYTES = 0xCA,
389     IPMI_CC_REQUEST_SENSOR_DATA_RECORD_NOT_FOUND = 0xCB,
390     IPMI_CC_DESTINATION_UNAVAILABLE = 0xD3,
391     IPMI_CC_PARAMETER_NOT_SUPPORT_IN_PRESENT_STATE = 0xD5,
392 };
393 
394 constexpr unsigned char NETFUN_INTEL_APP_OEM = 0x3E;
395 
396 enum IPMI_NETFN_INTEL_OEM_APP_CMD
397 {
398     MDR_STATUS = 0x20,
399     MDR_COMPLETE = 0x21,
400     MDR_EVENT = 0x22,
401     MDR_READ = 0x23,
402     MDR_WRITE = 0x24,
403     MDR_LOCK = 0x25,
404     MDRII_AGENT_STATUS = 0x30,
405     MDRII_GET_DIR = 0x31,
406     MDRII_GET_DATA_INFO = 0x32,
407     MDRII_LOCK_DATA = 0x33,
408     MDRII_UNLOCK_DATA = 0x34,
409     MDRII_GET_DATA_BLOCK = 0x35,
410     MDRII_SEND_DIR = 0x38,
411     MDRII_SEND_DATA_INFO_OFFER = 0x39,
412     MDRII_SEND_DATA_INFO = 0x3a,
413     MDRII_DATA_START = 0x3b,
414     MDRII_DATA_DONE = 0x3c,
415     MDRII_SEND_DATA_BLOCK = 0x3d,
416 };
417