1 /*
2 // Copyright (c) 2018 Intel Corporation
3 //
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
7 //
8 //      http://www.apache.org/licenses/LICENSE-2.0
9 //
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
15 */
16 
17 #pragma once
18 
19 #include <user_channel/user_layer.hpp>
20 enum class IPMINetfnIntelOEMGeneralCmd
21 {
22     cmdSetBIOSID = 0x26,
23     cmdGetOEMDeviceInfo = 0x27,
24     cmdSetColdRedundancyConfig = 0x2d,
25     cmdGetColdRedundancyConfig = 0x2e,
26     cmdGetAICSlotFRUIDSlotPosRecords = 0x31,
27     cmdSetSystemGUID = 0x41,
28     cmdDisableBMCSystemReset = 0x42,
29     cmdGetBMCResetDisables = 0x43,
30     cmdSendEmbeddedFWUpdStatus = 0x44,
31     cmdSetPowerRestoreDelay = 0x54,
32     cmdGetPowerRestoreDelay = 0x55,
33     cmdSetFaultIndication = 0x57,
34     cmdSetOEMUser2Activation = 0x5A,
35     cmdSetSpecialUserPassword = 0x5F,
36     cmdSetShutdownPolicy = 0x60,
37     cmdGetShutdownPolicy = 0x62,
38     cmdSetFanConfig = 0x89,
39     cmdGetFanConfig = 0x8a,
40     cmdSetFanSpeedOffset = 0x8c,
41     cmdGetFanSpeedOffset = 0x8d,
42     cmdSetDimmOffset = 0x8e,
43     cmdGetDimmOffset = 0x8f,
44     cmdSetFscParameter = 0x90,
45     cmdGetFscParameter = 0x91,
46     cmdGetChassisIdentifier = 0x92,
47     cmdReadBaseBoardProductId = 0x93,
48     cmdGetProcessorErrConfig = 0x9A,
49     cmdSetProcessorErrConfig = 0x9B,
50     cmdGetLEDStatus = 0xB0,
51     cmdMtmKeepAlive = 0xB5,
52     cmdGetNmiStatus = 0xE5,
53     cmdSetNmiStatus = 0xED,
54 };
55 
56 enum class IPMINetfnIntelOEMPlatformCmd
57 {
58     cmdCfgHostSerialPortSpeed = 0x90,
59 };
60 
61 enum class IPMIIntelOEMReturnCodes
62 {
63     ipmiCCPayloadActive = 0x80,
64     ipmiCCInvalidPCIESlotID = 0x80,
65     ipmiCCParameterNotSupported = 0x80,
66     ipmiCCPayloadAlreadyDeactivated = 0x80,
67     ipmiCCSetInProcess = 0x81,
68     ipmiCCPayloadDisable = 0x81,
69     ipmiCCLostArbitration = 0x81,
70     ipmiCCInvalidCablePortIndex = 0x81,
71     ipmiCCHealthStatusNotAvailable = 0x81,
72     ipmiCCBusError = 0x82,
73     ipmiCCReadOnly = 0x82,
74     ipmiCCWriteOnly = 0x82,
75     ipmiCCNoCablePresent = 0x82,
76     ipmiCCDataCollectionInProgress = 0x82,
77     ipmiCCPayloadActivationLimitReached = 0x82,
78     ipmiCCNACKOnWrite = 0x83,
79     ipmiCCDataCollectionFailed = 0x83,
80     ipmiCCCanNotActivateWithEncrption = 0x83,
81     ipmiCCCanNotActivateWithoutEncryption = 0x84,
82     ipmiCCInvalidChecksum = 0x85,
83     ipmiCCNoCabledPCIEPortsAvailable = 0xC2,
84 
85 };
86 
87 enum class IPMIReturnCodeExt
88 {
89     ipmiCCInvalidLUN = 0xC2,
90     ipmiCCTimeout = 0xC3,
91     ipmiCCStorageLeak = 0xC4,
92     ipmiCCRequestDataTruncated = 0xC6,
93     ipmiCCRequestDataFieldLengthLimitExceeded = 0xC8,
94     ipmiCCCanNotReturnNumberOfRequestedDataBytes = 0xCA,
95     ipmiCCRequestSensorDataRecordNotFound = 0xCB,
96     ipmiCCDestinationUnavailable = 0xD3,
97     ipmiCCParamterNotSupportInPresentState = 0xD5,
98 };
99 
100 constexpr const uint8_t netfunIntelAppOEM = 0x3E;
101 static constexpr ipmi_netfn_t netfnIntcOEMGeneral =
102     NETFUN_NONE; // Netfun_none. In our platform, we use it as "intel oem
103                  // general". The code is 0x30
104 
105 // Intel OEM Platform code is 0x32
106 static constexpr ipmi_netfn_t netfnIntcOEMPlatform = NETFUN_OEM;
107 static constexpr const uint8_t maxBIOSIDLength = 0xFF;
108 static constexpr const uint8_t maxCPUNum = 4;
109 static constexpr const char* biosObjPath = "/xyz/openbmc_project/bios";
110 static constexpr const char* biosIntf =
111     "xyz.openbmc_project.Inventory.Item.Bios";
112 static constexpr const char* biosProp = "BiosId";
113 
114 static constexpr const char* powerRestoreDelayObjPath =
115     "/xyz/openbmc_project/control/power_restore_delay";
116 static constexpr const char* powerRestoreDelayIntf =
117     "xyz.openbmc_project.Control.Power.RestoreDelay";
118 static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay";
119 static constexpr const char* processorErrConfigObjPath =
120     "/xyz/openbmc_project/control/processor_error_config";
121 static constexpr const char* processorErrConfigIntf =
122     "xyz.openbmc_project.Control.Processor.ErrConfig";
123 static constexpr const char* bmcResetDisablesPath =
124     "/xyz/openbmc_project/control/bmc_reset_disables";
125 static constexpr const char* bmcResetDisablesIntf =
126     "xyz.openbmc_project.Control.ResetDisables";
127 
128 static constexpr const char* postCodesObjPath =
129     "/xyz/openbmc_project/State/Boot/PostCode";
130 static constexpr const char* postCodesIntf =
131     "xyz.openbmc_project.State.Boot.PostCode";
132 
133 static constexpr const char* identifyLEDObjPath =
134     "/xyz/openbmc_project/led/physical/identify";
135 static constexpr const char* ledIntf = "xyz.openbmc_project.Led.Physical";
136 static constexpr const char* statusAmberObjPath =
137     "/xyz/openbmc_project/led/physical/status_amber";
138 static constexpr const char* statusGreenObjPath =
139     "/xyz/openbmc_project/led/physical/status_green";
140 
141 static constexpr const uint8_t noShutdownOnOCOT = 0;
142 static constexpr const uint8_t shutdownOnOCOT = 1;
143 static constexpr const uint8_t noShutdownPolicySupported = 0;
144 static constexpr const uint8_t shutdownPolicySupported = 1;
145 static constexpr const char* oemShutdownPolicyIntf =
146     "com.intel.Control.OCOTShutdownPolicy";
147 static constexpr const char* oemShutdownPolicyObjPath =
148     "/com/intel/control/ocotshutdown_policy_config";
149 static constexpr const char* oemShutdownPolicyObjPathProp = "OCOTPolicy";
150 
151 static constexpr const char* fwGetEnvCmd = "/sbin/fw_printenv";
152 static constexpr const char* fwSetEnvCmd = "/sbin/fw_setenv";
153 static constexpr const char* fwHostSerailCfgEnvName = "hostserialcfg";
154 
155 constexpr const char* settingsBusName = "xyz.openbmc_project.Settings";
156 
157 static constexpr const uint8_t getHostSerialCfgCmd = 0;
158 static constexpr const uint8_t setHostSerialCfgCmd = 1;
159 
160 // parameters:
161 // 0: host serial port 1 and 2 normal speed
162 // 1: host serial port 1 high spend, port 2 normal speed
163 // 2: host serial port 1 normal spend, port 2 high speed
164 // 3: host serial port 1 and 2 high speed
165 static constexpr const uint8_t HostSerialCfgParamMax = 3;
166 static constexpr uint8_t ipmiDefaultUserId = 2;
167 
168 static constexpr const uint8_t selEvtTargetMask = 0xF0;
169 static constexpr const uint8_t selEvtTargetShift = 4;
170 
171 static constexpr const uint8_t targetInstanceMask = 0x0E;
172 static constexpr const uint8_t targetInstanceShift = 1;
173 
174 enum class IPMINetfnIntelOEMAppCmd
175 {
176     mdrStatus = 0x20,
177     mdrComplete = 0x21,
178     mdrEvent = 0x22,
179     mdrRead = 0x23,
180     mdrWrite = 0x24,
181     mdrLock = 0x25,
182     mdr2AgentStatus = 0x30,
183     mdr2GetDir = 0x31,
184     mdr2GetDataInfo = 0x32,
185     mdr2LockData = 0x33,
186     mdr2UnlockData = 0x34,
187     mdr2GetDataBlock = 0x35,
188     mdr2SendDir = 0x38,
189     mdr2SendDataInfoOffer = 0x39,
190     mdr2SendDataInfo = 0x3a,
191     mdr2DataStart = 0x3b,
192     mdr2DataDone = 0x3c,
193     mdr2SendDataBlock = 0x3d,
194 };
195 
196 enum class OEMDevEntityType
197 {
198     biosId,
199     devVer,
200     sdrVer,
201 };
202 
203 enum class FWUpdateTarget : uint8_t
204 {
205     targetBMC = 0x0,
206     targetBIOS = 0x1,
207     targetME = 0x2,
208     targetOEMEWS = 0x4,
209 };
210 
211 enum class CPUStatus
212 {
213     disabled = 0x0,
214     enabled = 0x1,
215     notPresent = 0x3,
216 };
217 
218 #pragma pack(push, 1)
219 struct GUIDData
220 {
221     uint8_t node1;
222     uint8_t node2;
223     uint8_t node3;
224     uint8_t node4;
225     uint8_t node5;
226     uint8_t node6;
227     uint8_t clock1;
228     uint8_t clock2;
229     uint8_t timeHigh1;
230     uint8_t timeHigh2;
231     uint8_t timeMid1;
232     uint8_t timeMid2;
233     uint8_t timeLow1;
234     uint8_t timeLow2;
235     uint8_t timeLow3;
236     uint8_t timeLow4;
237 };
238 
239 struct DeviceInfo
240 {
241     uint8_t biosIDLength;
242     uint8_t biosId[maxBIOSIDLength];
243 };
244 
245 struct SetPowerRestoreDelayReq
246 {
247     uint8_t byteMSB;
248     uint8_t byteLSB;
249 };
250 
251 struct GetPowerRestoreDelayRes
252 {
253     uint8_t byteMSB;
254     uint8_t byteLSB;
255 };
256 
257 struct GetOemDeviceInfoReq
258 {
259     uint8_t entityType;
260     uint8_t countToRead;
261     uint8_t offset;
262 };
263 
264 struct GetOemDeviceInfoRes
265 {
266     uint8_t resDatalen;
267     uint8_t data[maxBIOSIDLength];
268 };
269 
270 struct GetOEMShutdownPolicyRes
271 {
272     uint8_t policy;
273     uint8_t policySupport;
274 };
275 
276 struct SetFanConfigReq
277 {
278     uint8_t selectedProfile;
279     uint8_t flags;
280     // other parameters from previous generation are not supported
281 };
282 struct CfgHostSerialReq
283 {
284     uint8_t command;
285     uint8_t parameter;
286 };
287 #pragma pack(pop)
288 
289 //
290 // Fault type enumeration
291 //
292 enum class RemoteFaultType
293 {
294     fan,         // 0
295     temperature, // 1
296     power,       // 2
297     driveslot,   // 3
298     software,    // 4
299     memory,      // 5
300     max = 6      // 6
301 };
302 
303 // Enumeration for remote fault states as required by the HSC
304 //
305 enum class RemoteFaultState
306 {
307     // fault indicators
308     fanLEDs,
309     cpu1DimmLeds,
310     cpu2DimmLeds,
311     cpu3DimmLeds,
312     cpu4DimmLeds,
313     maxFaultState,
314 };
315 
316 enum class DimmFaultType
317 {
318     cpu1cpu2Dimm,
319     cpu3cpu4Dimm,
320     maxFaultGroup,
321 };
322 
323 enum class setFanProfileFlags : uint8_t
324 {
325     setFanProfile = 7,
326     setPerfAcousMode = 6,
327     // reserved [5:3]
328     performAcousSelect = 2
329     // reserved [1:0]
330 };
331 
332 enum class setFscParamFlags : uint8_t
333 {
334     tcontrol = 0x1,
335     pwmOffset = 0x2,
336     maxPwm = 0x3,
337     cfm = 0x4
338 };
339 
340 enum class dimmOffsetTypes : uint8_t
341 {
342     staticCltt = 0x0,
343     dimmPower = 0x2
344 };
345 
346 // FIXME: this stuff needs to be rewritten
347 enum IPMI_INTEL_OEM_RETURN_CODES
348 {
349     IPMI_CC_OEM_PAYLOAD_ACTIVE = 0x80,
350     IPMI_CC_OEM_INVALID_PCIE_SLOTID = 0x80,
351     IPMI_CC_OEM_PARAMETER_NOT_SUPPORTED = 0x80,
352     IPMI_CC_OEM_PAYLOAD_ALREADY_DEACTIVATED = 0x80,
353     IPMI_CC_OEM_SET_IN_PROCESS = 0x81,
354     IPMI_CC_OEM_PAYLOAD_DISABLE = 0x81,
355     IPMI_CC_OEM_LOST_ARBITRATION = 0x81,
356     IPMI_CC_OEM_INVALID_CABLE_PORT_INDEX = 0x81,
357     IPMI_CC_OEM_HEALTH_STATUS_NOT_AVAILABLE = 0x81,
358     IPMI_CC_OEM_BUS_ERROR = 0x82,
359     IPMI_CC_OEM_READ_ONLY = 0x82,
360     IPMI_CC_OEM_WRITE_ONLY = 0x82,
361     IPMI_CC_OEM_NO_CABLE_PRESENT = 0x82,
362     IPMI_CC_OEM_DATA_COLLECTION_IN_PROGRESS = 0x82,
363     IPMI_CC_OEM_PAYLOAD_ACTIVATION_LIMIT_REACH = 0x82,
364     IPMI_CC_OEM_NACK_ON_WRITE = 0x83,
365     IPMI_CC_OEM_DATA_COLLECTION_FAILED = 0x83,
366     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITH_ENCRYPTION = 0x83,
367     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITHOUT_ENCRYPTION = 0x84,
368     IPMI_CC_OEM_INVALID_CHECKSUM = 0x85,
369     IPMI_CC_OEM_NO_CABLED_PCIE_PORTS_AVAILABLE = 0xC2,
370 };
371 
372 enum IPMI_RETURN_CODE_EXT
373 {
374     IPMI_CC_INVALID_LUN = 0xC2,
375     IPMI_CC_STORGE_LEAK = 0xC4,
376     IPMI_CC_REQUEST_DATA_TRUNCATED = 0xC6,
377     IPMI_CC_REQUEST_DATA_FIELD_LENGTH_LIMIT_EXCEEDED = 0xC8,
378     IPMI_CC_CANNOT_RETURN_NUMBER_OF_REQUESTED_DATA_BYTES = 0xCA,
379     IPMI_CC_REQUEST_SENSOR_DATA_RECORD_NOT_FOUND = 0xCB,
380     IPMI_CC_DESTINATION_UNAVAILABLE = 0xD3,
381     IPMI_CC_PARAMETER_NOT_SUPPORT_IN_PRESENT_STATE = 0xD5,
382 };
383 
384 constexpr unsigned char NETFUN_INTEL_APP_OEM = 0x3E;
385 
386 enum IPMI_NETFN_INTEL_OEM_APP_CMD
387 {
388     MDR_STATUS = 0x20,
389     MDR_COMPLETE = 0x21,
390     MDR_EVENT = 0x22,
391     MDR_READ = 0x23,
392     MDR_WRITE = 0x24,
393     MDR_LOCK = 0x25,
394     MDRII_AGENT_STATUS = 0x30,
395     MDRII_GET_DIR = 0x31,
396     MDRII_GET_DATA_INFO = 0x32,
397     MDRII_LOCK_DATA = 0x33,
398     MDRII_UNLOCK_DATA = 0x34,
399     MDRII_GET_DATA_BLOCK = 0x35,
400     MDRII_SEND_DIR = 0x38,
401     MDRII_SEND_DATA_INFO_OFFER = 0x39,
402     MDRII_SEND_DATA_INFO = 0x3a,
403     MDRII_DATA_START = 0x3b,
404     MDRII_DATA_DONE = 0x3c,
405     MDRII_SEND_DATA_BLOCK = 0x3d,
406 };
407 
408 enum class IPMINetFnIntelOemGeneralCmds
409 {
410     GetSmSignal = 0x14,
411     SetSmSignal = 0x15,
412     controlBmcServices = 0xB1,
413     getBmcServiceStatus = 0xB2,
414     SetSensorOverride = 0xEE,
415 };
416