1 /*
2 // Copyright (c) 2018 Intel Corporation
3 //
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
7 //
8 //      http://www.apache.org/licenses/LICENSE-2.0
9 //
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
15 */
16 
17 #pragma once
18 
19 #include <user_channel/user_layer.hpp>
20 enum class IPMINetfnIntelOEMGeneralCmd
21 {
22     cmdSetBIOSID = 0x26,
23     cmdGetOEMDeviceInfo = 0x27,
24     cmdSetColdRedundancyConfig = 0x2d,
25     cmdGetColdRedundancyConfig = 0x2e,
26     cmdGetAICSlotFRUIDSlotPosRecords = 0x31,
27     cmdSetSystemGUID = 0x41,
28     cmdSendEmbeddedFWUpdStatus = 0x44,
29     cmdSetPowerRestoreDelay = 0x54,
30     cmdGetPowerRestoreDelay = 0x55,
31     cmdSetFaultIndication = 0x57,
32     cmdSetOEMUser2Activation = 0x5A,
33     cmdSetSpecialUserPassword = 0x5F,
34     cmdSetShutdownPolicy = 0x60,
35     cmdGetShutdownPolicy = 0x62,
36     cmdSetFanConfig = 0x89,
37     cmdGetFanConfig = 0x8a,
38     cmdSetFanSpeedOffset = 0x8c,
39     cmdGetFanSpeedOffset = 0x8d,
40     cmdSetDimmOffset = 0x8e,
41     cmdGetDimmOffset = 0x8f,
42     cmdSetFscParameter = 0x90,
43     cmdGetFscParameter = 0x91,
44     cmdGetChassisIdentifier = 0x92,
45     cmdReadBaseBoardProductId = 0x93,
46     cmdGetProcessorErrConfig = 0x9A,
47     cmdSetProcessorErrConfig = 0x9B,
48     cmdGetLEDStatus = 0xB0,
49     cmdMtmKeepAlive = 0xB5,
50     cmdGetNmiStatus = 0xE5,
51     cmdSetNmiStatus = 0xED,
52 };
53 
54 enum class IPMINetfnIntelOEMPlatformCmd
55 {
56     cmdCfgHostSerialPortSpeed = 0x90,
57 };
58 
59 enum class IPMIIntelOEMReturnCodes
60 {
61     ipmiCCPayloadActive = 0x80,
62     ipmiCCInvalidPCIESlotID = 0x80,
63     ipmiCCParameterNotSupported = 0x80,
64     ipmiCCPayloadAlreadyDeactivated = 0x80,
65     ipmiCCSetInProcess = 0x81,
66     ipmiCCPayloadDisable = 0x81,
67     ipmiCCLostArbitration = 0x81,
68     ipmiCCInvalidCablePortIndex = 0x81,
69     ipmiCCHealthStatusNotAvailable = 0x81,
70     ipmiCCBusError = 0x82,
71     ipmiCCReadOnly = 0x82,
72     ipmiCCWriteOnly = 0x82,
73     ipmiCCNoCablePresent = 0x82,
74     ipmiCCDataCollectionInProgress = 0x82,
75     ipmiCCPayloadActivationLimitReached = 0x82,
76     ipmiCCNACKOnWrite = 0x83,
77     ipmiCCDataCollectionFailed = 0x83,
78     ipmiCCCanNotActivateWithEncrption = 0x83,
79     ipmiCCCanNotActivateWithoutEncryption = 0x84,
80     ipmiCCInvalidChecksum = 0x85,
81     ipmiCCNoCabledPCIEPortsAvailable = 0xC2,
82 
83 };
84 
85 enum class IPMIReturnCodeExt
86 {
87     ipmiCCInvalidLUN = 0xC2,
88     ipmiCCTimeout = 0xC3,
89     ipmiCCStorageLeak = 0xC4,
90     ipmiCCRequestDataTruncated = 0xC6,
91     ipmiCCRequestDataFieldLengthLimitExceeded = 0xC8,
92     ipmiCCCanNotReturnNumberOfRequestedDataBytes = 0xCA,
93     ipmiCCRequestSensorDataRecordNotFound = 0xCB,
94     ipmiCCDestinationUnavailable = 0xD3,
95     ipmiCCParamterNotSupportInPresentState = 0xD5,
96 };
97 
98 constexpr const uint8_t netfunIntelAppOEM = 0x3E;
99 static constexpr ipmi_netfn_t netfnIntcOEMGeneral =
100     NETFUN_NONE; // Netfun_none. In our platform, we use it as "intel oem
101                  // general". The code is 0x30
102 
103 // Intel OEM Platform code is 0x32
104 static constexpr ipmi_netfn_t netfnIntcOEMPlatform = NETFUN_OEM;
105 static constexpr const uint8_t maxBIOSIDLength = 0xFF;
106 static constexpr const uint8_t maxCPUNum = 4;
107 static constexpr const char* biosObjPath = "/xyz/openbmc_project/bios";
108 static constexpr const char* biosIntf =
109     "xyz.openbmc_project.Inventory.Item.Bios";
110 static constexpr const char* biosProp = "BiosId";
111 
112 static constexpr const char* powerRestoreDelayObjPath =
113     "/xyz/openbmc_project/control/power_restore_delay";
114 static constexpr const char* powerRestoreDelayIntf =
115     "xyz.openbmc_project.Control.Power.RestoreDelay";
116 static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay";
117 static constexpr const char* processorErrConfigObjPath =
118     "/xyz/openbmc_project/control/processor_error_config";
119 static constexpr const char* processorErrConfigIntf =
120     "xyz.openbmc_project.Control.Processor.ErrConfig";
121 
122 static constexpr const char* postCodesObjPath =
123     "/xyz/openbmc_project/State/Boot/PostCode";
124 static constexpr const char* postCodesIntf =
125     "xyz.openbmc_project.State.Boot.PostCode";
126 
127 static constexpr const char* identifyLEDObjPath =
128     "/xyz/openbmc_project/led/physical/identify";
129 static constexpr const char* ledIntf = "xyz.openbmc_project.Led.Physical";
130 static constexpr const char* statusAmberObjPath =
131     "/xyz/openbmc_project/led/physical/status_amber";
132 static constexpr const char* statusGreenObjPath =
133     "/xyz/openbmc_project/led/physical/status_green";
134 
135 static constexpr const uint8_t noShutdownOnOCOT = 0;
136 static constexpr const uint8_t shutdownOnOCOT = 1;
137 static constexpr const uint8_t noShutdownPolicySupported = 0;
138 static constexpr const uint8_t shutdownPolicySupported = 1;
139 static constexpr const char* oemShutdownPolicyIntf =
140     "com.intel.Control.OCOTShutdownPolicy";
141 static constexpr const char* oemShutdownPolicyObjPath =
142     "/com/intel/control/ocotshutdown_policy_config";
143 static constexpr const char* oemShutdownPolicyObjPathProp = "OCOTPolicy";
144 
145 static constexpr const char* fwGetEnvCmd = "/sbin/fw_printenv";
146 static constexpr const char* fwSetEnvCmd = "/sbin/fw_setenv";
147 static constexpr const char* fwHostSerailCfgEnvName = "hostserialcfg";
148 
149 constexpr const char* settingsBusName = "xyz.openbmc_project.Settings";
150 
151 static constexpr const uint8_t getHostSerialCfgCmd = 0;
152 static constexpr const uint8_t setHostSerialCfgCmd = 1;
153 
154 // parameters:
155 // 0: host serial port 1 and 2 normal speed
156 // 1: host serial port 1 high spend, port 2 normal speed
157 // 2: host serial port 1 normal spend, port 2 high speed
158 // 3: host serial port 1 and 2 high speed
159 static constexpr const uint8_t HostSerialCfgParamMax = 3;
160 static constexpr uint8_t ipmiDefaultUserId = 2;
161 
162 static constexpr const uint8_t selEvtTargetMask = 0xF0;
163 static constexpr const uint8_t selEvtTargetShift = 4;
164 
165 static constexpr const uint8_t targetInstanceMask = 0x0E;
166 static constexpr const uint8_t targetInstanceShift = 1;
167 
168 enum class IPMINetfnIntelOEMAppCmd
169 {
170     mdrStatus = 0x20,
171     mdrComplete = 0x21,
172     mdrEvent = 0x22,
173     mdrRead = 0x23,
174     mdrWrite = 0x24,
175     mdrLock = 0x25,
176     mdr2AgentStatus = 0x30,
177     mdr2GetDir = 0x31,
178     mdr2GetDataInfo = 0x32,
179     mdr2LockData = 0x33,
180     mdr2UnlockData = 0x34,
181     mdr2GetDataBlock = 0x35,
182     mdr2SendDir = 0x38,
183     mdr2SendDataInfoOffer = 0x39,
184     mdr2SendDataInfo = 0x3a,
185     mdr2DataStart = 0x3b,
186     mdr2DataDone = 0x3c,
187     mdr2SendDataBlock = 0x3d,
188 };
189 
190 enum class OEMDevEntityType
191 {
192     biosId,
193     devVer,
194     sdrVer,
195 };
196 
197 enum class FWUpdateTarget : uint8_t
198 {
199     targetBMC = 0x0,
200     targetBIOS = 0x1,
201     targetME = 0x2,
202     targetOEMEWS = 0x4,
203 };
204 
205 enum class CPUStatus
206 {
207     disabled = 0x0,
208     enabled = 0x1,
209     notPresent = 0x3,
210 };
211 
212 #pragma pack(push, 1)
213 struct GUIDData
214 {
215     uint8_t node1;
216     uint8_t node2;
217     uint8_t node3;
218     uint8_t node4;
219     uint8_t node5;
220     uint8_t node6;
221     uint8_t clock1;
222     uint8_t clock2;
223     uint8_t timeHigh1;
224     uint8_t timeHigh2;
225     uint8_t timeMid1;
226     uint8_t timeMid2;
227     uint8_t timeLow1;
228     uint8_t timeLow2;
229     uint8_t timeLow3;
230     uint8_t timeLow4;
231 };
232 
233 struct DeviceInfo
234 {
235     uint8_t biosIDLength;
236     uint8_t biosId[maxBIOSIDLength];
237 };
238 
239 struct SetPowerRestoreDelayReq
240 {
241     uint8_t byteMSB;
242     uint8_t byteLSB;
243 };
244 
245 struct GetPowerRestoreDelayRes
246 {
247     uint8_t byteMSB;
248     uint8_t byteLSB;
249 };
250 
251 struct GetOemDeviceInfoReq
252 {
253     uint8_t entityType;
254     uint8_t countToRead;
255     uint8_t offset;
256 };
257 
258 struct GetOemDeviceInfoRes
259 {
260     uint8_t resDatalen;
261     uint8_t data[maxBIOSIDLength];
262 };
263 
264 struct GetOEMShutdownPolicyRes
265 {
266     uint8_t policy;
267     uint8_t policySupport;
268 };
269 
270 struct SetFanConfigReq
271 {
272     uint8_t selectedProfile;
273     uint8_t flags;
274     // other parameters from previous generation are not supported
275 };
276 struct CfgHostSerialReq
277 {
278     uint8_t command;
279     uint8_t parameter;
280 };
281 #pragma pack(pop)
282 
283 //
284 // Fault type enumeration
285 //
286 enum class RemoteFaultType
287 {
288     fan,         // 0
289     temperature, // 1
290     power,       // 2
291     driveslot,   // 3
292     software,    // 4
293     memory,      // 5
294     max = 6      // 6
295 };
296 
297 // Enumeration for remote fault states as required by the HSC
298 //
299 enum class RemoteFaultState
300 {
301     // fault indicators
302     fanLEDs,
303     cpu1DimmLeds,
304     cpu2DimmLeds,
305     cpu3DimmLeds,
306     cpu4DimmLeds,
307     maxFaultState,
308 };
309 
310 enum class DimmFaultType
311 {
312     cpu1cpu2Dimm,
313     cpu3cpu4Dimm,
314     maxFaultGroup,
315 };
316 
317 enum class setFanProfileFlags : uint8_t
318 {
319     setFanProfile = 7,
320     setPerfAcousMode = 6,
321     // reserved [5:3]
322     performAcousSelect = 2
323     // reserved [1:0]
324 };
325 
326 enum class setFscParamFlags : uint8_t
327 {
328     tcontrol = 0x1,
329     pwmOffset = 0x2,
330     maxPwm = 0x3,
331     cfm = 0x4
332 };
333 
334 enum class dimmOffsetTypes : uint8_t
335 {
336     staticCltt = 0x0,
337     dimmPower = 0x2
338 };
339 
340 // FIXME: this stuff needs to be rewritten
341 enum IPMI_INTEL_OEM_RETURN_CODES
342 {
343     IPMI_CC_OEM_PAYLOAD_ACTIVE = 0x80,
344     IPMI_CC_OEM_INVALID_PCIE_SLOTID = 0x80,
345     IPMI_CC_OEM_PARAMETER_NOT_SUPPORTED = 0x80,
346     IPMI_CC_OEM_PAYLOAD_ALREADY_DEACTIVATED = 0x80,
347     IPMI_CC_OEM_SET_IN_PROCESS = 0x81,
348     IPMI_CC_OEM_PAYLOAD_DISABLE = 0x81,
349     IPMI_CC_OEM_LOST_ARBITRATION = 0x81,
350     IPMI_CC_OEM_INVALID_CABLE_PORT_INDEX = 0x81,
351     IPMI_CC_OEM_HEALTH_STATUS_NOT_AVAILABLE = 0x81,
352     IPMI_CC_OEM_BUS_ERROR = 0x82,
353     IPMI_CC_OEM_READ_ONLY = 0x82,
354     IPMI_CC_OEM_WRITE_ONLY = 0x82,
355     IPMI_CC_OEM_NO_CABLE_PRESENT = 0x82,
356     IPMI_CC_OEM_DATA_COLLECTION_IN_PROGRESS = 0x82,
357     IPMI_CC_OEM_PAYLOAD_ACTIVATION_LIMIT_REACH = 0x82,
358     IPMI_CC_OEM_NACK_ON_WRITE = 0x83,
359     IPMI_CC_OEM_DATA_COLLECTION_FAILED = 0x83,
360     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITH_ENCRYPTION = 0x83,
361     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITHOUT_ENCRYPTION = 0x84,
362     IPMI_CC_OEM_INVALID_CHECKSUM = 0x85,
363     IPMI_CC_OEM_NO_CABLED_PCIE_PORTS_AVAILABLE = 0xC2,
364 };
365 
366 enum IPMI_RETURN_CODE_EXT
367 {
368     IPMI_CC_INVALID_LUN = 0xC2,
369     IPMI_CC_STORGE_LEAK = 0xC4,
370     IPMI_CC_REQUEST_DATA_TRUNCATED = 0xC6,
371     IPMI_CC_REQUEST_DATA_FIELD_LENGTH_LIMIT_EXCEEDED = 0xC8,
372     IPMI_CC_CANNOT_RETURN_NUMBER_OF_REQUESTED_DATA_BYTES = 0xCA,
373     IPMI_CC_REQUEST_SENSOR_DATA_RECORD_NOT_FOUND = 0xCB,
374     IPMI_CC_DESTINATION_UNAVAILABLE = 0xD3,
375     IPMI_CC_PARAMETER_NOT_SUPPORT_IN_PRESENT_STATE = 0xD5,
376 };
377 
378 constexpr unsigned char NETFUN_INTEL_APP_OEM = 0x3E;
379 
380 enum IPMI_NETFN_INTEL_OEM_APP_CMD
381 {
382     MDR_STATUS = 0x20,
383     MDR_COMPLETE = 0x21,
384     MDR_EVENT = 0x22,
385     MDR_READ = 0x23,
386     MDR_WRITE = 0x24,
387     MDR_LOCK = 0x25,
388     MDRII_AGENT_STATUS = 0x30,
389     MDRII_GET_DIR = 0x31,
390     MDRII_GET_DATA_INFO = 0x32,
391     MDRII_LOCK_DATA = 0x33,
392     MDRII_UNLOCK_DATA = 0x34,
393     MDRII_GET_DATA_BLOCK = 0x35,
394     MDRII_SEND_DIR = 0x38,
395     MDRII_SEND_DATA_INFO_OFFER = 0x39,
396     MDRII_SEND_DATA_INFO = 0x3a,
397     MDRII_DATA_START = 0x3b,
398     MDRII_DATA_DONE = 0x3c,
399     MDRII_SEND_DATA_BLOCK = 0x3d,
400 };
401 
402 enum class IPMINetFnIntelOemGeneralCmds
403 {
404     GetSmSignal = 0x14,
405     SetSmSignal = 0x15,
406     controlBmcServices = 0xB1,
407     getBmcServiceStatus = 0xB2,
408     SetSensorOverride = 0xEE,
409 };
410