1 /*
2 // Copyright (c) 2018 Intel Corporation
3 //
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
7 //
8 //      http://www.apache.org/licenses/LICENSE-2.0
9 //
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
15 */
16 
17 #pragma once
18 
19 #include <user_channel/user_layer.hpp>
20 enum class IPMINetfnIntelOEMGeneralCmd
21 {
22     cmdSetBIOSID = 0x26,
23     cmdGetOEMDeviceInfo = 0x27,
24     cmdGetAICSlotFRUIDSlotPosRecords = 0x31,
25     cmdSetSystemGUID = 0x41,
26     cmdSendEmbeddedFWUpdStatus = 0x44,
27     cmdSetPowerRestoreDelay = 0x54,
28     cmdGetPowerRestoreDelay = 0x55,
29     cmdSetFaultIndication = 0x57,
30     cmdSetOEMUser2Activation = 0x5A,
31     cmdSetSpecialUserPassword = 0x5F,
32     cmdSetShutdownPolicy = 0x60,
33     cmdGetShutdownPolicy = 0x62,
34     cmdSetFanConfig = 0x89,
35     cmdGetFanConfig = 0x8a,
36     cmdSetFanSpeedOffset = 0x8c,
37     cmdGetFanSpeedOffset = 0x8d,
38     cmdSetDimmOffset = 0x8e,
39     cmdGetDimmOffset = 0x8f,
40     cmdSetFscParameter = 0x90,
41     cmdGetFscParameter = 0x91,
42     cmdGetChassisIdentifier = 0x92,
43     cmdReadBaseBoardProductId = 0x93,
44     cmdGetProcessorErrConfig = 0x9A,
45     cmdSetProcessorErrConfig = 0x9B,
46     cmdGetLEDStatus = 0xB0,
47     cmdMtmKeepAlive = 0xB5,
48     cmdGetNmiStatus = 0xE5,
49     cmdSetNmiStatus = 0xED,
50 };
51 
52 enum class IPMINetfnIntelOEMPlatformCmd
53 {
54     cmdCfgHostSerialPortSpeed = 0x90,
55 };
56 
57 enum class IPMIIntelOEMReturnCodes
58 {
59     ipmiCCPayloadActive = 0x80,
60     ipmiCCInvalidPCIESlotID = 0x80,
61     ipmiCCParameterNotSupported = 0x80,
62     ipmiCCPayloadAlreadyDeactivated = 0x80,
63     ipmiCCSetInProcess = 0x81,
64     ipmiCCPayloadDisable = 0x81,
65     ipmiCCLostArbitration = 0x81,
66     ipmiCCInvalidCablePortIndex = 0x81,
67     ipmiCCHealthStatusNotAvailable = 0x81,
68     ipmiCCBusError = 0x82,
69     ipmiCCReadOnly = 0x82,
70     ipmiCCWriteOnly = 0x82,
71     ipmiCCNoCablePresent = 0x82,
72     ipmiCCDataCollectionInProgress = 0x82,
73     ipmiCCPayloadActivationLimitReached = 0x82,
74     ipmiCCNACKOnWrite = 0x83,
75     ipmiCCDataCollectionFailed = 0x83,
76     ipmiCCCanNotActivateWithEncrption = 0x83,
77     ipmiCCCanNotActivateWithoutEncryption = 0x84,
78     ipmiCCInvalidChecksum = 0x85,
79     ipmiCCNoCabledPCIEPortsAvailable = 0xC2,
80 
81 };
82 
83 enum class IPMIReturnCodeExt
84 {
85     ipmiCCInvalidLUN = 0xC2,
86     ipmiCCTimeout = 0xC3,
87     ipmiCCStorageLeak = 0xC4,
88     ipmiCCRequestDataTruncated = 0xC6,
89     ipmiCCRequestDataFieldLengthLimitExceeded = 0xC8,
90     ipmiCCCanNotReturnNumberOfRequestedDataBytes = 0xCA,
91     ipmiCCRequestSensorDataRecordNotFound = 0xCB,
92     ipmiCCDestinationUnavailable = 0xD3,
93     ipmiCCParamterNotSupportInPresentState = 0xD5,
94 };
95 
96 constexpr const uint8_t netfunIntelAppOEM = 0x3E;
97 static constexpr ipmi_netfn_t netfnIntcOEMGeneral =
98     NETFUN_NONE; // Netfun_none. In our platform, we use it as "intel oem
99                  // general". The code is 0x30
100 
101 // Intel OEM Platform code is 0x32
102 static constexpr ipmi_netfn_t netfnIntcOEMPlatform = NETFUN_OEM;
103 static constexpr const uint8_t maxBIOSIDLength = 0xFF;
104 static constexpr const uint8_t maxCPUNum = 4;
105 static constexpr const char* biosObjPath = "/xyz/openbmc_project/bios";
106 static constexpr const char* biosIntf =
107     "xyz.openbmc_project.Inventory.Item.Bios";
108 static constexpr const char* biosProp = "BiosId";
109 
110 static constexpr const char* powerRestoreDelayObjPath =
111     "/xyz/openbmc_project/control/power_restore_delay";
112 static constexpr const char* powerRestoreDelayIntf =
113     "xyz.openbmc_project.Control.Power.RestoreDelay";
114 static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay";
115 static constexpr const char* processorErrConfigObjPath =
116     "/xyz/openbmc_project/control/processor_error_config";
117 static constexpr const char* processorErrConfigIntf =
118     "xyz.openbmc_project.Control.Processor.ErrConfig";
119 
120 static constexpr const char* postCodesObjPath =
121     "/xyz/openbmc_project/State/Boot/PostCode";
122 static constexpr const char* postCodesIntf =
123     "xyz.openbmc_project.State.Boot.PostCode";
124 
125 static constexpr const char* identifyLEDObjPath =
126     "/xyz/openbmc_project/led/physical/identify";
127 static constexpr const char* ledIntf = "xyz.openbmc_project.Led.Physical";
128 static constexpr const char* statusAmberObjPath =
129     "/xyz/openbmc_project/led/physical/status_amber";
130 static constexpr const char* statusGreenObjPath =
131     "/xyz/openbmc_project/led/physical/status_green";
132 
133 static constexpr const uint8_t noShutdownOnOCOT = 0;
134 static constexpr const uint8_t shutdownOnOCOT = 1;
135 static constexpr const uint8_t noShutdownPolicySupported = 0;
136 static constexpr const uint8_t shutdownPolicySupported = 1;
137 static constexpr const char* oemShutdownPolicyIntf =
138     "com.intel.Control.OCOTShutdownPolicy";
139 static constexpr const char* oemShutdownPolicyObjPath =
140     "/com/intel/control/ocotshutdown_policy_config";
141 static constexpr const char* oemShutdownPolicyObjPathProp = "OCOTPolicy";
142 
143 static constexpr const char* fwGetEnvCmd = "/sbin/fw_printenv";
144 static constexpr const char* fwSetEnvCmd = "/sbin/fw_setenv";
145 static constexpr const char* fwHostSerailCfgEnvName = "hostserialcfg";
146 
147 constexpr const char* settingsBusName = "xyz.openbmc_project.Settings";
148 
149 static constexpr const uint8_t getHostSerialCfgCmd = 0;
150 static constexpr const uint8_t setHostSerialCfgCmd = 1;
151 
152 // parameters:
153 // 0: host serial port 1 and 2 normal speed
154 // 1: host serial port 1 high spend, port 2 normal speed
155 // 2: host serial port 1 normal spend, port 2 high speed
156 // 3: host serial port 1 and 2 high speed
157 static constexpr const uint8_t HostSerialCfgParamMax = 3;
158 static constexpr uint8_t ipmiDefaultUserId = 2;
159 
160 static constexpr const uint8_t selEvtTargetMask = 0xF0;
161 static constexpr const uint8_t selEvtTargetShift = 4;
162 
163 static constexpr const uint8_t targetInstanceMask = 0x0E;
164 static constexpr const uint8_t targetInstanceShift = 1;
165 
166 enum class IPMINetfnIntelOEMAppCmd
167 {
168     mdrStatus = 0x20,
169     mdrComplete = 0x21,
170     mdrEvent = 0x22,
171     mdrRead = 0x23,
172     mdrWrite = 0x24,
173     mdrLock = 0x25,
174     mdr2AgentStatus = 0x30,
175     mdr2GetDir = 0x31,
176     mdr2GetDataInfo = 0x32,
177     mdr2LockData = 0x33,
178     mdr2UnlockData = 0x34,
179     mdr2GetDataBlock = 0x35,
180     mdr2SendDir = 0x38,
181     mdr2SendDataInfoOffer = 0x39,
182     mdr2SendDataInfo = 0x3a,
183     mdr2DataStart = 0x3b,
184     mdr2DataDone = 0x3c,
185     mdr2SendDataBlock = 0x3d,
186 };
187 
188 enum class OEMDevEntityType
189 {
190     biosId,
191     devVer,
192     sdrVer,
193 };
194 
195 enum class FWUpdateTarget : uint8_t
196 {
197     targetBMC = 0x0,
198     targetBIOS = 0x1,
199     targetME = 0x2,
200     targetOEMEWS = 0x4,
201 };
202 
203 enum class CPUStatus
204 {
205     disabled = 0x0,
206     enabled = 0x1,
207     notPresent = 0x3,
208 };
209 
210 #pragma pack(push, 1)
211 struct GUIDData
212 {
213     uint8_t node1;
214     uint8_t node2;
215     uint8_t node3;
216     uint8_t node4;
217     uint8_t node5;
218     uint8_t node6;
219     uint8_t clock1;
220     uint8_t clock2;
221     uint8_t timeHigh1;
222     uint8_t timeHigh2;
223     uint8_t timeMid1;
224     uint8_t timeMid2;
225     uint8_t timeLow1;
226     uint8_t timeLow2;
227     uint8_t timeLow3;
228     uint8_t timeLow4;
229 };
230 
231 struct DeviceInfo
232 {
233     uint8_t biosIDLength;
234     uint8_t biosId[maxBIOSIDLength];
235 };
236 
237 struct SetPowerRestoreDelayReq
238 {
239     uint8_t byteMSB;
240     uint8_t byteLSB;
241 };
242 
243 struct GetPowerRestoreDelayRes
244 {
245     uint8_t byteMSB;
246     uint8_t byteLSB;
247 };
248 
249 struct GetOemDeviceInfoReq
250 {
251     uint8_t entityType;
252     uint8_t countToRead;
253     uint8_t offset;
254 };
255 
256 struct GetOemDeviceInfoRes
257 {
258     uint8_t resDatalen;
259     uint8_t data[maxBIOSIDLength];
260 };
261 
262 struct GetOEMShutdownPolicyRes
263 {
264     uint8_t policy;
265     uint8_t policySupport;
266 };
267 
268 struct SetFanConfigReq
269 {
270     uint8_t selectedProfile;
271     uint8_t flags;
272     // other parameters from previous generation are not supported
273 };
274 struct CfgHostSerialReq
275 {
276     uint8_t command;
277     uint8_t parameter;
278 };
279 #pragma pack(pop)
280 
281 //
282 // Fault type enumeration
283 //
284 enum class RemoteFaultType
285 {
286     fan,         // 0
287     temperature, // 1
288     power,       // 2
289     driveslot,   // 3
290     software,    // 4
291     memory,      // 5
292     max = 6      // 6
293 };
294 
295 // Enumeration for remote fault states as required by the HSC
296 //
297 enum class RemoteFaultState
298 {
299     // fault indicators
300     fanLEDs,
301     cpu1DimmLeds,
302     cpu2DimmLeds,
303     cpu3DimmLeds,
304     cpu4DimmLeds,
305     maxFaultState,
306 };
307 
308 enum class DimmFaultType
309 {
310     cpu1cpu2Dimm,
311     cpu3cpu4Dimm,
312     maxFaultGroup,
313 };
314 
315 enum class setFanProfileFlags : uint8_t
316 {
317     setFanProfile = 7,
318     setPerfAcousMode = 6,
319     // reserved [5:3]
320     performAcousSelect = 2
321     // reserved [1:0]
322 };
323 
324 enum class setFscParamFlags : uint8_t
325 {
326     tcontrol = 0x1,
327     pwmOffset = 0x2,
328     maxPwm = 0x3,
329     cfm = 0x4
330 };
331 
332 enum class dimmOffsetTypes : uint8_t
333 {
334     staticCltt = 0x0,
335     dimmPower = 0x2
336 };
337 
338 // FIXME: this stuff needs to be rewritten
339 enum IPMI_INTEL_OEM_RETURN_CODES
340 {
341     IPMI_CC_OEM_PAYLOAD_ACTIVE = 0x80,
342     IPMI_CC_OEM_INVALID_PCIE_SLOTID = 0x80,
343     IPMI_CC_OEM_PARAMETER_NOT_SUPPORTED = 0x80,
344     IPMI_CC_OEM_PAYLOAD_ALREADY_DEACTIVATED = 0x80,
345     IPMI_CC_OEM_SET_IN_PROCESS = 0x81,
346     IPMI_CC_OEM_PAYLOAD_DISABLE = 0x81,
347     IPMI_CC_OEM_LOST_ARBITRATION = 0x81,
348     IPMI_CC_OEM_INVALID_CABLE_PORT_INDEX = 0x81,
349     IPMI_CC_OEM_HEALTH_STATUS_NOT_AVAILABLE = 0x81,
350     IPMI_CC_OEM_BUS_ERROR = 0x82,
351     IPMI_CC_OEM_READ_ONLY = 0x82,
352     IPMI_CC_OEM_WRITE_ONLY = 0x82,
353     IPMI_CC_OEM_NO_CABLE_PRESENT = 0x82,
354     IPMI_CC_OEM_DATA_COLLECTION_IN_PROGRESS = 0x82,
355     IPMI_CC_OEM_PAYLOAD_ACTIVATION_LIMIT_REACH = 0x82,
356     IPMI_CC_OEM_NACK_ON_WRITE = 0x83,
357     IPMI_CC_OEM_DATA_COLLECTION_FAILED = 0x83,
358     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITH_ENCRYPTION = 0x83,
359     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITHOUT_ENCRYPTION = 0x84,
360     IPMI_CC_OEM_INVALID_CHECKSUM = 0x85,
361     IPMI_CC_OEM_NO_CABLED_PCIE_PORTS_AVAILABLE = 0xC2,
362 };
363 
364 enum IPMI_RETURN_CODE_EXT
365 {
366     IPMI_CC_INVALID_LUN = 0xC2,
367     IPMI_CC_STORGE_LEAK = 0xC4,
368     IPMI_CC_REQUEST_DATA_TRUNCATED = 0xC6,
369     IPMI_CC_REQUEST_DATA_FIELD_LENGTH_LIMIT_EXCEEDED = 0xC8,
370     IPMI_CC_CANNOT_RETURN_NUMBER_OF_REQUESTED_DATA_BYTES = 0xCA,
371     IPMI_CC_REQUEST_SENSOR_DATA_RECORD_NOT_FOUND = 0xCB,
372     IPMI_CC_DESTINATION_UNAVAILABLE = 0xD3,
373     IPMI_CC_PARAMETER_NOT_SUPPORT_IN_PRESENT_STATE = 0xD5,
374 };
375 
376 constexpr unsigned char NETFUN_INTEL_APP_OEM = 0x3E;
377 
378 enum IPMI_NETFN_INTEL_OEM_APP_CMD
379 {
380     MDR_STATUS = 0x20,
381     MDR_COMPLETE = 0x21,
382     MDR_EVENT = 0x22,
383     MDR_READ = 0x23,
384     MDR_WRITE = 0x24,
385     MDR_LOCK = 0x25,
386     MDRII_AGENT_STATUS = 0x30,
387     MDRII_GET_DIR = 0x31,
388     MDRII_GET_DATA_INFO = 0x32,
389     MDRII_LOCK_DATA = 0x33,
390     MDRII_UNLOCK_DATA = 0x34,
391     MDRII_GET_DATA_BLOCK = 0x35,
392     MDRII_SEND_DIR = 0x38,
393     MDRII_SEND_DATA_INFO_OFFER = 0x39,
394     MDRII_SEND_DATA_INFO = 0x3a,
395     MDRII_DATA_START = 0x3b,
396     MDRII_DATA_DONE = 0x3c,
397     MDRII_SEND_DATA_BLOCK = 0x3d,
398 };
399 
400 enum class IPMINetFnIntelOemGeneralCmds
401 {
402     GetSmSignal = 0x14,
403     SetSmSignal = 0x15,
404     controlBmcServices = 0xB1,
405     getBmcServiceStatus = 0xB2,
406     SetSensorOverride = 0xEE,
407 };
408