1 /* 2 // Copyright (c) 2018 Intel Corporation 3 // 4 // Licensed under the Apache License, Version 2.0 (the "License"); 5 // you may not use this file except in compliance with the License. 6 // You may obtain a copy of the License at 7 // 8 // http://www.apache.org/licenses/LICENSE-2.0 9 // 10 // Unless required by applicable law or agreed to in writing, software 11 // distributed under the License is distributed on an "AS IS" BASIS, 12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 // See the License for the specific language governing permissions and 14 // limitations under the License. 15 */ 16 17 #pragma once 18 19 #include <user_channel/user_layer.hpp> 20 enum class IPMINetfnIntelOEMGeneralCmd 21 { 22 cmdGetSmSignal = 0x14, 23 cmdSetSmSignal = 0x15, 24 cmdSetBIOSID = 0x26, 25 cmdGetOEMDeviceInfo = 0x27, 26 cmdSetColdRedundancyConfig = 0x2d, 27 cmdGetColdRedundancyConfig = 0x2e, 28 cmdGetAICSlotFRUIDSlotPosRecords = 0x31, 29 cmdSetSystemGUID = 0x41, 30 cmdDisableBMCSystemReset = 0x42, 31 cmdGetBMCResetDisables = 0x43, 32 cmdSendEmbeddedFWUpdStatus = 0x44, 33 cmdSetPowerRestoreDelay = 0x54, 34 cmdGetPowerRestoreDelay = 0x55, 35 cmdSetFaultIndication = 0x57, 36 cmdSetOEMUser2Activation = 0x5A, 37 cmdSetSpecialUserPassword = 0x5F, 38 cmdSetShutdownPolicy = 0x60, 39 cmdGetShutdownPolicy = 0x62, 40 cmdSetFanConfig = 0x89, 41 cmdGetFanConfig = 0x8a, 42 cmdSetFanSpeedOffset = 0x8c, 43 cmdGetFanSpeedOffset = 0x8d, 44 cmdSetDimmOffset = 0x8e, 45 cmdGetDimmOffset = 0x8f, 46 cmdSetFscParameter = 0x90, 47 cmdGetFscParameter = 0x91, 48 cmdGetChassisIdentifier = 0x92, 49 cmdReadBaseBoardProductId = 0x93, 50 cmdGetProcessorErrConfig = 0x9A, 51 cmdSetProcessorErrConfig = 0x9B, 52 cmdGetLEDStatus = 0xB0, 53 cmdControlBmcServices = 0xB1, 54 cmdGetBmcServiceStatus = 0xB2, 55 cmdMtmKeepAlive = 0xB5, 56 cmdGetNmiStatus = 0xE5, 57 cmdSetNmiStatus = 0xED, 58 }; 59 60 enum class IPMINetfnIntelOEMPlatformCmd 61 { 62 cmdCfgHostSerialPortSpeed = 0x90, 63 }; 64 65 enum class IPMIIntelOEMReturnCodes 66 { 67 ipmiCCPayloadActive = 0x80, 68 ipmiCCInvalidPCIESlotID = 0x80, 69 ipmiCCParameterNotSupported = 0x80, 70 ipmiCCPayloadAlreadyDeactivated = 0x80, 71 ipmiCCSetInProcess = 0x81, 72 ipmiCCPayloadDisable = 0x81, 73 ipmiCCLostArbitration = 0x81, 74 ipmiCCInvalidCablePortIndex = 0x81, 75 ipmiCCHealthStatusNotAvailable = 0x81, 76 ipmiCCBusError = 0x82, 77 ipmiCCReadOnly = 0x82, 78 ipmiCCWriteOnly = 0x82, 79 ipmiCCNoCablePresent = 0x82, 80 ipmiCCDataCollectionInProgress = 0x82, 81 ipmiCCPayloadActivationLimitReached = 0x82, 82 ipmiCCNACKOnWrite = 0x83, 83 ipmiCCDataCollectionFailed = 0x83, 84 ipmiCCCanNotActivateWithEncrption = 0x83, 85 ipmiCCCanNotActivateWithoutEncryption = 0x84, 86 ipmiCCInvalidChecksum = 0x85, 87 ipmiCCNoCabledPCIEPortsAvailable = 0xC2, 88 89 }; 90 91 enum class IPMIReturnCodeExt 92 { 93 ipmiCCInvalidLUN = 0xC2, 94 ipmiCCTimeout = 0xC3, 95 ipmiCCStorageLeak = 0xC4, 96 ipmiCCRequestDataTruncated = 0xC6, 97 ipmiCCRequestDataFieldLengthLimitExceeded = 0xC8, 98 ipmiCCCanNotReturnNumberOfRequestedDataBytes = 0xCA, 99 ipmiCCRequestSensorDataRecordNotFound = 0xCB, 100 ipmiCCDestinationUnavailable = 0xD3, 101 ipmiCCParamterNotSupportInPresentState = 0xD5, 102 }; 103 104 constexpr const uint8_t netfunIntelAppOEM = 0x3E; 105 static constexpr ipmi_netfn_t netfnIntcOEMGeneral = 106 NETFUN_NONE; // Netfun_none. In our platform, we use it as "intel oem 107 // general". The code is 0x30 108 109 // Intel OEM Platform code is 0x32 110 static constexpr ipmi_netfn_t netfnIntcOEMPlatform = NETFUN_OEM; 111 static constexpr const uint8_t maxBIOSIDLength = 0xFF; 112 static constexpr const uint8_t maxCPUNum = 4; 113 static constexpr const char* biosObjPath = "/xyz/openbmc_project/bios"; 114 static constexpr const char* biosIntf = 115 "xyz.openbmc_project.Inventory.Item.Bios"; 116 static constexpr const char* biosProp = "BiosId"; 117 118 static constexpr const char* powerRestoreDelayObjPath = 119 "/xyz/openbmc_project/control/power_restore_delay"; 120 static constexpr const char* powerRestoreDelayIntf = 121 "xyz.openbmc_project.Control.Power.RestoreDelay"; 122 static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay"; 123 static constexpr const char* processorErrConfigObjPath = 124 "/xyz/openbmc_project/control/processor_error_config"; 125 static constexpr const char* processorErrConfigIntf = 126 "xyz.openbmc_project.Control.Processor.ErrConfig"; 127 static constexpr const char* bmcResetDisablesPath = 128 "/xyz/openbmc_project/control/bmc_reset_disables"; 129 static constexpr const char* bmcResetDisablesIntf = 130 "xyz.openbmc_project.Control.ResetDisables"; 131 132 static constexpr const char* postCodesObjPath = 133 "/xyz/openbmc_project/State/Boot/PostCode"; 134 static constexpr const char* postCodesIntf = 135 "xyz.openbmc_project.State.Boot.PostCode"; 136 137 static constexpr const char* identifyLEDObjPath = 138 "/xyz/openbmc_project/led/physical/identify"; 139 static constexpr const char* ledIntf = "xyz.openbmc_project.Led.Physical"; 140 static constexpr const char* statusAmberObjPath = 141 "/xyz/openbmc_project/led/physical/status_amber"; 142 static constexpr const char* statusGreenObjPath = 143 "/xyz/openbmc_project/led/physical/status_green"; 144 145 static constexpr const uint8_t noShutdownOnOCOT = 0; 146 static constexpr const uint8_t shutdownOnOCOT = 1; 147 static constexpr const uint8_t noShutdownPolicySupported = 0; 148 static constexpr const uint8_t shutdownPolicySupported = 1; 149 static constexpr const char* oemShutdownPolicyIntf = 150 "com.intel.Control.OCOTShutdownPolicy"; 151 static constexpr const char* oemShutdownPolicyObjPath = 152 "/com/intel/control/ocotshutdown_policy_config"; 153 static constexpr const char* oemShutdownPolicyObjPathProp = "OCOTPolicy"; 154 155 static constexpr const char* fwGetEnvCmd = "/sbin/fw_printenv"; 156 static constexpr const char* fwSetEnvCmd = "/sbin/fw_setenv"; 157 static constexpr const char* fwHostSerailCfgEnvName = "hostserialcfg"; 158 159 constexpr const char* settingsBusName = "xyz.openbmc_project.Settings"; 160 161 static constexpr const uint8_t getHostSerialCfgCmd = 0; 162 static constexpr const uint8_t setHostSerialCfgCmd = 1; 163 164 // parameters: 165 // 0: host serial port 1 and 2 normal speed 166 // 1: host serial port 1 high spend, port 2 normal speed 167 // 2: host serial port 1 normal spend, port 2 high speed 168 // 3: host serial port 1 and 2 high speed 169 static constexpr const uint8_t HostSerialCfgParamMax = 3; 170 static constexpr uint8_t ipmiDefaultUserId = 2; 171 172 static constexpr const uint8_t selEvtTargetMask = 0xF0; 173 static constexpr const uint8_t selEvtTargetShift = 4; 174 175 static constexpr const uint8_t targetInstanceMask = 0x0E; 176 static constexpr const uint8_t targetInstanceShift = 1; 177 178 enum class IPMINetfnIntelOEMAppCmd 179 { 180 mdrStatus = 0x20, 181 mdrComplete = 0x21, 182 mdrEvent = 0x22, 183 mdrRead = 0x23, 184 mdrWrite = 0x24, 185 mdrLock = 0x25, 186 mdr2AgentStatus = 0x30, 187 mdr2GetDir = 0x31, 188 mdr2GetDataInfo = 0x32, 189 mdr2LockData = 0x33, 190 mdr2UnlockData = 0x34, 191 mdr2GetDataBlock = 0x35, 192 mdr2SendDir = 0x38, 193 mdr2SendDataInfoOffer = 0x39, 194 mdr2SendDataInfo = 0x3a, 195 mdr2DataStart = 0x3b, 196 mdr2DataDone = 0x3c, 197 mdr2SendDataBlock = 0x3d, 198 }; 199 200 enum class OEMDevEntityType 201 { 202 biosId, 203 devVer, 204 sdrVer, 205 }; 206 207 enum class FWUpdateTarget : uint8_t 208 { 209 targetBMC = 0x0, 210 targetBIOS = 0x1, 211 targetME = 0x2, 212 targetOEMEWS = 0x4, 213 }; 214 215 enum class CPUStatus 216 { 217 disabled = 0x0, 218 enabled = 0x1, 219 notPresent = 0x3, 220 }; 221 222 #pragma pack(push, 1) 223 struct GUIDData 224 { 225 uint8_t node1; 226 uint8_t node2; 227 uint8_t node3; 228 uint8_t node4; 229 uint8_t node5; 230 uint8_t node6; 231 uint8_t clock1; 232 uint8_t clock2; 233 uint8_t timeHigh1; 234 uint8_t timeHigh2; 235 uint8_t timeMid1; 236 uint8_t timeMid2; 237 uint8_t timeLow1; 238 uint8_t timeLow2; 239 uint8_t timeLow3; 240 uint8_t timeLow4; 241 }; 242 243 struct DeviceInfo 244 { 245 uint8_t biosIDLength; 246 uint8_t biosId[maxBIOSIDLength]; 247 }; 248 249 struct SetPowerRestoreDelayReq 250 { 251 uint8_t byteMSB; 252 uint8_t byteLSB; 253 }; 254 255 struct GetPowerRestoreDelayRes 256 { 257 uint8_t byteMSB; 258 uint8_t byteLSB; 259 }; 260 261 struct GetOemDeviceInfoReq 262 { 263 uint8_t entityType; 264 uint8_t countToRead; 265 uint8_t offset; 266 }; 267 268 struct GetOemDeviceInfoRes 269 { 270 uint8_t resDatalen; 271 uint8_t data[maxBIOSIDLength]; 272 }; 273 274 struct GetOEMShutdownPolicyRes 275 { 276 uint8_t policy; 277 uint8_t policySupport; 278 }; 279 280 struct SetFanConfigReq 281 { 282 uint8_t selectedProfile; 283 uint8_t flags; 284 // other parameters from previous generation are not supported 285 }; 286 struct CfgHostSerialReq 287 { 288 uint8_t command; 289 uint8_t parameter; 290 }; 291 #pragma pack(pop) 292 293 // 294 // Fault type enumeration 295 // 296 enum class RemoteFaultType 297 { 298 fan, // 0 299 temperature, // 1 300 power, // 2 301 driveslot, // 3 302 software, // 4 303 memory, // 5 304 max = 6 // 6 305 }; 306 307 // Enumeration for remote fault states as required by the HSC 308 // 309 enum class RemoteFaultState 310 { 311 // fault indicators 312 fanLEDs, 313 cpu1DimmLeds, 314 cpu2DimmLeds, 315 cpu3DimmLeds, 316 cpu4DimmLeds, 317 maxFaultState, 318 }; 319 320 enum class DimmFaultType 321 { 322 cpu1cpu2Dimm, 323 cpu3cpu4Dimm, 324 maxFaultGroup, 325 }; 326 327 enum class setFanProfileFlags : uint8_t 328 { 329 setFanProfile = 7, 330 setPerfAcousMode = 6, 331 // reserved [5:3] 332 performAcousSelect = 2 333 // reserved [1:0] 334 }; 335 336 enum class setFscParamFlags : uint8_t 337 { 338 tcontrol = 0x1, 339 pwmOffset = 0x2, 340 maxPwm = 0x3, 341 cfm = 0x4 342 }; 343 344 enum class dimmOffsetTypes : uint8_t 345 { 346 staticCltt = 0x0, 347 dimmPower = 0x2 348 }; 349 350 // FIXME: this stuff needs to be rewritten 351 enum IPMI_INTEL_OEM_RETURN_CODES 352 { 353 IPMI_CC_OEM_PAYLOAD_ACTIVE = 0x80, 354 IPMI_CC_OEM_INVALID_PCIE_SLOTID = 0x80, 355 IPMI_CC_OEM_PARAMETER_NOT_SUPPORTED = 0x80, 356 IPMI_CC_OEM_PAYLOAD_ALREADY_DEACTIVATED = 0x80, 357 IPMI_CC_OEM_SET_IN_PROCESS = 0x81, 358 IPMI_CC_OEM_PAYLOAD_DISABLE = 0x81, 359 IPMI_CC_OEM_LOST_ARBITRATION = 0x81, 360 IPMI_CC_OEM_INVALID_CABLE_PORT_INDEX = 0x81, 361 IPMI_CC_OEM_HEALTH_STATUS_NOT_AVAILABLE = 0x81, 362 IPMI_CC_OEM_BUS_ERROR = 0x82, 363 IPMI_CC_OEM_READ_ONLY = 0x82, 364 IPMI_CC_OEM_WRITE_ONLY = 0x82, 365 IPMI_CC_OEM_NO_CABLE_PRESENT = 0x82, 366 IPMI_CC_OEM_DATA_COLLECTION_IN_PROGRESS = 0x82, 367 IPMI_CC_OEM_PAYLOAD_ACTIVATION_LIMIT_REACH = 0x82, 368 IPMI_CC_OEM_NACK_ON_WRITE = 0x83, 369 IPMI_CC_OEM_DATA_COLLECTION_FAILED = 0x83, 370 IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITH_ENCRYPTION = 0x83, 371 IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITHOUT_ENCRYPTION = 0x84, 372 IPMI_CC_OEM_INVALID_CHECKSUM = 0x85, 373 IPMI_CC_OEM_NO_CABLED_PCIE_PORTS_AVAILABLE = 0xC2, 374 }; 375 376 enum IPMI_RETURN_CODE_EXT 377 { 378 IPMI_CC_INVALID_LUN = 0xC2, 379 IPMI_CC_STORGE_LEAK = 0xC4, 380 IPMI_CC_REQUEST_DATA_TRUNCATED = 0xC6, 381 IPMI_CC_REQUEST_DATA_FIELD_LENGTH_LIMIT_EXCEEDED = 0xC8, 382 IPMI_CC_CANNOT_RETURN_NUMBER_OF_REQUESTED_DATA_BYTES = 0xCA, 383 IPMI_CC_REQUEST_SENSOR_DATA_RECORD_NOT_FOUND = 0xCB, 384 IPMI_CC_DESTINATION_UNAVAILABLE = 0xD3, 385 IPMI_CC_PARAMETER_NOT_SUPPORT_IN_PRESENT_STATE = 0xD5, 386 }; 387 388 constexpr unsigned char NETFUN_INTEL_APP_OEM = 0x3E; 389 390 enum IPMI_NETFN_INTEL_OEM_APP_CMD 391 { 392 MDR_STATUS = 0x20, 393 MDR_COMPLETE = 0x21, 394 MDR_EVENT = 0x22, 395 MDR_READ = 0x23, 396 MDR_WRITE = 0x24, 397 MDR_LOCK = 0x25, 398 MDRII_AGENT_STATUS = 0x30, 399 MDRII_GET_DIR = 0x31, 400 MDRII_GET_DATA_INFO = 0x32, 401 MDRII_LOCK_DATA = 0x33, 402 MDRII_UNLOCK_DATA = 0x34, 403 MDRII_GET_DATA_BLOCK = 0x35, 404 MDRII_SEND_DIR = 0x38, 405 MDRII_SEND_DATA_INFO_OFFER = 0x39, 406 MDRII_SEND_DATA_INFO = 0x3a, 407 MDRII_DATA_START = 0x3b, 408 MDRII_DATA_DONE = 0x3c, 409 MDRII_SEND_DATA_BLOCK = 0x3d, 410 }; 411