1 /*
2 // Copyright (c) 2018 Intel Corporation
3 //
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
7 //
8 //      http://www.apache.org/licenses/LICENSE-2.0
9 //
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
15 */
16 
17 #pragma once
18 
19 #include <user_channel/user_layer.hpp>
20 enum class IPMINetfnIntelOEMGeneralCmd
21 {
22     cmdGetSmSignal = 0x14,
23     cmdSetSmSignal = 0x15,
24     cmdSetBIOSID = 0x26,
25     cmdGetOEMDeviceInfo = 0x27,
26     cmdSetColdRedundancyConfig = 0x2d,
27     cmdGetColdRedundancyConfig = 0x2e,
28     cmdGetAICSlotFRUIDSlotPosRecords = 0x31,
29     cmdSetSystemGUID = 0x41,
30     cmdDisableBMCSystemReset = 0x42,
31     cmdGetBMCResetDisables = 0x43,
32     cmdSendEmbeddedFWUpdStatus = 0x44,
33     cmdSetPowerRestoreDelay = 0x54,
34     cmdGetPowerRestoreDelay = 0x55,
35     cmdSetFaultIndication = 0x57,
36     cmdSetOEMUser2Activation = 0x5A,
37     cmdSetSpecialUserPassword = 0x5F,
38     cmdSetShutdownPolicy = 0x60,
39     cmdGetShutdownPolicy = 0x62,
40     cmdSetFanConfig = 0x89,
41     cmdGetFanConfig = 0x8a,
42     cmdSetFanSpeedOffset = 0x8c,
43     cmdGetFanSpeedOffset = 0x8d,
44     cmdSetDimmOffset = 0x8e,
45     cmdGetDimmOffset = 0x8f,
46     cmdSetFscParameter = 0x90,
47     cmdGetFscParameter = 0x91,
48     cmdGetChassisIdentifier = 0x92,
49     cmdReadBaseBoardProductId = 0x93,
50     cmdGetProcessorErrConfig = 0x9A,
51     cmdSetProcessorErrConfig = 0x9B,
52     cmdSetManufacturingData = 0xA1,
53     cmdGetManufacturingData = 0xA2,
54     cmdGetLEDStatus = 0xB0,
55     cmdControlBmcServices = 0xB1,
56     cmdGetBmcServiceStatus = 0xB2,
57     cmdMtmKeepAlive = 0xB5,
58     cmdGetNmiStatus = 0xE5,
59     cmdSetEfiBootOptions = 0xEA,
60     cmdGetEfiBootOptions = 0xEB,
61     cmdSetNmiStatus = 0xED,
62 };
63 
64 enum class IPMINetfnIntelOEMPlatformCmd
65 {
66     cmdCfgHostSerialPortSpeed = 0x90,
67 };
68 
69 enum class IPMIIntelOEMReturnCodes
70 {
71     ipmiCCPayloadActive = 0x80,
72     ipmiCCInvalidPCIESlotID = 0x80,
73     ipmiCCParameterNotSupported = 0x80,
74     ipmiCCPayloadAlreadyDeactivated = 0x80,
75     ipmiCCSetInProcess = 0x81,
76     ipmiCCPayloadDisable = 0x81,
77     ipmiCCLostArbitration = 0x81,
78     ipmiCCInvalidCablePortIndex = 0x81,
79     ipmiCCHealthStatusNotAvailable = 0x81,
80     ipmiCCBusError = 0x82,
81     ipmiCCReadOnly = 0x82,
82     ipmiCCWriteOnly = 0x82,
83     ipmiCCNoCablePresent = 0x82,
84     ipmiCCDataCollectionInProgress = 0x82,
85     ipmiCCPayloadActivationLimitReached = 0x82,
86     ipmiCCNACKOnWrite = 0x83,
87     ipmiCCDataCollectionFailed = 0x83,
88     ipmiCCCanNotActivateWithEncrption = 0x83,
89     ipmiCCCanNotActivateWithoutEncryption = 0x84,
90     ipmiCCInvalidChecksum = 0x85,
91     ipmiCCNoCabledPCIEPortsAvailable = 0xC2,
92 
93 };
94 
95 enum class IPMIReturnCodeExt
96 {
97     ipmiCCInvalidLUN = 0xC2,
98     ipmiCCTimeout = 0xC3,
99     ipmiCCStorageLeak = 0xC4,
100     ipmiCCRequestDataTruncated = 0xC6,
101     ipmiCCRequestDataFieldLengthLimitExceeded = 0xC8,
102     ipmiCCCanNotReturnNumberOfRequestedDataBytes = 0xCA,
103     ipmiCCRequestSensorDataRecordNotFound = 0xCB,
104     ipmiCCDestinationUnavailable = 0xD3,
105     ipmiCCParamterNotSupportInPresentState = 0xD5,
106 };
107 
108 constexpr const uint8_t netfunIntelAppOEM = 0x3E;
109 static constexpr ipmi_netfn_t netfnIntcOEMGeneral =
110     NETFUN_NONE; // Netfun_none. In our platform, we use it as "intel oem
111                  // general". The code is 0x30
112 
113 // Intel OEM Platform code is 0x32
114 static constexpr ipmi_netfn_t netfnIntcOEMPlatform = NETFUN_OEM;
115 static constexpr const uint8_t maxBIOSIDLength = 0xFF;
116 static constexpr const uint8_t maxCPUNum = 4;
117 static constexpr const char* biosObjPath = "/xyz/openbmc_project/bios";
118 static constexpr const char* biosIntf =
119     "xyz.openbmc_project.Inventory.Item.Bios";
120 static constexpr const char* biosProp = "BiosId";
121 
122 static constexpr const char* powerRestoreDelayObjPath =
123     "/xyz/openbmc_project/control/power_restore_delay";
124 static constexpr const char* powerRestoreDelayIntf =
125     "xyz.openbmc_project.Control.Power.RestoreDelay";
126 static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay";
127 static constexpr const char* processorErrConfigObjPath =
128     "/xyz/openbmc_project/control/processor_error_config";
129 static constexpr const char* processorErrConfigIntf =
130     "xyz.openbmc_project.Control.Processor.ErrConfig";
131 static constexpr const char* bmcResetDisablesPath =
132     "/xyz/openbmc_project/control/bmc_reset_disables";
133 static constexpr const char* bmcResetDisablesIntf =
134     "xyz.openbmc_project.Control.ResetDisables";
135 
136 static constexpr const char* postCodesObjPath =
137     "/xyz/openbmc_project/State/Boot/PostCode";
138 static constexpr const char* postCodesIntf =
139     "xyz.openbmc_project.State.Boot.PostCode";
140 
141 static constexpr const char* identifyLEDObjPath =
142     "/xyz/openbmc_project/led/physical/identify";
143 static constexpr const char* ledIntf = "xyz.openbmc_project.Led.Physical";
144 static constexpr const char* statusAmberObjPath =
145     "/xyz/openbmc_project/led/physical/status_amber";
146 static constexpr const char* statusGreenObjPath =
147     "/xyz/openbmc_project/led/physical/status_green";
148 
149 static constexpr const uint8_t noShutdownOnOCOT = 0;
150 static constexpr const uint8_t shutdownOnOCOT = 1;
151 static constexpr const uint8_t noShutdownPolicySupported = 0;
152 static constexpr const uint8_t shutdownPolicySupported = 1;
153 static constexpr const char* oemShutdownPolicyIntf =
154     "com.intel.Control.OCOTShutdownPolicy";
155 static constexpr const char* oemShutdownPolicyObjPath =
156     "/com/intel/control/ocotshutdown_policy_config";
157 static constexpr const char* oemShutdownPolicyObjPathProp = "OCOTPolicy";
158 
159 static constexpr const char* fwGetEnvCmd = "/sbin/fw_printenv";
160 static constexpr const char* fwSetEnvCmd = "/sbin/fw_setenv";
161 static constexpr const char* fwHostSerailCfgEnvName = "hostserialcfg";
162 
163 constexpr const char* settingsBusName = "xyz.openbmc_project.Settings";
164 
165 static constexpr const uint8_t getHostSerialCfgCmd = 0;
166 static constexpr const uint8_t setHostSerialCfgCmd = 1;
167 
168 // parameters:
169 // 0: host serial port 1 and 2 normal speed
170 // 1: host serial port 1 high spend, port 2 normal speed
171 // 2: host serial port 1 normal spend, port 2 high speed
172 // 3: host serial port 1 and 2 high speed
173 static constexpr const uint8_t HostSerialCfgParamMax = 3;
174 static constexpr uint8_t ipmiDefaultUserId = 2;
175 
176 static constexpr const uint8_t selEvtTargetMask = 0xF0;
177 static constexpr const uint8_t selEvtTargetShift = 4;
178 
179 static constexpr const uint8_t targetInstanceMask = 0x0E;
180 static constexpr const uint8_t targetInstanceShift = 1;
181 
182 enum class IPMINetfnIntelOEMAppCmd
183 {
184     mdrStatus = 0x20,
185     mdrComplete = 0x21,
186     mdrEvent = 0x22,
187     mdrRead = 0x23,
188     mdrWrite = 0x24,
189     mdrLock = 0x25,
190     mdr2AgentStatus = 0x30,
191     mdr2GetDir = 0x31,
192     mdr2GetDataInfo = 0x32,
193     mdr2LockData = 0x33,
194     mdr2UnlockData = 0x34,
195     mdr2GetDataBlock = 0x35,
196     mdr2SendDir = 0x38,
197     mdr2SendDataInfoOffer = 0x39,
198     mdr2SendDataInfo = 0x3a,
199     mdr2DataStart = 0x3b,
200     mdr2DataDone = 0x3c,
201     mdr2SendDataBlock = 0x3d,
202 };
203 
204 enum class OEMDevEntityType
205 {
206     biosId,
207     devVer,
208     sdrVer,
209 };
210 
211 enum class FWUpdateTarget : uint8_t
212 {
213     targetBMC = 0x0,
214     targetBIOS = 0x1,
215     targetME = 0x2,
216     targetOEMEWS = 0x4,
217 };
218 
219 enum class CPUStatus
220 {
221     disabled = 0x0,
222     enabled = 0x1,
223     notPresent = 0x3,
224 };
225 
226 #pragma pack(push, 1)
227 struct GUIDData
228 {
229     uint8_t node1;
230     uint8_t node2;
231     uint8_t node3;
232     uint8_t node4;
233     uint8_t node5;
234     uint8_t node6;
235     uint8_t clock1;
236     uint8_t clock2;
237     uint8_t timeHigh1;
238     uint8_t timeHigh2;
239     uint8_t timeMid1;
240     uint8_t timeMid2;
241     uint8_t timeLow1;
242     uint8_t timeLow2;
243     uint8_t timeLow3;
244     uint8_t timeLow4;
245 };
246 
247 struct DeviceInfo
248 {
249     uint8_t biosIDLength;
250     uint8_t biosId[maxBIOSIDLength];
251 };
252 
253 struct SetPowerRestoreDelayReq
254 {
255     uint8_t byteMSB;
256     uint8_t byteLSB;
257 };
258 
259 struct GetPowerRestoreDelayRes
260 {
261     uint8_t byteMSB;
262     uint8_t byteLSB;
263 };
264 
265 struct GetOemDeviceInfoReq
266 {
267     uint8_t entityType;
268     uint8_t countToRead;
269     uint8_t offset;
270 };
271 
272 struct GetOemDeviceInfoRes
273 {
274     uint8_t resDatalen;
275     uint8_t data[maxBIOSIDLength];
276 };
277 
278 struct GetOEMShutdownPolicyRes
279 {
280     uint8_t policy;
281     uint8_t policySupport;
282 };
283 
284 struct SetFanConfigReq
285 {
286     uint8_t selectedProfile;
287     uint8_t flags;
288     // other parameters from previous generation are not supported
289 };
290 struct CfgHostSerialReq
291 {
292     uint8_t command;
293     uint8_t parameter;
294 };
295 #pragma pack(pop)
296 
297 //
298 // Fault type enumeration
299 //
300 enum class RemoteFaultType
301 {
302     fan,         // 0
303     temperature, // 1
304     power,       // 2
305     driveslot,   // 3
306     software,    // 4
307     memory,      // 5
308     max = 6      // 6
309 };
310 
311 // Enumeration for remote fault states as required by the HSC
312 //
313 enum class RemoteFaultState
314 {
315     // fault indicators
316     fanLEDs,
317     cpu1DimmLeds,
318     cpu2DimmLeds,
319     cpu3DimmLeds,
320     cpu4DimmLeds,
321     maxFaultState,
322 };
323 
324 enum class DimmFaultType
325 {
326     cpu1cpu2Dimm,
327     cpu3cpu4Dimm,
328     maxFaultGroup,
329 };
330 
331 enum class setFanProfileFlags : uint8_t
332 {
333     setFanProfile = 7,
334     setPerfAcousMode = 6,
335     // reserved [5:3]
336     performAcousSelect = 2
337     // reserved [1:0]
338 };
339 
340 enum class setFscParamFlags : uint8_t
341 {
342     tcontrol = 0x1,
343     pwmOffset = 0x2,
344     maxPwm = 0x3,
345     cfm = 0x4
346 };
347 
348 enum class dimmOffsetTypes : uint8_t
349 {
350     staticCltt = 0x0,
351     dimmPower = 0x2
352 };
353 
354 // FIXME: this stuff needs to be rewritten
355 enum IPMI_INTEL_OEM_RETURN_CODES
356 {
357     IPMI_CC_OEM_PAYLOAD_ACTIVE = 0x80,
358     IPMI_CC_OEM_INVALID_PCIE_SLOTID = 0x80,
359     IPMI_CC_OEM_PARAMETER_NOT_SUPPORTED = 0x80,
360     IPMI_CC_OEM_PAYLOAD_ALREADY_DEACTIVATED = 0x80,
361     IPMI_CC_OEM_SET_IN_PROCESS = 0x81,
362     IPMI_CC_OEM_PAYLOAD_DISABLE = 0x81,
363     IPMI_CC_OEM_LOST_ARBITRATION = 0x81,
364     IPMI_CC_OEM_INVALID_CABLE_PORT_INDEX = 0x81,
365     IPMI_CC_OEM_HEALTH_STATUS_NOT_AVAILABLE = 0x81,
366     IPMI_CC_OEM_BUS_ERROR = 0x82,
367     IPMI_CC_OEM_READ_ONLY = 0x82,
368     IPMI_CC_OEM_WRITE_ONLY = 0x82,
369     IPMI_CC_OEM_NO_CABLE_PRESENT = 0x82,
370     IPMI_CC_OEM_DATA_COLLECTION_IN_PROGRESS = 0x82,
371     IPMI_CC_OEM_PAYLOAD_ACTIVATION_LIMIT_REACH = 0x82,
372     IPMI_CC_OEM_NACK_ON_WRITE = 0x83,
373     IPMI_CC_OEM_DATA_COLLECTION_FAILED = 0x83,
374     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITH_ENCRYPTION = 0x83,
375     IPMI_CC_OEM_CAN_NOT_ACTIVATE_WITHOUT_ENCRYPTION = 0x84,
376     IPMI_CC_OEM_INVALID_CHECKSUM = 0x85,
377     IPMI_CC_OEM_NO_CABLED_PCIE_PORTS_AVAILABLE = 0xC2,
378 };
379 
380 enum IPMI_RETURN_CODE_EXT
381 {
382     IPMI_CC_INVALID_LUN = 0xC2,
383     IPMI_CC_STORGE_LEAK = 0xC4,
384     IPMI_CC_REQUEST_DATA_TRUNCATED = 0xC6,
385     IPMI_CC_REQUEST_DATA_FIELD_LENGTH_LIMIT_EXCEEDED = 0xC8,
386     IPMI_CC_CANNOT_RETURN_NUMBER_OF_REQUESTED_DATA_BYTES = 0xCA,
387     IPMI_CC_REQUEST_SENSOR_DATA_RECORD_NOT_FOUND = 0xCB,
388     IPMI_CC_DESTINATION_UNAVAILABLE = 0xD3,
389     IPMI_CC_PARAMETER_NOT_SUPPORT_IN_PRESENT_STATE = 0xD5,
390 };
391 
392 constexpr unsigned char NETFUN_INTEL_APP_OEM = 0x3E;
393 
394 enum IPMI_NETFN_INTEL_OEM_APP_CMD
395 {
396     MDR_STATUS = 0x20,
397     MDR_COMPLETE = 0x21,
398     MDR_EVENT = 0x22,
399     MDR_READ = 0x23,
400     MDR_WRITE = 0x24,
401     MDR_LOCK = 0x25,
402     MDRII_AGENT_STATUS = 0x30,
403     MDRII_GET_DIR = 0x31,
404     MDRII_GET_DATA_INFO = 0x32,
405     MDRII_LOCK_DATA = 0x33,
406     MDRII_UNLOCK_DATA = 0x34,
407     MDRII_GET_DATA_BLOCK = 0x35,
408     MDRII_SEND_DIR = 0x38,
409     MDRII_SEND_DATA_INFO_OFFER = 0x39,
410     MDRII_SEND_DATA_INFO = 0x3a,
411     MDRII_DATA_START = 0x3b,
412     MDRII_DATA_DONE = 0x3c,
413     MDRII_SEND_DATA_BLOCK = 0x3d,
414 };
415