xref: /openbmc/dbus-sensors/src/tests/test_NvidiaGpuSensorTest.cpp (revision 87a0745bbf15a7f8a23bc5183e3640bd3a92db08)
1*87a0745bSEd Tanous /*
2*87a0745bSEd Tanous  * SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION &
3*87a0745bSEd Tanous  * AFFILIATES. All rights reserved.
4*87a0745bSEd Tanous  * SPDX-License-Identifier: Apache-2.0
5*87a0745bSEd Tanous  */
6*87a0745bSEd Tanous 
7*87a0745bSEd Tanous #include "NvidiaGpuMctpVdm.hpp"
8*87a0745bSEd Tanous #include "OcpMctpVdm.hpp"
9*87a0745bSEd Tanous 
10*87a0745bSEd Tanous #include <endian.h>
11*87a0745bSEd Tanous 
12*87a0745bSEd Tanous #include <array>
13*87a0745bSEd Tanous #include <cerrno>
14*87a0745bSEd Tanous #include <cstdint>
15*87a0745bSEd Tanous #include <cstring>
16*87a0745bSEd Tanous #include <vector>
17*87a0745bSEd Tanous 
18*87a0745bSEd Tanous #include <gtest/gtest.h>
19*87a0745bSEd Tanous 
20*87a0745bSEd Tanous namespace ocp_mctp_tests
21*87a0745bSEd Tanous {
22*87a0745bSEd Tanous 
23*87a0745bSEd Tanous class OcpMctpVdmTests : public ::testing::Test
24*87a0745bSEd Tanous {
25*87a0745bSEd Tanous   protected:
SetUp()26*87a0745bSEd Tanous     void SetUp() override
27*87a0745bSEd Tanous     {
28*87a0745bSEd Tanous         // Initialize common test data here
29*87a0745bSEd Tanous     }
30*87a0745bSEd Tanous };
31*87a0745bSEd Tanous 
32*87a0745bSEd Tanous // Tests for OcpMctpVdm::packHeader function
TEST_F(OcpMctpVdmTests,PackHeaderRequestSuccess)33*87a0745bSEd Tanous TEST_F(OcpMctpVdmTests, PackHeaderRequestSuccess)
34*87a0745bSEd Tanous {
35*87a0745bSEd Tanous     const uint16_t pciVendorId = 0x1234;
36*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo hdr{};
37*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVid msg{};
38*87a0745bSEd Tanous 
39*87a0745bSEd Tanous     hdr.ocp_accelerator_management_msg_type =
40*87a0745bSEd Tanous         static_cast<uint8_t>(ocp::accelerator_management::MessageType::REQUEST);
41*87a0745bSEd Tanous     hdr.instance_id = 5;
42*87a0745bSEd Tanous     hdr.msg_type = 0x7E;
43*87a0745bSEd Tanous 
44*87a0745bSEd Tanous     int result = ocp::accelerator_management::packHeader(pciVendorId, hdr, msg);
45*87a0745bSEd Tanous 
46*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
47*87a0745bSEd Tanous     EXPECT_EQ(msg.pci_vendor_id, htobe16(pciVendorId));
48*87a0745bSEd Tanous     EXPECT_EQ(msg.instance_id & ocp::accelerator_management::instanceIdBitMask,
49*87a0745bSEd Tanous               5);
50*87a0745bSEd Tanous     EXPECT_NE(msg.instance_id & ocp::accelerator_management::requestBitMask, 0);
51*87a0745bSEd Tanous     EXPECT_EQ(msg.ocp_version & 0x0F, ocp::accelerator_management::ocpVersion);
52*87a0745bSEd Tanous     EXPECT_EQ((msg.ocp_version & 0xF0) >>
53*87a0745bSEd Tanous                   ocp::accelerator_management::ocpTypeBitOffset,
54*87a0745bSEd Tanous               ocp::accelerator_management::ocpType);
55*87a0745bSEd Tanous     EXPECT_EQ(msg.ocp_accelerator_management_msg_type, 0x7E);
56*87a0745bSEd Tanous }
57*87a0745bSEd Tanous 
TEST_F(OcpMctpVdmTests,PackHeaderResponseSuccess)58*87a0745bSEd Tanous TEST_F(OcpMctpVdmTests, PackHeaderResponseSuccess)
59*87a0745bSEd Tanous {
60*87a0745bSEd Tanous     const uint16_t pciVendorId = 0x1234;
61*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo hdr{};
62*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVid msg{};
63*87a0745bSEd Tanous 
64*87a0745bSEd Tanous     hdr.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
65*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
66*87a0745bSEd Tanous     hdr.instance_id = 10;
67*87a0745bSEd Tanous     hdr.msg_type = 0x7E;
68*87a0745bSEd Tanous 
69*87a0745bSEd Tanous     int result = ocp::accelerator_management::packHeader(pciVendorId, hdr, msg);
70*87a0745bSEd Tanous 
71*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
72*87a0745bSEd Tanous     EXPECT_EQ(msg.pci_vendor_id, htobe16(pciVendorId));
73*87a0745bSEd Tanous     EXPECT_EQ(msg.instance_id & ocp::accelerator_management::instanceIdBitMask,
74*87a0745bSEd Tanous               10);
75*87a0745bSEd Tanous     EXPECT_EQ(msg.instance_id & ocp::accelerator_management::requestBitMask, 0);
76*87a0745bSEd Tanous     EXPECT_EQ(msg.ocp_version & 0x0F, ocp::accelerator_management::ocpVersion);
77*87a0745bSEd Tanous     EXPECT_EQ((msg.ocp_version & 0xF0) >>
78*87a0745bSEd Tanous                   ocp::accelerator_management::ocpTypeBitOffset,
79*87a0745bSEd Tanous               ocp::accelerator_management::ocpType);
80*87a0745bSEd Tanous     EXPECT_EQ(msg.ocp_accelerator_management_msg_type, 0x7E);
81*87a0745bSEd Tanous }
82*87a0745bSEd Tanous 
TEST_F(OcpMctpVdmTests,PackHeaderInvalidMessageType)83*87a0745bSEd Tanous TEST_F(OcpMctpVdmTests, PackHeaderInvalidMessageType)
84*87a0745bSEd Tanous {
85*87a0745bSEd Tanous     const uint16_t pciVendorId = 0x1234;
86*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo hdr{};
87*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVid msg{};
88*87a0745bSEd Tanous 
89*87a0745bSEd Tanous     hdr.ocp_accelerator_management_msg_type = 3; // Invalid message type
90*87a0745bSEd Tanous     hdr.instance_id = 5;
91*87a0745bSEd Tanous     hdr.msg_type = 0x7E;
92*87a0745bSEd Tanous 
93*87a0745bSEd Tanous     int result = ocp::accelerator_management::packHeader(pciVendorId, hdr, msg);
94*87a0745bSEd Tanous 
95*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL);
96*87a0745bSEd Tanous }
97*87a0745bSEd Tanous 
TEST_F(OcpMctpVdmTests,PackHeaderInvalidInstanceId)98*87a0745bSEd Tanous TEST_F(OcpMctpVdmTests, PackHeaderInvalidInstanceId)
99*87a0745bSEd Tanous {
100*87a0745bSEd Tanous     const uint16_t pciVendorId = 0x1234;
101*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo hdr{};
102*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVid msg{};
103*87a0745bSEd Tanous 
104*87a0745bSEd Tanous     hdr.ocp_accelerator_management_msg_type =
105*87a0745bSEd Tanous         static_cast<uint8_t>(ocp::accelerator_management::MessageType::REQUEST);
106*87a0745bSEd Tanous     hdr.instance_id = 32; // Out of range (0-31 valid)
107*87a0745bSEd Tanous     hdr.msg_type = 0x7E;
108*87a0745bSEd Tanous 
109*87a0745bSEd Tanous     int result = ocp::accelerator_management::packHeader(pciVendorId, hdr, msg);
110*87a0745bSEd Tanous 
111*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL);
112*87a0745bSEd Tanous }
113*87a0745bSEd Tanous 
114*87a0745bSEd Tanous // Tests for OcpMctpVdm::decodeReasonCodeAndCC function
TEST_F(OcpMctpVdmTests,DecodeReasonCodeAndCCSuccessCase)115*87a0745bSEd Tanous TEST_F(OcpMctpVdmTests, DecodeReasonCodeAndCCSuccessCase)
116*87a0745bSEd Tanous {
117*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse response{};
118*87a0745bSEd Tanous     response.command = 0x42;
119*87a0745bSEd Tanous     response.completion_code = static_cast<uint8_t>(
120*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
121*87a0745bSEd Tanous     response.reason_code = htole16(0x1234);
122*87a0745bSEd Tanous 
123*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
124*87a0745bSEd Tanous     uint16_t reasonCode{};
125*87a0745bSEd Tanous 
126*87a0745bSEd Tanous     std::array<uint8_t, sizeof(response)> buf{};
127*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
128*87a0745bSEd Tanous 
129*87a0745bSEd Tanous     int result =
130*87a0745bSEd Tanous         ocp::accelerator_management::decodeReasonCodeAndCC(buf, cc, reasonCode);
131*87a0745bSEd Tanous 
132*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
133*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
134*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0); // Should be 0 for SUCCESS
135*87a0745bSEd Tanous }
136*87a0745bSEd Tanous 
TEST_F(OcpMctpVdmTests,DecodeReasonCodeAndCCErrorCase)137*87a0745bSEd Tanous TEST_F(OcpMctpVdmTests, DecodeReasonCodeAndCCErrorCase)
138*87a0745bSEd Tanous {
139*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse response{};
140*87a0745bSEd Tanous     response.command = 0x42;
141*87a0745bSEd Tanous     response.completion_code = static_cast<uint8_t>(
142*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERROR);
143*87a0745bSEd Tanous     response.reason_code = htole16(0x5678);
144*87a0745bSEd Tanous 
145*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
146*87a0745bSEd Tanous     uint16_t reasonCode{};
147*87a0745bSEd Tanous 
148*87a0745bSEd Tanous     std::array<uint8_t, sizeof(response)> buf{};
149*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
150*87a0745bSEd Tanous 
151*87a0745bSEd Tanous     int result =
152*87a0745bSEd Tanous         ocp::accelerator_management::decodeReasonCodeAndCC(buf, cc, reasonCode);
153*87a0745bSEd Tanous 
154*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
155*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERROR);
156*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0x5678);
157*87a0745bSEd Tanous }
158*87a0745bSEd Tanous 
159*87a0745bSEd Tanous } // namespace ocp_mctp_tests
160*87a0745bSEd Tanous 
161*87a0745bSEd Tanous namespace gpu_mctp_tests
162*87a0745bSEd Tanous {
163*87a0745bSEd Tanous 
164*87a0745bSEd Tanous class GpuMctpVdmTests : public ::testing::Test
165*87a0745bSEd Tanous {
166*87a0745bSEd Tanous   protected:
SetUp()167*87a0745bSEd Tanous     void SetUp() override
168*87a0745bSEd Tanous     {
169*87a0745bSEd Tanous         // Initialize common test data here
170*87a0745bSEd Tanous     }
171*87a0745bSEd Tanous };
172*87a0745bSEd Tanous 
173*87a0745bSEd Tanous // Tests for GpuMctpVdm::packHeader function
TEST_F(GpuMctpVdmTests,PackHeaderSuccess)174*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, PackHeaderSuccess)
175*87a0745bSEd Tanous {
176*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo hdr{};
177*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVid msg{};
178*87a0745bSEd Tanous 
179*87a0745bSEd Tanous     hdr.ocp_accelerator_management_msg_type =
180*87a0745bSEd Tanous         static_cast<uint8_t>(ocp::accelerator_management::MessageType::REQUEST);
181*87a0745bSEd Tanous     hdr.instance_id = 5;
182*87a0745bSEd Tanous     hdr.msg_type = 0x7E;
183*87a0745bSEd Tanous 
184*87a0745bSEd Tanous     int result = gpu::packHeader(hdr, msg);
185*87a0745bSEd Tanous 
186*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
187*87a0745bSEd Tanous     EXPECT_EQ(msg.pci_vendor_id, htobe16(gpu::nvidiaPciVendorId));
188*87a0745bSEd Tanous     EXPECT_EQ(msg.instance_id & ocp::accelerator_management::instanceIdBitMask,
189*87a0745bSEd Tanous               5);
190*87a0745bSEd Tanous     EXPECT_NE(msg.instance_id & ocp::accelerator_management::requestBitMask, 0);
191*87a0745bSEd Tanous     EXPECT_EQ(msg.ocp_version & 0x0F, ocp::accelerator_management::ocpVersion);
192*87a0745bSEd Tanous     EXPECT_EQ((msg.ocp_version & 0xF0) >>
193*87a0745bSEd Tanous                   ocp::accelerator_management::ocpTypeBitOffset,
194*87a0745bSEd Tanous               ocp::accelerator_management::ocpType);
195*87a0745bSEd Tanous     EXPECT_EQ(msg.ocp_accelerator_management_msg_type, 0x7E);
196*87a0745bSEd Tanous }
197*87a0745bSEd Tanous 
198*87a0745bSEd Tanous // Tests for GpuMctpVdm::encodeQueryDeviceIdentificationRequest function
TEST_F(GpuMctpVdmTests,EncodeQueryDeviceIdentificationRequestSuccess)199*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, EncodeQueryDeviceIdentificationRequestSuccess)
200*87a0745bSEd Tanous {
201*87a0745bSEd Tanous     const uint8_t instanceId = 3;
202*87a0745bSEd Tanous     std::vector<uint8_t> buf(256);
203*87a0745bSEd Tanous 
204*87a0745bSEd Tanous     int result = gpu::encodeQueryDeviceIdentificationRequest(instanceId, buf);
205*87a0745bSEd Tanous 
206*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
207*87a0745bSEd Tanous 
208*87a0745bSEd Tanous     gpu::QueryDeviceIdentificationRequest request{};
209*87a0745bSEd Tanous     std::memcpy(&request, buf.data(), sizeof(request));
210*87a0745bSEd Tanous 
211*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.pci_vendor_id,
212*87a0745bSEd Tanous               htobe16(gpu::nvidiaPciVendorId));
213*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.instance_id &
214*87a0745bSEd Tanous                   ocp::accelerator_management::instanceIdBitMask,
215*87a0745bSEd Tanous               instanceId & ocp::accelerator_management::instanceIdBitMask);
216*87a0745bSEd Tanous     EXPECT_NE(request.hdr.msgHdr.hdr.instance_id &
217*87a0745bSEd Tanous                   ocp::accelerator_management::requestBitMask,
218*87a0745bSEd Tanous               0);
219*87a0745bSEd Tanous 
220*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.command,
221*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::DeviceCapabilityDiscoveryCommands::
222*87a0745bSEd Tanous                                        QUERY_DEVICE_IDENTIFICATION));
223*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.data_size, 0);
224*87a0745bSEd Tanous }
225*87a0745bSEd Tanous 
226*87a0745bSEd Tanous // Tests for GpuMctpVdm::decodeQueryDeviceIdentificationResponse function
TEST_F(GpuMctpVdmTests,DecodeQueryDeviceIdentificationResponseSuccess)227*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeQueryDeviceIdentificationResponseSuccess)
228*87a0745bSEd Tanous {
229*87a0745bSEd Tanous     // Create a mock successful response
230*87a0745bSEd Tanous     std::vector<uint8_t> buf(sizeof(gpu::QueryDeviceIdentificationResponse));
231*87a0745bSEd Tanous 
232*87a0745bSEd Tanous     gpu::QueryDeviceIdentificationResponse response{};
233*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
234*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
235*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
236*87a0745bSEd Tanous     headerInfo.instance_id = 3;
237*87a0745bSEd Tanous     headerInfo.msg_type =
238*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::DEVICE_CAPABILITY_DISCOVERY);
239*87a0745bSEd Tanous 
240*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
241*87a0745bSEd Tanous 
242*87a0745bSEd Tanous     // Populate response data
243*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
244*87a0745bSEd Tanous         gpu::DeviceCapabilityDiscoveryCommands::QUERY_DEVICE_IDENTIFICATION);
245*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
246*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
247*87a0745bSEd Tanous     response.hdr.reserved = 0;
248*87a0745bSEd Tanous     response.hdr.data_size =
249*87a0745bSEd Tanous         htole16(2); // Size of device_identification + instance_id
250*87a0745bSEd Tanous     response.device_identification =
251*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::DeviceIdentification::DEVICE_GPU);
252*87a0745bSEd Tanous     response.instance_id = 7;
253*87a0745bSEd Tanous 
254*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
255*87a0745bSEd Tanous 
256*87a0745bSEd Tanous     // Test decoding
257*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
258*87a0745bSEd Tanous     uint16_t reasonCode{};
259*87a0745bSEd Tanous     uint8_t deviceIdentification{};
260*87a0745bSEd Tanous     uint8_t deviceInstance{};
261*87a0745bSEd Tanous 
262*87a0745bSEd Tanous     int result = gpu::decodeQueryDeviceIdentificationResponse(
263*87a0745bSEd Tanous         buf, cc, reasonCode, deviceIdentification, deviceInstance);
264*87a0745bSEd Tanous 
265*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
266*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
267*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0);
268*87a0745bSEd Tanous     EXPECT_EQ(deviceIdentification,
269*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::DeviceIdentification::DEVICE_GPU));
270*87a0745bSEd Tanous     EXPECT_EQ(deviceInstance, 7);
271*87a0745bSEd Tanous }
272*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeQueryDeviceIdentificationResponseError)273*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeQueryDeviceIdentificationResponseError)
274*87a0745bSEd Tanous {
275*87a0745bSEd Tanous     // Create a mock successful response
276*87a0745bSEd Tanous     std::vector<uint8_t> buf(
277*87a0745bSEd Tanous         sizeof(ocp::accelerator_management::CommonNonSuccessResponse));
278*87a0745bSEd Tanous 
279*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse response{};
280*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
281*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
282*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
283*87a0745bSEd Tanous     headerInfo.instance_id = 3;
284*87a0745bSEd Tanous     headerInfo.msg_type =
285*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::DEVICE_CAPABILITY_DISCOVERY);
286*87a0745bSEd Tanous 
287*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.msgHdr.hdr);
288*87a0745bSEd Tanous 
289*87a0745bSEd Tanous     // Populate response data
290*87a0745bSEd Tanous     response.command = static_cast<uint8_t>(
291*87a0745bSEd Tanous         gpu::DeviceCapabilityDiscoveryCommands::QUERY_DEVICE_IDENTIFICATION);
292*87a0745bSEd Tanous     response.command = static_cast<uint8_t>(
293*87a0745bSEd Tanous         gpu::DeviceCapabilityDiscoveryCommands::QUERY_DEVICE_IDENTIFICATION);
294*87a0745bSEd Tanous     response.completion_code = static_cast<uint8_t>(
295*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERROR);
296*87a0745bSEd Tanous     response.reason_code = htole16(0x1234);
297*87a0745bSEd Tanous 
298*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
299*87a0745bSEd Tanous 
300*87a0745bSEd Tanous     // Test decoding
301*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
302*87a0745bSEd Tanous     uint16_t reasonCode{};
303*87a0745bSEd Tanous     uint8_t deviceIdentification{};
304*87a0745bSEd Tanous     uint8_t deviceInstance{};
305*87a0745bSEd Tanous 
306*87a0745bSEd Tanous     int result = gpu::decodeQueryDeviceIdentificationResponse(
307*87a0745bSEd Tanous         buf, cc, reasonCode, deviceIdentification, deviceInstance);
308*87a0745bSEd Tanous 
309*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
310*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERROR);
311*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0x1234);
312*87a0745bSEd Tanous }
313*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeQueryDeviceIdentificationResponseInvalidSize)314*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeQueryDeviceIdentificationResponseInvalidSize)
315*87a0745bSEd Tanous {
316*87a0745bSEd Tanous     // Create a too-small buffer
317*87a0745bSEd Tanous     std::vector<uint8_t> buf(
318*87a0745bSEd Tanous         sizeof(ocp::accelerator_management::Message) + 2); // Too small
319*87a0745bSEd Tanous 
320*87a0745bSEd Tanous     // Populate Message header only
321*87a0745bSEd Tanous     ocp::accelerator_management::Message msg{};
322*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
323*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
324*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
325*87a0745bSEd Tanous     headerInfo.instance_id = 3;
326*87a0745bSEd Tanous     headerInfo.msg_type =
327*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::DEVICE_CAPABILITY_DISCOVERY);
328*87a0745bSEd Tanous 
329*87a0745bSEd Tanous     gpu::packHeader(headerInfo, msg.hdr);
330*87a0745bSEd Tanous     std::memcpy(buf.data(), &msg, sizeof(msg));
331*87a0745bSEd Tanous 
332*87a0745bSEd Tanous     // Test decoding with insufficient data
333*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
334*87a0745bSEd Tanous     uint16_t reasonCode{};
335*87a0745bSEd Tanous     uint8_t deviceIdentification{};
336*87a0745bSEd Tanous     uint8_t deviceInstance{};
337*87a0745bSEd Tanous 
338*87a0745bSEd Tanous     int result = gpu::decodeQueryDeviceIdentificationResponse(
339*87a0745bSEd Tanous         buf, cc, reasonCode, deviceIdentification, deviceInstance);
340*87a0745bSEd Tanous 
341*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL); // Should indicate error for invalid size
342*87a0745bSEd Tanous }
343*87a0745bSEd Tanous 
344*87a0745bSEd Tanous // Tests for GpuMctpVdm::encodeGetTemperatureReadingRequest function
TEST_F(GpuMctpVdmTests,EncodeGetTemperatureReadingRequestSuccess)345*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, EncodeGetTemperatureReadingRequestSuccess)
346*87a0745bSEd Tanous {
347*87a0745bSEd Tanous     const uint8_t instanceId = 4;
348*87a0745bSEd Tanous     const uint8_t sensorId = 0;
349*87a0745bSEd Tanous     std::vector<uint8_t> buf(256);
350*87a0745bSEd Tanous 
351*87a0745bSEd Tanous     int result =
352*87a0745bSEd Tanous         gpu::encodeGetTemperatureReadingRequest(instanceId, sensorId, buf);
353*87a0745bSEd Tanous 
354*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
355*87a0745bSEd Tanous 
356*87a0745bSEd Tanous     gpu::GetTemperatureReadingRequest request{};
357*87a0745bSEd Tanous     std::memcpy(&request, buf.data(), sizeof(request));
358*87a0745bSEd Tanous 
359*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.pci_vendor_id,
360*87a0745bSEd Tanous               htobe16(gpu::nvidiaPciVendorId));
361*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.instance_id &
362*87a0745bSEd Tanous                   ocp::accelerator_management::instanceIdBitMask,
363*87a0745bSEd Tanous               instanceId & ocp::accelerator_management::instanceIdBitMask);
364*87a0745bSEd Tanous     EXPECT_NE(request.hdr.msgHdr.hdr.instance_id &
365*87a0745bSEd Tanous                   ocp::accelerator_management::requestBitMask,
366*87a0745bSEd Tanous               0);
367*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.ocp_accelerator_management_msg_type,
368*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL));
369*87a0745bSEd Tanous 
370*87a0745bSEd Tanous     // Verify request data
371*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.command,
372*87a0745bSEd Tanous               static_cast<uint8_t>(
373*87a0745bSEd Tanous                   gpu::PlatformEnvironmentalCommands::GET_TEMPERATURE_READING));
374*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.data_size, sizeof(sensorId));
375*87a0745bSEd Tanous     EXPECT_EQ(request.sensor_id, sensorId);
376*87a0745bSEd Tanous }
377*87a0745bSEd Tanous 
378*87a0745bSEd Tanous // Tests for GpuMctpVdm::decodeGetTemperatureReadingResponse function
TEST_F(GpuMctpVdmTests,DecodeGetTemperatureReadingResponseSuccess)379*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetTemperatureReadingResponseSuccess)
380*87a0745bSEd Tanous {
381*87a0745bSEd Tanous     // Create a mock successful response
382*87a0745bSEd Tanous     std::vector<uint8_t> buf(sizeof(gpu::GetTemperatureReadingResponse));
383*87a0745bSEd Tanous 
384*87a0745bSEd Tanous     gpu::GetTemperatureReadingResponse response{};
385*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
386*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
387*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
388*87a0745bSEd Tanous     headerInfo.instance_id = 4;
389*87a0745bSEd Tanous     headerInfo.msg_type =
390*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
391*87a0745bSEd Tanous 
392*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
393*87a0745bSEd Tanous 
394*87a0745bSEd Tanous     // Populate response data
395*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
396*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_TEMPERATURE_READING);
397*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
398*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
399*87a0745bSEd Tanous     response.hdr.reserved = 0;
400*87a0745bSEd Tanous     response.hdr.data_size = htole16(sizeof(int32_t));
401*87a0745bSEd Tanous 
402*87a0745bSEd Tanous     // Set a temperature value of 75.5°C (75.5 * 256 = 19328)
403*87a0745bSEd Tanous     response.reading = htole32(19328);
404*87a0745bSEd Tanous 
405*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
406*87a0745bSEd Tanous 
407*87a0745bSEd Tanous     // Test decoding
408*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
409*87a0745bSEd Tanous     uint16_t reasonCode{};
410*87a0745bSEd Tanous     double temperatureReading{};
411*87a0745bSEd Tanous 
412*87a0745bSEd Tanous     int result = gpu::decodeGetTemperatureReadingResponse(
413*87a0745bSEd Tanous         buf, cc, reasonCode, temperatureReading);
414*87a0745bSEd Tanous 
415*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
416*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
417*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0);
418*87a0745bSEd Tanous     EXPECT_NEAR(temperatureReading, 75.5, 0.01);
419*87a0745bSEd Tanous }
420*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetTemperatureReadingResponseError)421*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetTemperatureReadingResponseError)
422*87a0745bSEd Tanous {
423*87a0745bSEd Tanous     std::vector<uint8_t> buf(
424*87a0745bSEd Tanous         sizeof(ocp::accelerator_management::CommonNonSuccessResponse));
425*87a0745bSEd Tanous 
426*87a0745bSEd Tanous     // Populate error response data
427*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse errorResponse{};
428*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
429*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
430*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
431*87a0745bSEd Tanous     headerInfo.instance_id = 3;
432*87a0745bSEd Tanous     headerInfo.msg_type =
433*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::DEVICE_CAPABILITY_DISCOVERY);
434*87a0745bSEd Tanous 
435*87a0745bSEd Tanous     gpu::packHeader(headerInfo, errorResponse.msgHdr.hdr);
436*87a0745bSEd Tanous 
437*87a0745bSEd Tanous     errorResponse.command = static_cast<uint8_t>(
438*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_TEMPERATURE_READING);
439*87a0745bSEd Tanous     errorResponse.completion_code = static_cast<uint8_t>(
440*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
441*87a0745bSEd Tanous     errorResponse.reason_code = htole16(0x4321);
442*87a0745bSEd Tanous 
443*87a0745bSEd Tanous     std::memcpy(buf.data(), &errorResponse, sizeof(errorResponse));
444*87a0745bSEd Tanous 
445*87a0745bSEd Tanous     // Test decoding
446*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
447*87a0745bSEd Tanous     uint16_t reasonCode{};
448*87a0745bSEd Tanous     double temperatureReading{};
449*87a0745bSEd Tanous 
450*87a0745bSEd Tanous     int result = gpu::decodeGetTemperatureReadingResponse(
451*87a0745bSEd Tanous         buf, cc, reasonCode, temperatureReading);
452*87a0745bSEd Tanous 
453*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
454*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
455*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0x4321);
456*87a0745bSEd Tanous }
457*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetTemperatureReadingResponseInvalidSize)458*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetTemperatureReadingResponseInvalidSize)
459*87a0745bSEd Tanous {
460*87a0745bSEd Tanous     // Create a mock response with invalid data_size
461*87a0745bSEd Tanous     std::vector<uint8_t> buf(sizeof(gpu::GetTemperatureReadingResponse));
462*87a0745bSEd Tanous 
463*87a0745bSEd Tanous     gpu::GetTemperatureReadingResponse response{};
464*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
465*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
466*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
467*87a0745bSEd Tanous     headerInfo.instance_id = 4;
468*87a0745bSEd Tanous     headerInfo.msg_type =
469*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
470*87a0745bSEd Tanous 
471*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
472*87a0745bSEd Tanous 
473*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
474*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_TEMPERATURE_READING);
475*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
476*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
477*87a0745bSEd Tanous     response.hdr.reserved = 0;
478*87a0745bSEd Tanous     response.hdr.data_size = htole16(1); // Invalid - should be sizeof(int32_t)
479*87a0745bSEd Tanous     response.reading = htole32(19328);
480*87a0745bSEd Tanous 
481*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
482*87a0745bSEd Tanous 
483*87a0745bSEd Tanous     // Test decoding
484*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
485*87a0745bSEd Tanous     uint16_t reasonCode{};
486*87a0745bSEd Tanous     double temperatureReading{};
487*87a0745bSEd Tanous 
488*87a0745bSEd Tanous     int result = gpu::decodeGetTemperatureReadingResponse(
489*87a0745bSEd Tanous         buf, cc, reasonCode, temperatureReading);
490*87a0745bSEd Tanous 
491*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL); // Should indicate error for invalid data size
492*87a0745bSEd Tanous }
493*87a0745bSEd Tanous 
494*87a0745bSEd Tanous // Tests for GpuMctpVdm::encodeReadThermalParametersRequest function
TEST_F(GpuMctpVdmTests,EncodeReadThermalParametersRequestSuccess)495*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, EncodeReadThermalParametersRequestSuccess)
496*87a0745bSEd Tanous {
497*87a0745bSEd Tanous     const uint8_t instanceId = 5;
498*87a0745bSEd Tanous     const uint8_t sensorId = 1;
499*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::ReadThermalParametersRequest)> buf{};
500*87a0745bSEd Tanous 
501*87a0745bSEd Tanous     int result =
502*87a0745bSEd Tanous         gpu::encodeReadThermalParametersRequest(instanceId, sensorId, buf);
503*87a0745bSEd Tanous 
504*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
505*87a0745bSEd Tanous 
506*87a0745bSEd Tanous     gpu::ReadThermalParametersRequest request{};
507*87a0745bSEd Tanous     std::memcpy(&request, buf.data(), sizeof(request));
508*87a0745bSEd Tanous 
509*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.pci_vendor_id,
510*87a0745bSEd Tanous               htobe16(gpu::nvidiaPciVendorId));
511*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.instance_id &
512*87a0745bSEd Tanous                   ocp::accelerator_management::instanceIdBitMask,
513*87a0745bSEd Tanous               instanceId & ocp::accelerator_management::instanceIdBitMask);
514*87a0745bSEd Tanous     EXPECT_NE(request.hdr.msgHdr.hdr.instance_id &
515*87a0745bSEd Tanous                   ocp::accelerator_management::requestBitMask,
516*87a0745bSEd Tanous               0);
517*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.ocp_accelerator_management_msg_type,
518*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL));
519*87a0745bSEd Tanous 
520*87a0745bSEd Tanous     // Verify request data
521*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.command,
522*87a0745bSEd Tanous               static_cast<uint8_t>(
523*87a0745bSEd Tanous                   gpu::PlatformEnvironmentalCommands::READ_THERMAL_PARAMETERS));
524*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.data_size, sizeof(sensorId));
525*87a0745bSEd Tanous     EXPECT_EQ(request.sensor_id, sensorId);
526*87a0745bSEd Tanous }
527*87a0745bSEd Tanous 
528*87a0745bSEd Tanous // Tests for GpuMctpVdm::decodeReadThermalParametersResponse function
TEST_F(GpuMctpVdmTests,DecodeReadThermalParametersResponseSuccess)529*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeReadThermalParametersResponseSuccess)
530*87a0745bSEd Tanous {
531*87a0745bSEd Tanous     // Create a mock successful response
532*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::ReadThermalParametersResponse)> buf{};
533*87a0745bSEd Tanous 
534*87a0745bSEd Tanous     gpu::ReadThermalParametersResponse response{};
535*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
536*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
537*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
538*87a0745bSEd Tanous     headerInfo.instance_id = 5;
539*87a0745bSEd Tanous     headerInfo.msg_type =
540*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
541*87a0745bSEd Tanous 
542*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
543*87a0745bSEd Tanous 
544*87a0745bSEd Tanous     // Populate response data
545*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
546*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::READ_THERMAL_PARAMETERS);
547*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
548*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
549*87a0745bSEd Tanous     response.hdr.reserved = 0;
550*87a0745bSEd Tanous     response.hdr.data_size = htole16(sizeof(int32_t));
551*87a0745bSEd Tanous 
552*87a0745bSEd Tanous     // Set a threshold value of 85°C (85 * 256 = 21760)
553*87a0745bSEd Tanous     response.threshold = htole32(21760);
554*87a0745bSEd Tanous 
555*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
556*87a0745bSEd Tanous 
557*87a0745bSEd Tanous     // Test decoding
558*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
559*87a0745bSEd Tanous     uint16_t reasonCode{};
560*87a0745bSEd Tanous     int32_t threshold{};
561*87a0745bSEd Tanous 
562*87a0745bSEd Tanous     int result = gpu::decodeReadThermalParametersResponse(
563*87a0745bSEd Tanous         buf, cc, reasonCode, threshold);
564*87a0745bSEd Tanous 
565*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
566*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
567*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0);
568*87a0745bSEd Tanous     EXPECT_EQ(threshold, 21760);
569*87a0745bSEd Tanous }
570*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeReadThermalParametersResponseError)571*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeReadThermalParametersResponseError)
572*87a0745bSEd Tanous {
573*87a0745bSEd Tanous     std::array<uint8_t,
574*87a0745bSEd Tanous                sizeof(ocp::accelerator_management::CommonNonSuccessResponse)>
575*87a0745bSEd Tanous         buf{};
576*87a0745bSEd Tanous 
577*87a0745bSEd Tanous     // Populate error response data
578*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse errorResponse{};
579*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
580*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
581*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
582*87a0745bSEd Tanous     headerInfo.instance_id = 5;
583*87a0745bSEd Tanous     headerInfo.msg_type =
584*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
585*87a0745bSEd Tanous 
586*87a0745bSEd Tanous     gpu::packHeader(headerInfo, errorResponse.msgHdr.hdr);
587*87a0745bSEd Tanous 
588*87a0745bSEd Tanous     errorResponse.command = static_cast<uint8_t>(
589*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::READ_THERMAL_PARAMETERS);
590*87a0745bSEd Tanous     errorResponse.completion_code = static_cast<uint8_t>(
591*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
592*87a0745bSEd Tanous     errorResponse.reason_code = htole16(0x5678);
593*87a0745bSEd Tanous 
594*87a0745bSEd Tanous     std::memcpy(buf.data(), &errorResponse, sizeof(errorResponse));
595*87a0745bSEd Tanous 
596*87a0745bSEd Tanous     // Test decoding
597*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
598*87a0745bSEd Tanous     uint16_t reasonCode{};
599*87a0745bSEd Tanous     int32_t threshold{};
600*87a0745bSEd Tanous 
601*87a0745bSEd Tanous     int result = gpu::decodeReadThermalParametersResponse(
602*87a0745bSEd Tanous         buf, cc, reasonCode, threshold);
603*87a0745bSEd Tanous 
604*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
605*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
606*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0x5678);
607*87a0745bSEd Tanous }
608*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeReadThermalParametersResponseInvalidSize)609*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeReadThermalParametersResponseInvalidSize)
610*87a0745bSEd Tanous {
611*87a0745bSEd Tanous     // Create a mock response with invalid data_size
612*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::ReadThermalParametersResponse)> buf{};
613*87a0745bSEd Tanous 
614*87a0745bSEd Tanous     gpu::ReadThermalParametersResponse response{};
615*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
616*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
617*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
618*87a0745bSEd Tanous     headerInfo.instance_id = 5;
619*87a0745bSEd Tanous     headerInfo.msg_type =
620*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
621*87a0745bSEd Tanous 
622*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
623*87a0745bSEd Tanous 
624*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
625*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::READ_THERMAL_PARAMETERS);
626*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
627*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
628*87a0745bSEd Tanous     response.hdr.reserved = 0;
629*87a0745bSEd Tanous     response.hdr.data_size = htole16(2); // Invalid - should be sizeof(int32_t)
630*87a0745bSEd Tanous     response.threshold = htole32(21760);
631*87a0745bSEd Tanous 
632*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
633*87a0745bSEd Tanous 
634*87a0745bSEd Tanous     // Test decoding
635*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
636*87a0745bSEd Tanous     uint16_t reasonCode{};
637*87a0745bSEd Tanous     int32_t threshold{};
638*87a0745bSEd Tanous 
639*87a0745bSEd Tanous     int result = gpu::decodeReadThermalParametersResponse(
640*87a0745bSEd Tanous         buf, cc, reasonCode, threshold);
641*87a0745bSEd Tanous 
642*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL); // Should indicate error for invalid data size
643*87a0745bSEd Tanous }
644*87a0745bSEd Tanous 
645*87a0745bSEd Tanous // Tests for GpuMctpVdm::encodeGetCurrentPowerDrawRequest function
TEST_F(GpuMctpVdmTests,EncodeGetCurrentPowerDrawRequestSuccess)646*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, EncodeGetCurrentPowerDrawRequestSuccess)
647*87a0745bSEd Tanous {
648*87a0745bSEd Tanous     const uint8_t instanceId = 6;
649*87a0745bSEd Tanous     const uint8_t sensorId = 2;
650*87a0745bSEd Tanous     const uint8_t averagingInterval = 10;
651*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetCurrentPowerDrawRequest)> buf{};
652*87a0745bSEd Tanous 
653*87a0745bSEd Tanous     int result = gpu::encodeGetCurrentPowerDrawRequest(instanceId, sensorId,
654*87a0745bSEd Tanous                                                        averagingInterval, buf);
655*87a0745bSEd Tanous 
656*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
657*87a0745bSEd Tanous 
658*87a0745bSEd Tanous     gpu::GetCurrentPowerDrawRequest request{};
659*87a0745bSEd Tanous     std::memcpy(&request, buf.data(), sizeof(request));
660*87a0745bSEd Tanous 
661*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.pci_vendor_id,
662*87a0745bSEd Tanous               htobe16(gpu::nvidiaPciVendorId));
663*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.instance_id &
664*87a0745bSEd Tanous                   ocp::accelerator_management::instanceIdBitMask,
665*87a0745bSEd Tanous               instanceId & ocp::accelerator_management::instanceIdBitMask);
666*87a0745bSEd Tanous     EXPECT_NE(request.hdr.msgHdr.hdr.instance_id &
667*87a0745bSEd Tanous                   ocp::accelerator_management::requestBitMask,
668*87a0745bSEd Tanous               0);
669*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.ocp_accelerator_management_msg_type,
670*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL));
671*87a0745bSEd Tanous 
672*87a0745bSEd Tanous     // Verify request data
673*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.command,
674*87a0745bSEd Tanous               static_cast<uint8_t>(
675*87a0745bSEd Tanous                   gpu::PlatformEnvironmentalCommands::GET_CURRENT_POWER_DRAW));
676*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.data_size,
677*87a0745bSEd Tanous               sizeof(sensorId) + sizeof(averagingInterval));
678*87a0745bSEd Tanous     EXPECT_EQ(request.sensorId, sensorId);
679*87a0745bSEd Tanous     EXPECT_EQ(request.averagingInterval, averagingInterval);
680*87a0745bSEd Tanous }
681*87a0745bSEd Tanous 
682*87a0745bSEd Tanous // Tests for GpuMctpVdm::decodeGetCurrentPowerDrawResponse function
TEST_F(GpuMctpVdmTests,DecodeGetCurrentPowerDrawResponseSuccess)683*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetCurrentPowerDrawResponseSuccess)
684*87a0745bSEd Tanous {
685*87a0745bSEd Tanous     // Create a mock successful response
686*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetCurrentPowerDrawResponse)> buf{};
687*87a0745bSEd Tanous 
688*87a0745bSEd Tanous     gpu::GetCurrentPowerDrawResponse response{};
689*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
690*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
691*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
692*87a0745bSEd Tanous     headerInfo.instance_id = 6;
693*87a0745bSEd Tanous     headerInfo.msg_type =
694*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
695*87a0745bSEd Tanous 
696*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
697*87a0745bSEd Tanous 
698*87a0745bSEd Tanous     // Populate response data
699*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
700*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_CURRENT_POWER_DRAW);
701*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
702*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
703*87a0745bSEd Tanous     response.hdr.reserved = 0;
704*87a0745bSEd Tanous     response.hdr.data_size = htole16(sizeof(uint32_t));
705*87a0745bSEd Tanous 
706*87a0745bSEd Tanous     // Set a power value of 250W
707*87a0745bSEd Tanous     response.power = htole32(250);
708*87a0745bSEd Tanous 
709*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
710*87a0745bSEd Tanous 
711*87a0745bSEd Tanous     // Test decoding
712*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
713*87a0745bSEd Tanous     uint16_t reasonCode{};
714*87a0745bSEd Tanous     uint32_t power{};
715*87a0745bSEd Tanous 
716*87a0745bSEd Tanous     int result =
717*87a0745bSEd Tanous         gpu::decodeGetCurrentPowerDrawResponse(buf, cc, reasonCode, power);
718*87a0745bSEd Tanous 
719*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
720*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
721*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0);
722*87a0745bSEd Tanous     EXPECT_EQ(power, 250U);
723*87a0745bSEd Tanous }
724*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetCurrentPowerDrawResponseError)725*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetCurrentPowerDrawResponseError)
726*87a0745bSEd Tanous {
727*87a0745bSEd Tanous     std::array<uint8_t,
728*87a0745bSEd Tanous                sizeof(ocp::accelerator_management::CommonNonSuccessResponse)>
729*87a0745bSEd Tanous         buf{};
730*87a0745bSEd Tanous 
731*87a0745bSEd Tanous     // Populate error response data
732*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse errorResponse{};
733*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
734*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
735*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
736*87a0745bSEd Tanous     headerInfo.instance_id = 6;
737*87a0745bSEd Tanous     headerInfo.msg_type =
738*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
739*87a0745bSEd Tanous 
740*87a0745bSEd Tanous     gpu::packHeader(headerInfo, errorResponse.msgHdr.hdr);
741*87a0745bSEd Tanous 
742*87a0745bSEd Tanous     errorResponse.command = static_cast<uint8_t>(
743*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_CURRENT_POWER_DRAW);
744*87a0745bSEd Tanous     errorResponse.completion_code = static_cast<uint8_t>(
745*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
746*87a0745bSEd Tanous     errorResponse.reason_code = htole16(0x9ABC);
747*87a0745bSEd Tanous 
748*87a0745bSEd Tanous     std::memcpy(buf.data(), &errorResponse, sizeof(errorResponse));
749*87a0745bSEd Tanous 
750*87a0745bSEd Tanous     // Test decoding
751*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
752*87a0745bSEd Tanous     uint16_t reasonCode{};
753*87a0745bSEd Tanous     uint32_t power{};
754*87a0745bSEd Tanous 
755*87a0745bSEd Tanous     int result =
756*87a0745bSEd Tanous         gpu::decodeGetCurrentPowerDrawResponse(buf, cc, reasonCode, power);
757*87a0745bSEd Tanous 
758*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
759*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
760*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0x9ABC);
761*87a0745bSEd Tanous }
762*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetCurrentPowerDrawResponseInvalidSize)763*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetCurrentPowerDrawResponseInvalidSize)
764*87a0745bSEd Tanous {
765*87a0745bSEd Tanous     // Create a mock response with invalid data_size
766*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetCurrentPowerDrawResponse)> buf{};
767*87a0745bSEd Tanous 
768*87a0745bSEd Tanous     gpu::GetCurrentPowerDrawResponse response{};
769*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
770*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
771*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
772*87a0745bSEd Tanous     headerInfo.instance_id = 6;
773*87a0745bSEd Tanous     headerInfo.msg_type =
774*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
775*87a0745bSEd Tanous 
776*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
777*87a0745bSEd Tanous 
778*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
779*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_CURRENT_POWER_DRAW);
780*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
781*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
782*87a0745bSEd Tanous     response.hdr.reserved = 0;
783*87a0745bSEd Tanous     response.hdr.data_size = htole16(2); // Invalid - should be sizeof(uint32_t)
784*87a0745bSEd Tanous     response.power = htole32(250);
785*87a0745bSEd Tanous 
786*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
787*87a0745bSEd Tanous 
788*87a0745bSEd Tanous     // Test decoding
789*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
790*87a0745bSEd Tanous     uint16_t reasonCode{};
791*87a0745bSEd Tanous     uint32_t power{};
792*87a0745bSEd Tanous 
793*87a0745bSEd Tanous     int result =
794*87a0745bSEd Tanous         gpu::decodeGetCurrentPowerDrawResponse(buf, cc, reasonCode, power);
795*87a0745bSEd Tanous 
796*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL); // Should indicate error for invalid data size
797*87a0745bSEd Tanous }
798*87a0745bSEd Tanous 
799*87a0745bSEd Tanous // Tests for GpuMctpVdm::encodeGetCurrentEnergyCounterRequest function
TEST_F(GpuMctpVdmTests,EncodeGetCurrentEnergyCounterRequestSuccess)800*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, EncodeGetCurrentEnergyCounterRequestSuccess)
801*87a0745bSEd Tanous {
802*87a0745bSEd Tanous     const uint8_t instanceId = 7;
803*87a0745bSEd Tanous     const uint8_t sensorId = 3;
804*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetCurrentEnergyCounterRequest)> buf{};
805*87a0745bSEd Tanous 
806*87a0745bSEd Tanous     int result =
807*87a0745bSEd Tanous         gpu::encodeGetCurrentEnergyCounterRequest(instanceId, sensorId, buf);
808*87a0745bSEd Tanous 
809*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
810*87a0745bSEd Tanous 
811*87a0745bSEd Tanous     gpu::GetCurrentEnergyCounterRequest request{};
812*87a0745bSEd Tanous     std::memcpy(&request, buf.data(), sizeof(request));
813*87a0745bSEd Tanous 
814*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.pci_vendor_id,
815*87a0745bSEd Tanous               htobe16(gpu::nvidiaPciVendorId));
816*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.instance_id &
817*87a0745bSEd Tanous                   ocp::accelerator_management::instanceIdBitMask,
818*87a0745bSEd Tanous               instanceId & ocp::accelerator_management::instanceIdBitMask);
819*87a0745bSEd Tanous     EXPECT_NE(request.hdr.msgHdr.hdr.instance_id &
820*87a0745bSEd Tanous                   ocp::accelerator_management::requestBitMask,
821*87a0745bSEd Tanous               0);
822*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.ocp_accelerator_management_msg_type,
823*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL));
824*87a0745bSEd Tanous 
825*87a0745bSEd Tanous     // Verify request data
826*87a0745bSEd Tanous     EXPECT_EQ(
827*87a0745bSEd Tanous         request.hdr.command,
828*87a0745bSEd Tanous         static_cast<uint8_t>(
829*87a0745bSEd Tanous             gpu::PlatformEnvironmentalCommands::GET_CURRENT_ENERGY_COUNTER));
830*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.data_size, sizeof(sensorId));
831*87a0745bSEd Tanous     EXPECT_EQ(request.sensor_id, sensorId);
832*87a0745bSEd Tanous }
833*87a0745bSEd Tanous 
834*87a0745bSEd Tanous // Tests for GpuMctpVdm::decodeGetCurrentEnergyCounterResponse function
TEST_F(GpuMctpVdmTests,DecodeGetCurrentEnergyCounterResponseSuccess)835*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetCurrentEnergyCounterResponseSuccess)
836*87a0745bSEd Tanous {
837*87a0745bSEd Tanous     // Create a mock successful response
838*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetCurrentEnergyCounterResponse)> buf{};
839*87a0745bSEd Tanous 
840*87a0745bSEd Tanous     gpu::GetCurrentEnergyCounterResponse response{};
841*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
842*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
843*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
844*87a0745bSEd Tanous     headerInfo.instance_id = 7;
845*87a0745bSEd Tanous     headerInfo.msg_type =
846*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
847*87a0745bSEd Tanous 
848*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
849*87a0745bSEd Tanous 
850*87a0745bSEd Tanous     // Populate response data
851*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
852*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_CURRENT_ENERGY_COUNTER);
853*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
854*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
855*87a0745bSEd Tanous     response.hdr.reserved = 0;
856*87a0745bSEd Tanous     response.hdr.data_size = htole16(sizeof(uint64_t));
857*87a0745bSEd Tanous 
858*87a0745bSEd Tanous     // Set an energy value of 1000 Wh (1000 * 3600 = 3600000 Joules)
859*87a0745bSEd Tanous     response.energy = htole64(3600000);
860*87a0745bSEd Tanous 
861*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
862*87a0745bSEd Tanous 
863*87a0745bSEd Tanous     // Test decoding
864*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
865*87a0745bSEd Tanous     uint16_t reasonCode{};
866*87a0745bSEd Tanous     uint64_t energy{};
867*87a0745bSEd Tanous 
868*87a0745bSEd Tanous     int result =
869*87a0745bSEd Tanous         gpu::decodeGetCurrentEnergyCounterResponse(buf, cc, reasonCode, energy);
870*87a0745bSEd Tanous 
871*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
872*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
873*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0);
874*87a0745bSEd Tanous     EXPECT_EQ(energy, 3600000U);
875*87a0745bSEd Tanous }
876*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetCurrentEnergyCounterResponseError)877*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetCurrentEnergyCounterResponseError)
878*87a0745bSEd Tanous {
879*87a0745bSEd Tanous     std::array<uint8_t,
880*87a0745bSEd Tanous                sizeof(ocp::accelerator_management::CommonNonSuccessResponse)>
881*87a0745bSEd Tanous         buf{};
882*87a0745bSEd Tanous 
883*87a0745bSEd Tanous     // Populate error response data
884*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse errorResponse{};
885*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
886*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
887*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
888*87a0745bSEd Tanous     headerInfo.instance_id = 7;
889*87a0745bSEd Tanous     headerInfo.msg_type =
890*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
891*87a0745bSEd Tanous 
892*87a0745bSEd Tanous     gpu::packHeader(headerInfo, errorResponse.msgHdr.hdr);
893*87a0745bSEd Tanous 
894*87a0745bSEd Tanous     errorResponse.command = static_cast<uint8_t>(
895*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_CURRENT_ENERGY_COUNTER);
896*87a0745bSEd Tanous     errorResponse.completion_code = static_cast<uint8_t>(
897*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
898*87a0745bSEd Tanous     errorResponse.reason_code = htole16(0xDEF0);
899*87a0745bSEd Tanous 
900*87a0745bSEd Tanous     std::memcpy(buf.data(), &errorResponse, sizeof(errorResponse));
901*87a0745bSEd Tanous 
902*87a0745bSEd Tanous     // Test decoding
903*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
904*87a0745bSEd Tanous     uint16_t reasonCode{};
905*87a0745bSEd Tanous     uint64_t energy{};
906*87a0745bSEd Tanous 
907*87a0745bSEd Tanous     int result =
908*87a0745bSEd Tanous         gpu::decodeGetCurrentEnergyCounterResponse(buf, cc, reasonCode, energy);
909*87a0745bSEd Tanous 
910*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
911*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
912*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0xDEF0);
913*87a0745bSEd Tanous }
914*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetCurrentEnergyCounterResponseInvalidSize)915*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetCurrentEnergyCounterResponseInvalidSize)
916*87a0745bSEd Tanous {
917*87a0745bSEd Tanous     // Create a mock response with invalid data_size
918*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetCurrentEnergyCounterResponse)> buf{};
919*87a0745bSEd Tanous 
920*87a0745bSEd Tanous     gpu::GetCurrentEnergyCounterResponse response{};
921*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
922*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
923*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
924*87a0745bSEd Tanous     headerInfo.instance_id = 7;
925*87a0745bSEd Tanous     headerInfo.msg_type =
926*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
927*87a0745bSEd Tanous 
928*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
929*87a0745bSEd Tanous 
930*87a0745bSEd Tanous     response.hdr.command = static_cast<uint8_t>(
931*87a0745bSEd Tanous         gpu::PlatformEnvironmentalCommands::GET_CURRENT_ENERGY_COUNTER);
932*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
933*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
934*87a0745bSEd Tanous     response.hdr.reserved = 0;
935*87a0745bSEd Tanous     response.hdr.data_size = htole16(4); // Invalid - should be sizeof(uint64_t)
936*87a0745bSEd Tanous     response.energy = htole64(3600000);
937*87a0745bSEd Tanous 
938*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
939*87a0745bSEd Tanous 
940*87a0745bSEd Tanous     // Test decoding
941*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
942*87a0745bSEd Tanous     uint16_t reasonCode{};
943*87a0745bSEd Tanous     uint64_t energy{};
944*87a0745bSEd Tanous 
945*87a0745bSEd Tanous     int result =
946*87a0745bSEd Tanous         gpu::decodeGetCurrentEnergyCounterResponse(buf, cc, reasonCode, energy);
947*87a0745bSEd Tanous 
948*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL); // Should indicate error for invalid data size
949*87a0745bSEd Tanous }
950*87a0745bSEd Tanous 
951*87a0745bSEd Tanous // Tests for GpuMctpVdm::encodeGetVoltageRequest function
TEST_F(GpuMctpVdmTests,EncodeGetVoltageRequestSuccess)952*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, EncodeGetVoltageRequestSuccess)
953*87a0745bSEd Tanous {
954*87a0745bSEd Tanous     const uint8_t instanceId = 8;
955*87a0745bSEd Tanous     const uint8_t sensorId = 4;
956*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetVoltageRequest)> buf{};
957*87a0745bSEd Tanous 
958*87a0745bSEd Tanous     int result = gpu::encodeGetVoltageRequest(instanceId, sensorId, buf);
959*87a0745bSEd Tanous 
960*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
961*87a0745bSEd Tanous 
962*87a0745bSEd Tanous     gpu::GetVoltageRequest request{};
963*87a0745bSEd Tanous     std::memcpy(&request, buf.data(), sizeof(request));
964*87a0745bSEd Tanous 
965*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.pci_vendor_id,
966*87a0745bSEd Tanous               htobe16(gpu::nvidiaPciVendorId));
967*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.instance_id &
968*87a0745bSEd Tanous                   ocp::accelerator_management::instanceIdBitMask,
969*87a0745bSEd Tanous               instanceId & ocp::accelerator_management::instanceIdBitMask);
970*87a0745bSEd Tanous     EXPECT_NE(request.hdr.msgHdr.hdr.instance_id &
971*87a0745bSEd Tanous                   ocp::accelerator_management::requestBitMask,
972*87a0745bSEd Tanous               0);
973*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.msgHdr.hdr.ocp_accelerator_management_msg_type,
974*87a0745bSEd Tanous               static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL));
975*87a0745bSEd Tanous 
976*87a0745bSEd Tanous     // Verify request data
977*87a0745bSEd Tanous     EXPECT_EQ(
978*87a0745bSEd Tanous         request.hdr.command,
979*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::PlatformEnvironmentalCommands::GET_VOLTAGE));
980*87a0745bSEd Tanous     EXPECT_EQ(request.hdr.data_size, sizeof(sensorId));
981*87a0745bSEd Tanous     EXPECT_EQ(request.sensor_id, sensorId);
982*87a0745bSEd Tanous }
983*87a0745bSEd Tanous 
984*87a0745bSEd Tanous // Tests for GpuMctpVdm::decodeGetVoltageResponse function
TEST_F(GpuMctpVdmTests,DecodeGetVoltageResponseSuccess)985*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetVoltageResponseSuccess)
986*87a0745bSEd Tanous {
987*87a0745bSEd Tanous     // Create a mock successful response
988*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetVoltageResponse)> buf{};
989*87a0745bSEd Tanous 
990*87a0745bSEd Tanous     gpu::GetVoltageResponse response{};
991*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
992*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
993*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
994*87a0745bSEd Tanous     headerInfo.instance_id = 8;
995*87a0745bSEd Tanous     headerInfo.msg_type =
996*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
997*87a0745bSEd Tanous 
998*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
999*87a0745bSEd Tanous 
1000*87a0745bSEd Tanous     // Populate response data
1001*87a0745bSEd Tanous     response.hdr.command =
1002*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::PlatformEnvironmentalCommands::GET_VOLTAGE);
1003*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
1004*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
1005*87a0745bSEd Tanous     response.hdr.reserved = 0;
1006*87a0745bSEd Tanous     response.hdr.data_size = htole16(sizeof(uint32_t));
1007*87a0745bSEd Tanous 
1008*87a0745bSEd Tanous     // Set a voltage value of 12.5V (12.5 * 1000 = 12500 mV)
1009*87a0745bSEd Tanous     response.voltage = htole32(12500);
1010*87a0745bSEd Tanous 
1011*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
1012*87a0745bSEd Tanous 
1013*87a0745bSEd Tanous     // Test decoding
1014*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
1015*87a0745bSEd Tanous     uint16_t reasonCode{};
1016*87a0745bSEd Tanous     uint32_t voltage{};
1017*87a0745bSEd Tanous 
1018*87a0745bSEd Tanous     int result = gpu::decodeGetVoltageResponse(buf, cc, reasonCode, voltage);
1019*87a0745bSEd Tanous 
1020*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
1021*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::SUCCESS);
1022*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0);
1023*87a0745bSEd Tanous     EXPECT_EQ(voltage, 12500U);
1024*87a0745bSEd Tanous }
1025*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetVoltageResponseError)1026*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetVoltageResponseError)
1027*87a0745bSEd Tanous {
1028*87a0745bSEd Tanous     std::array<uint8_t,
1029*87a0745bSEd Tanous                sizeof(ocp::accelerator_management::CommonNonSuccessResponse)>
1030*87a0745bSEd Tanous         buf{};
1031*87a0745bSEd Tanous 
1032*87a0745bSEd Tanous     // Populate error response data
1033*87a0745bSEd Tanous     ocp::accelerator_management::CommonNonSuccessResponse errorResponse{};
1034*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
1035*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
1036*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
1037*87a0745bSEd Tanous     headerInfo.instance_id = 8;
1038*87a0745bSEd Tanous     headerInfo.msg_type =
1039*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
1040*87a0745bSEd Tanous 
1041*87a0745bSEd Tanous     gpu::packHeader(headerInfo, errorResponse.msgHdr.hdr);
1042*87a0745bSEd Tanous 
1043*87a0745bSEd Tanous     errorResponse.command =
1044*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::PlatformEnvironmentalCommands::GET_VOLTAGE);
1045*87a0745bSEd Tanous     errorResponse.completion_code = static_cast<uint8_t>(
1046*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
1047*87a0745bSEd Tanous     errorResponse.reason_code = htole16(0x1234);
1048*87a0745bSEd Tanous 
1049*87a0745bSEd Tanous     std::memcpy(buf.data(), &errorResponse, sizeof(errorResponse));
1050*87a0745bSEd Tanous 
1051*87a0745bSEd Tanous     // Test decoding
1052*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
1053*87a0745bSEd Tanous     uint16_t reasonCode{};
1054*87a0745bSEd Tanous     uint32_t voltage{};
1055*87a0745bSEd Tanous 
1056*87a0745bSEd Tanous     int result = gpu::decodeGetVoltageResponse(buf, cc, reasonCode, voltage);
1057*87a0745bSEd Tanous 
1058*87a0745bSEd Tanous     EXPECT_EQ(result, 0);
1059*87a0745bSEd Tanous     EXPECT_EQ(cc, ocp::accelerator_management::CompletionCode::ERR_NOT_READY);
1060*87a0745bSEd Tanous     EXPECT_EQ(reasonCode, 0x1234);
1061*87a0745bSEd Tanous }
1062*87a0745bSEd Tanous 
TEST_F(GpuMctpVdmTests,DecodeGetVoltageResponseInvalidSize)1063*87a0745bSEd Tanous TEST_F(GpuMctpVdmTests, DecodeGetVoltageResponseInvalidSize)
1064*87a0745bSEd Tanous {
1065*87a0745bSEd Tanous     // Create a mock response with invalid data_size
1066*87a0745bSEd Tanous     std::array<uint8_t, sizeof(gpu::GetVoltageResponse)> buf{};
1067*87a0745bSEd Tanous 
1068*87a0745bSEd Tanous     gpu::GetVoltageResponse response{};
1069*87a0745bSEd Tanous     ocp::accelerator_management::BindingPciVidInfo headerInfo{};
1070*87a0745bSEd Tanous     headerInfo.ocp_accelerator_management_msg_type = static_cast<uint8_t>(
1071*87a0745bSEd Tanous         ocp::accelerator_management::MessageType::RESPONSE);
1072*87a0745bSEd Tanous     headerInfo.instance_id = 8;
1073*87a0745bSEd Tanous     headerInfo.msg_type =
1074*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::MessageType::PLATFORM_ENVIRONMENTAL);
1075*87a0745bSEd Tanous 
1076*87a0745bSEd Tanous     gpu::packHeader(headerInfo, response.hdr.msgHdr.hdr);
1077*87a0745bSEd Tanous 
1078*87a0745bSEd Tanous     response.hdr.command =
1079*87a0745bSEd Tanous         static_cast<uint8_t>(gpu::PlatformEnvironmentalCommands::GET_VOLTAGE);
1080*87a0745bSEd Tanous     response.hdr.completion_code = static_cast<uint8_t>(
1081*87a0745bSEd Tanous         ocp::accelerator_management::CompletionCode::SUCCESS);
1082*87a0745bSEd Tanous     response.hdr.reserved = 0;
1083*87a0745bSEd Tanous     response.hdr.data_size = htole16(2); // Invalid - should be sizeof(uint32_t)
1084*87a0745bSEd Tanous     response.voltage = htole32(12500);
1085*87a0745bSEd Tanous 
1086*87a0745bSEd Tanous     std::memcpy(buf.data(), &response, sizeof(response));
1087*87a0745bSEd Tanous 
1088*87a0745bSEd Tanous     // Test decoding
1089*87a0745bSEd Tanous     ocp::accelerator_management::CompletionCode cc{};
1090*87a0745bSEd Tanous     uint16_t reasonCode{};
1091*87a0745bSEd Tanous     uint32_t voltage{};
1092*87a0745bSEd Tanous 
1093*87a0745bSEd Tanous     int result = gpu::decodeGetVoltageResponse(buf, cc, reasonCode, voltage);
1094*87a0745bSEd Tanous 
1095*87a0745bSEd Tanous     EXPECT_EQ(result, EINVAL); // Should indicate error for invalid data size
1096*87a0745bSEd Tanous }
1097*87a0745bSEd Tanous } // namespace gpu_mctp_tests
1098