1 // SPDX-License-Identifier: Apache-2.0 2 // SPDX-FileCopyrightText: Copyright OpenBMC Authors 3 #pragma once 4 #include <nlohmann/json.hpp> 5 6 namespace processor 7 { 8 // clang-format off 9 10 enum class ProcessorType{ 11 Invalid, 12 CPU, 13 GPU, 14 FPGA, 15 DSP, 16 Accelerator, 17 Core, 18 Thread, 19 Partition, 20 OEM, 21 }; 22 23 enum class ProcessorArchitecture{ 24 Invalid, 25 x86, 26 IA64, 27 ARM, 28 MIPS, 29 Power, 30 RISCV, 31 OEM, 32 }; 33 34 enum class InstructionSet{ 35 Invalid, 36 x86, 37 x8664, 38 IA64, 39 ARMA32, 40 ARMA64, 41 MIPS32, 42 MIPS64, 43 PowerISA, 44 RV32, 45 RV64, 46 OEM, 47 }; 48 49 enum class ProcessorMemoryType{ 50 Invalid, 51 Cache, 52 L1Cache, 53 L2Cache, 54 L3Cache, 55 L4Cache, 56 L5Cache, 57 L6Cache, 58 L7Cache, 59 HBM1, 60 HBM2, 61 HBM2E, 62 HBM3, 63 SGRAM, 64 GDDR, 65 GDDR2, 66 GDDR3, 67 GDDR4, 68 GDDR5, 69 GDDR5X, 70 GDDR6, 71 GDDR7, 72 DDR, 73 DDR2, 74 DDR3, 75 DDR4, 76 DDR5, 77 SDRAM, 78 SRAM, 79 Flash, 80 OEM, 81 }; 82 83 enum class FpgaType{ 84 Invalid, 85 Integrated, 86 Discrete, 87 }; 88 89 enum class SystemInterfaceType{ 90 Invalid, 91 QPI, 92 UPI, 93 PCIe, 94 Ethernet, 95 AMBA, 96 CCIX, 97 CXL, 98 OEM, 99 }; 100 101 enum class TurboState{ 102 Invalid, 103 Enabled, 104 Disabled, 105 }; 106 107 enum class BaseSpeedPriorityState{ 108 Invalid, 109 Enabled, 110 Disabled, 111 }; 112 113 enum class ThrottleCause{ 114 Invalid, 115 PowerLimit, 116 ThermalLimit, 117 ClockLimit, 118 ManagementDetectedFault, 119 Unknown, 120 OEM, 121 }; 122 123 NLOHMANN_JSON_SERIALIZE_ENUM(ProcessorType, { 124 {ProcessorType::Invalid, "Invalid"}, 125 {ProcessorType::CPU, "CPU"}, 126 {ProcessorType::GPU, "GPU"}, 127 {ProcessorType::FPGA, "FPGA"}, 128 {ProcessorType::DSP, "DSP"}, 129 {ProcessorType::Accelerator, "Accelerator"}, 130 {ProcessorType::Core, "Core"}, 131 {ProcessorType::Thread, "Thread"}, 132 {ProcessorType::Partition, "Partition"}, 133 {ProcessorType::OEM, "OEM"}, 134 }); 135 136 NLOHMANN_JSON_SERIALIZE_ENUM(ProcessorArchitecture, { 137 {ProcessorArchitecture::Invalid, "Invalid"}, 138 {ProcessorArchitecture::x86, "x86"}, 139 {ProcessorArchitecture::IA64, "IA-64"}, 140 {ProcessorArchitecture::ARM, "ARM"}, 141 {ProcessorArchitecture::MIPS, "MIPS"}, 142 {ProcessorArchitecture::Power, "Power"}, 143 {ProcessorArchitecture::RISCV, "RISC-V"}, 144 {ProcessorArchitecture::OEM, "OEM"}, 145 }); 146 147 NLOHMANN_JSON_SERIALIZE_ENUM(InstructionSet, { 148 {InstructionSet::Invalid, "Invalid"}, 149 {InstructionSet::x86, "x86"}, 150 {InstructionSet::x8664, "x86-64"}, 151 {InstructionSet::IA64, "IA-64"}, 152 {InstructionSet::ARMA32, "ARM-A32"}, 153 {InstructionSet::ARMA64, "ARM-A64"}, 154 {InstructionSet::MIPS32, "MIPS32"}, 155 {InstructionSet::MIPS64, "MIPS64"}, 156 {InstructionSet::PowerISA, "PowerISA"}, 157 {InstructionSet::RV32, "RV32"}, 158 {InstructionSet::RV64, "RV64"}, 159 {InstructionSet::OEM, "OEM"}, 160 }); 161 162 NLOHMANN_JSON_SERIALIZE_ENUM(ProcessorMemoryType, { 163 {ProcessorMemoryType::Invalid, "Invalid"}, 164 {ProcessorMemoryType::Cache, "Cache"}, 165 {ProcessorMemoryType::L1Cache, "L1Cache"}, 166 {ProcessorMemoryType::L2Cache, "L2Cache"}, 167 {ProcessorMemoryType::L3Cache, "L3Cache"}, 168 {ProcessorMemoryType::L4Cache, "L4Cache"}, 169 {ProcessorMemoryType::L5Cache, "L5Cache"}, 170 {ProcessorMemoryType::L6Cache, "L6Cache"}, 171 {ProcessorMemoryType::L7Cache, "L7Cache"}, 172 {ProcessorMemoryType::HBM1, "HBM1"}, 173 {ProcessorMemoryType::HBM2, "HBM2"}, 174 {ProcessorMemoryType::HBM2E, "HBM2E"}, 175 {ProcessorMemoryType::HBM3, "HBM3"}, 176 {ProcessorMemoryType::SGRAM, "SGRAM"}, 177 {ProcessorMemoryType::GDDR, "GDDR"}, 178 {ProcessorMemoryType::GDDR2, "GDDR2"}, 179 {ProcessorMemoryType::GDDR3, "GDDR3"}, 180 {ProcessorMemoryType::GDDR4, "GDDR4"}, 181 {ProcessorMemoryType::GDDR5, "GDDR5"}, 182 {ProcessorMemoryType::GDDR5X, "GDDR5X"}, 183 {ProcessorMemoryType::GDDR6, "GDDR6"}, 184 {ProcessorMemoryType::GDDR7, "GDDR7"}, 185 {ProcessorMemoryType::DDR, "DDR"}, 186 {ProcessorMemoryType::DDR2, "DDR2"}, 187 {ProcessorMemoryType::DDR3, "DDR3"}, 188 {ProcessorMemoryType::DDR4, "DDR4"}, 189 {ProcessorMemoryType::DDR5, "DDR5"}, 190 {ProcessorMemoryType::SDRAM, "SDRAM"}, 191 {ProcessorMemoryType::SRAM, "SRAM"}, 192 {ProcessorMemoryType::Flash, "Flash"}, 193 {ProcessorMemoryType::OEM, "OEM"}, 194 }); 195 196 NLOHMANN_JSON_SERIALIZE_ENUM(FpgaType, { 197 {FpgaType::Invalid, "Invalid"}, 198 {FpgaType::Integrated, "Integrated"}, 199 {FpgaType::Discrete, "Discrete"}, 200 }); 201 202 NLOHMANN_JSON_SERIALIZE_ENUM(SystemInterfaceType, { 203 {SystemInterfaceType::Invalid, "Invalid"}, 204 {SystemInterfaceType::QPI, "QPI"}, 205 {SystemInterfaceType::UPI, "UPI"}, 206 {SystemInterfaceType::PCIe, "PCIe"}, 207 {SystemInterfaceType::Ethernet, "Ethernet"}, 208 {SystemInterfaceType::AMBA, "AMBA"}, 209 {SystemInterfaceType::CCIX, "CCIX"}, 210 {SystemInterfaceType::CXL, "CXL"}, 211 {SystemInterfaceType::OEM, "OEM"}, 212 }); 213 214 NLOHMANN_JSON_SERIALIZE_ENUM(TurboState, { 215 {TurboState::Invalid, "Invalid"}, 216 {TurboState::Enabled, "Enabled"}, 217 {TurboState::Disabled, "Disabled"}, 218 }); 219 220 NLOHMANN_JSON_SERIALIZE_ENUM(BaseSpeedPriorityState, { 221 {BaseSpeedPriorityState::Invalid, "Invalid"}, 222 {BaseSpeedPriorityState::Enabled, "Enabled"}, 223 {BaseSpeedPriorityState::Disabled, "Disabled"}, 224 }); 225 226 NLOHMANN_JSON_SERIALIZE_ENUM(ThrottleCause, { 227 {ThrottleCause::Invalid, "Invalid"}, 228 {ThrottleCause::PowerLimit, "PowerLimit"}, 229 {ThrottleCause::ThermalLimit, "ThermalLimit"}, 230 {ThrottleCause::ClockLimit, "ClockLimit"}, 231 {ThrottleCause::ManagementDetectedFault, "ManagementDetectedFault"}, 232 {ThrottleCause::Unknown, "Unknown"}, 233 {ThrottleCause::OEM, "OEM"}, 234 }); 235 236 } 237 // clang-format on 238