1*0ec8b83dSEd Tanous #pragma once 2*0ec8b83dSEd Tanous #include <nlohmann/json.hpp> 3*0ec8b83dSEd Tanous 4*0ec8b83dSEd Tanous namespace processor 5*0ec8b83dSEd Tanous { 6*0ec8b83dSEd Tanous // clang-format off 7*0ec8b83dSEd Tanous 8*0ec8b83dSEd Tanous enum class ProcessorType{ 9*0ec8b83dSEd Tanous Invalid, 10*0ec8b83dSEd Tanous CPU, 11*0ec8b83dSEd Tanous GPU, 12*0ec8b83dSEd Tanous FPGA, 13*0ec8b83dSEd Tanous DSP, 14*0ec8b83dSEd Tanous Accelerator, 15*0ec8b83dSEd Tanous Core, 16*0ec8b83dSEd Tanous Thread, 17*0ec8b83dSEd Tanous OEM, 18*0ec8b83dSEd Tanous }; 19*0ec8b83dSEd Tanous 20*0ec8b83dSEd Tanous enum class ProcessorMemoryType{ 21*0ec8b83dSEd Tanous Invalid, 22*0ec8b83dSEd Tanous L1Cache, 23*0ec8b83dSEd Tanous L2Cache, 24*0ec8b83dSEd Tanous L3Cache, 25*0ec8b83dSEd Tanous L4Cache, 26*0ec8b83dSEd Tanous L5Cache, 27*0ec8b83dSEd Tanous L6Cache, 28*0ec8b83dSEd Tanous L7Cache, 29*0ec8b83dSEd Tanous HBM1, 30*0ec8b83dSEd Tanous HBM2, 31*0ec8b83dSEd Tanous HBM3, 32*0ec8b83dSEd Tanous SGRAM, 33*0ec8b83dSEd Tanous GDDR, 34*0ec8b83dSEd Tanous GDDR2, 35*0ec8b83dSEd Tanous GDDR3, 36*0ec8b83dSEd Tanous GDDR4, 37*0ec8b83dSEd Tanous GDDR5, 38*0ec8b83dSEd Tanous GDDR5X, 39*0ec8b83dSEd Tanous GDDR6, 40*0ec8b83dSEd Tanous DDR, 41*0ec8b83dSEd Tanous DDR2, 42*0ec8b83dSEd Tanous DDR3, 43*0ec8b83dSEd Tanous DDR4, 44*0ec8b83dSEd Tanous DDR5, 45*0ec8b83dSEd Tanous SDRAM, 46*0ec8b83dSEd Tanous SRAM, 47*0ec8b83dSEd Tanous Flash, 48*0ec8b83dSEd Tanous OEM, 49*0ec8b83dSEd Tanous }; 50*0ec8b83dSEd Tanous 51*0ec8b83dSEd Tanous enum class FpgaType{ 52*0ec8b83dSEd Tanous Invalid, 53*0ec8b83dSEd Tanous Integrated, 54*0ec8b83dSEd Tanous Discrete, 55*0ec8b83dSEd Tanous }; 56*0ec8b83dSEd Tanous 57*0ec8b83dSEd Tanous enum class SystemInterfaceType{ 58*0ec8b83dSEd Tanous Invalid, 59*0ec8b83dSEd Tanous QPI, 60*0ec8b83dSEd Tanous UPI, 61*0ec8b83dSEd Tanous PCIe, 62*0ec8b83dSEd Tanous Ethernet, 63*0ec8b83dSEd Tanous AMBA, 64*0ec8b83dSEd Tanous CCIX, 65*0ec8b83dSEd Tanous CXL, 66*0ec8b83dSEd Tanous OEM, 67*0ec8b83dSEd Tanous }; 68*0ec8b83dSEd Tanous 69*0ec8b83dSEd Tanous enum class TurboState{ 70*0ec8b83dSEd Tanous Invalid, 71*0ec8b83dSEd Tanous Enabled, 72*0ec8b83dSEd Tanous Disabled, 73*0ec8b83dSEd Tanous }; 74*0ec8b83dSEd Tanous 75*0ec8b83dSEd Tanous enum class BaseSpeedPriorityState{ 76*0ec8b83dSEd Tanous Invalid, 77*0ec8b83dSEd Tanous Enabled, 78*0ec8b83dSEd Tanous Disabled, 79*0ec8b83dSEd Tanous }; 80*0ec8b83dSEd Tanous 81*0ec8b83dSEd Tanous enum class ThrottleCause{ 82*0ec8b83dSEd Tanous Invalid, 83*0ec8b83dSEd Tanous PowerLimit, 84*0ec8b83dSEd Tanous ThermalLimit, 85*0ec8b83dSEd Tanous ClockLimit, 86*0ec8b83dSEd Tanous Unknown, 87*0ec8b83dSEd Tanous OEM, 88*0ec8b83dSEd Tanous }; 89*0ec8b83dSEd Tanous 90*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(ProcessorType, { 91*0ec8b83dSEd Tanous {ProcessorType::Invalid, "Invalid"}, 92*0ec8b83dSEd Tanous {ProcessorType::CPU, "CPU"}, 93*0ec8b83dSEd Tanous {ProcessorType::GPU, "GPU"}, 94*0ec8b83dSEd Tanous {ProcessorType::FPGA, "FPGA"}, 95*0ec8b83dSEd Tanous {ProcessorType::DSP, "DSP"}, 96*0ec8b83dSEd Tanous {ProcessorType::Accelerator, "Accelerator"}, 97*0ec8b83dSEd Tanous {ProcessorType::Core, "Core"}, 98*0ec8b83dSEd Tanous {ProcessorType::Thread, "Thread"}, 99*0ec8b83dSEd Tanous {ProcessorType::OEM, "OEM"}, 100*0ec8b83dSEd Tanous }); 101*0ec8b83dSEd Tanous 102*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(ProcessorMemoryType, { 103*0ec8b83dSEd Tanous {ProcessorMemoryType::Invalid, "Invalid"}, 104*0ec8b83dSEd Tanous {ProcessorMemoryType::L1Cache, "L1Cache"}, 105*0ec8b83dSEd Tanous {ProcessorMemoryType::L2Cache, "L2Cache"}, 106*0ec8b83dSEd Tanous {ProcessorMemoryType::L3Cache, "L3Cache"}, 107*0ec8b83dSEd Tanous {ProcessorMemoryType::L4Cache, "L4Cache"}, 108*0ec8b83dSEd Tanous {ProcessorMemoryType::L5Cache, "L5Cache"}, 109*0ec8b83dSEd Tanous {ProcessorMemoryType::L6Cache, "L6Cache"}, 110*0ec8b83dSEd Tanous {ProcessorMemoryType::L7Cache, "L7Cache"}, 111*0ec8b83dSEd Tanous {ProcessorMemoryType::HBM1, "HBM1"}, 112*0ec8b83dSEd Tanous {ProcessorMemoryType::HBM2, "HBM2"}, 113*0ec8b83dSEd Tanous {ProcessorMemoryType::HBM3, "HBM3"}, 114*0ec8b83dSEd Tanous {ProcessorMemoryType::SGRAM, "SGRAM"}, 115*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR, "GDDR"}, 116*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR2, "GDDR2"}, 117*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR3, "GDDR3"}, 118*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR4, "GDDR4"}, 119*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR5, "GDDR5"}, 120*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR5X, "GDDR5X"}, 121*0ec8b83dSEd Tanous {ProcessorMemoryType::GDDR6, "GDDR6"}, 122*0ec8b83dSEd Tanous {ProcessorMemoryType::DDR, "DDR"}, 123*0ec8b83dSEd Tanous {ProcessorMemoryType::DDR2, "DDR2"}, 124*0ec8b83dSEd Tanous {ProcessorMemoryType::DDR3, "DDR3"}, 125*0ec8b83dSEd Tanous {ProcessorMemoryType::DDR4, "DDR4"}, 126*0ec8b83dSEd Tanous {ProcessorMemoryType::DDR5, "DDR5"}, 127*0ec8b83dSEd Tanous {ProcessorMemoryType::SDRAM, "SDRAM"}, 128*0ec8b83dSEd Tanous {ProcessorMemoryType::SRAM, "SRAM"}, 129*0ec8b83dSEd Tanous {ProcessorMemoryType::Flash, "Flash"}, 130*0ec8b83dSEd Tanous {ProcessorMemoryType::OEM, "OEM"}, 131*0ec8b83dSEd Tanous }); 132*0ec8b83dSEd Tanous 133*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(FpgaType, { 134*0ec8b83dSEd Tanous {FpgaType::Invalid, "Invalid"}, 135*0ec8b83dSEd Tanous {FpgaType::Integrated, "Integrated"}, 136*0ec8b83dSEd Tanous {FpgaType::Discrete, "Discrete"}, 137*0ec8b83dSEd Tanous }); 138*0ec8b83dSEd Tanous 139*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(SystemInterfaceType, { 140*0ec8b83dSEd Tanous {SystemInterfaceType::Invalid, "Invalid"}, 141*0ec8b83dSEd Tanous {SystemInterfaceType::QPI, "QPI"}, 142*0ec8b83dSEd Tanous {SystemInterfaceType::UPI, "UPI"}, 143*0ec8b83dSEd Tanous {SystemInterfaceType::PCIe, "PCIe"}, 144*0ec8b83dSEd Tanous {SystemInterfaceType::Ethernet, "Ethernet"}, 145*0ec8b83dSEd Tanous {SystemInterfaceType::AMBA, "AMBA"}, 146*0ec8b83dSEd Tanous {SystemInterfaceType::CCIX, "CCIX"}, 147*0ec8b83dSEd Tanous {SystemInterfaceType::CXL, "CXL"}, 148*0ec8b83dSEd Tanous {SystemInterfaceType::OEM, "OEM"}, 149*0ec8b83dSEd Tanous }); 150*0ec8b83dSEd Tanous 151*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(TurboState, { 152*0ec8b83dSEd Tanous {TurboState::Invalid, "Invalid"}, 153*0ec8b83dSEd Tanous {TurboState::Enabled, "Enabled"}, 154*0ec8b83dSEd Tanous {TurboState::Disabled, "Disabled"}, 155*0ec8b83dSEd Tanous }); 156*0ec8b83dSEd Tanous 157*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(BaseSpeedPriorityState, { 158*0ec8b83dSEd Tanous {BaseSpeedPriorityState::Invalid, "Invalid"}, 159*0ec8b83dSEd Tanous {BaseSpeedPriorityState::Enabled, "Enabled"}, 160*0ec8b83dSEd Tanous {BaseSpeedPriorityState::Disabled, "Disabled"}, 161*0ec8b83dSEd Tanous }); 162*0ec8b83dSEd Tanous 163*0ec8b83dSEd Tanous NLOHMANN_JSON_SERIALIZE_ENUM(ThrottleCause, { 164*0ec8b83dSEd Tanous {ThrottleCause::Invalid, "Invalid"}, 165*0ec8b83dSEd Tanous {ThrottleCause::PowerLimit, "PowerLimit"}, 166*0ec8b83dSEd Tanous {ThrottleCause::ThermalLimit, "ThermalLimit"}, 167*0ec8b83dSEd Tanous {ThrottleCause::ClockLimit, "ClockLimit"}, 168*0ec8b83dSEd Tanous {ThrottleCause::Unknown, "Unknown"}, 169*0ec8b83dSEd Tanous {ThrottleCause::OEM, "OEM"}, 170*0ec8b83dSEd Tanous }); 171*0ec8b83dSEd Tanous 172*0ec8b83dSEd Tanous } 173*0ec8b83dSEd Tanous // clang-format on 174