1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 27816f2cfSHeiko Schocher /* 37816f2cfSHeiko Schocher * (C) Copyright 2011 47816f2cfSHeiko Schocher * Heiko Schocher, DENX Software Engineering, hs@denx.de. 57816f2cfSHeiko Schocher * 67816f2cfSHeiko Schocher * Vased on: 77816f2cfSHeiko Schocher * (C) Copyright 2009 87816f2cfSHeiko Schocher * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 97816f2cfSHeiko Schocher */ 107816f2cfSHeiko Schocher 117816f2cfSHeiko Schocher #ifndef _UBLIMAGE_H_ 127816f2cfSHeiko Schocher #define _UBLIMAGE_H_ 137816f2cfSHeiko Schocher 147816f2cfSHeiko Schocher enum ublimage_cmd { 157816f2cfSHeiko Schocher CMD_INVALID, 167816f2cfSHeiko Schocher CMD_BOOT_MODE, 177816f2cfSHeiko Schocher CMD_ENTRY, 187816f2cfSHeiko Schocher CMD_PAGE, 197816f2cfSHeiko Schocher CMD_ST_BLOCK, 207816f2cfSHeiko Schocher CMD_ST_PAGE, 217816f2cfSHeiko Schocher CMD_LD_ADDR 227816f2cfSHeiko Schocher }; 237816f2cfSHeiko Schocher 247816f2cfSHeiko Schocher enum ublimage_fld_types { 257816f2cfSHeiko Schocher CFG_INVALID = -1, 267816f2cfSHeiko Schocher CFG_COMMAND, 277816f2cfSHeiko Schocher CFG_REG_VALUE 287816f2cfSHeiko Schocher }; 297816f2cfSHeiko Schocher 307816f2cfSHeiko Schocher /* 317816f2cfSHeiko Schocher * from sprufg5a.pdf Table 110 327816f2cfSHeiko Schocher * Used by RBL when doing NAND boot 337816f2cfSHeiko Schocher */ 347816f2cfSHeiko Schocher #define UBL_MAGIC_BASE (0xA1ACED00) 357816f2cfSHeiko Schocher /* Safe boot mode */ 367816f2cfSHeiko Schocher #define UBL_MAGIC_SAFE (0x00) 377816f2cfSHeiko Schocher /* DMA boot mode */ 387816f2cfSHeiko Schocher #define UBL_MAGIC_DMA (0x11) 397816f2cfSHeiko Schocher /* I Cache boot mode */ 407816f2cfSHeiko Schocher #define UBL_MAGIC_IC (0x22) 417816f2cfSHeiko Schocher /* Fast EMIF boot mode */ 427816f2cfSHeiko Schocher #define UBL_MAGIC_FAST (0x33) 437816f2cfSHeiko Schocher /* DMA + ICache boot mode */ 447816f2cfSHeiko Schocher #define UBL_MAGIC_DMA_IC (0x44) 457816f2cfSHeiko Schocher /* DMA + ICache + Fast EMIF boot mode */ 467816f2cfSHeiko Schocher #define UBL_MAGIC_DMA_IC_FAST (0x55) 477816f2cfSHeiko Schocher 487816f2cfSHeiko Schocher /* Define max UBL image size */ 497816f2cfSHeiko Schocher #define UBL_IMAGE_SIZE (0x00003800u) 507816f2cfSHeiko Schocher 519f876580SLoïc Minier /* one NAND block */ 524dd83490SHeiko Schocher #define UBL_BLOCK_SIZE 2048 539f876580SLoïc Minier 547816f2cfSHeiko Schocher /* from sprufg5a.pdf Table 109 */ 557816f2cfSHeiko Schocher struct ubl_header { 567816f2cfSHeiko Schocher uint32_t magic; /* Magic Number, see UBL_* defines */ 577816f2cfSHeiko Schocher uint32_t entry; /* entry point address for bootloader */ 587816f2cfSHeiko Schocher uint32_t pages; /* number of pages (size of bootloader) */ 597816f2cfSHeiko Schocher uint32_t block; /* 607816f2cfSHeiko Schocher * blocknumber where user bootloader is 617816f2cfSHeiko Schocher * present 627816f2cfSHeiko Schocher */ 637816f2cfSHeiko Schocher uint32_t page; /* 647816f2cfSHeiko Schocher * page number where user bootloader is 657816f2cfSHeiko Schocher * present. 667816f2cfSHeiko Schocher */ 677816f2cfSHeiko Schocher uint32_t pll_m; /* 687816f2cfSHeiko Schocher * PLL setting -Multiplier (only valid if 697816f2cfSHeiko Schocher * Magic Number indicates PLL enable). 707816f2cfSHeiko Schocher */ 717816f2cfSHeiko Schocher uint32_t pll_n; /* 727816f2cfSHeiko Schocher * PLL setting -Divider (only valid if 737816f2cfSHeiko Schocher * Magic Number indicates PLL enable). 747816f2cfSHeiko Schocher */ 757816f2cfSHeiko Schocher uint32_t emif; /* 767816f2cfSHeiko Schocher * fast EMIF setting (only valid if 777816f2cfSHeiko Schocher * Magic Number indicates fast EMIF boot). 787816f2cfSHeiko Schocher */ 797816f2cfSHeiko Schocher /* to fit in one nand block */ 809f876580SLoïc Minier unsigned char res[UBL_BLOCK_SIZE - 8 * 4]; 817816f2cfSHeiko Schocher }; 827816f2cfSHeiko Schocher 837816f2cfSHeiko Schocher #endif /* _UBLIMAGE_H_ */ 84