1324f6cfdSwdenk /* 2324f6cfdSwdenk * (C) Copyright 2002 3324f6cfdSwdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4324f6cfdSwdenk * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6228f29acSwdenk * 7228f29acSwdenk * Be sure to mark tests to be run before relocation as such with the 86d0f6bcfSJean-Christophe PLAGNIOL-VILLARD * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the 9228f29acSwdenk * logbuffer support is enabled. 10324f6cfdSwdenk */ 11324f6cfdSwdenk 12324f6cfdSwdenk #include <common.h> 13324f6cfdSwdenk 14324f6cfdSwdenk #include <post.h> 15324f6cfdSwdenk 166e8ec682SYuri Tikhonov extern int ocm_post_test (int flags); 17324f6cfdSwdenk extern int cache_post_test (int flags); 18324f6cfdSwdenk extern int watchdog_post_test (int flags); 19324f6cfdSwdenk extern int i2c_post_test (int flags); 20324f6cfdSwdenk extern int rtc_post_test (int flags); 21324f6cfdSwdenk extern int memory_post_test (int flags); 22324f6cfdSwdenk extern int cpu_post_test (int flags); 23a11e0696SIgor Lisitsin extern int fpu_post_test (int flags); 24324f6cfdSwdenk extern int uart_post_test (int flags); 25324f6cfdSwdenk extern int ether_post_test (int flags); 26324f6cfdSwdenk extern int spi_post_test (int flags); 27324f6cfdSwdenk extern int usb_post_test (int flags); 28324f6cfdSwdenk extern int spr_post_test (int flags); 294532cb69Swdenk extern int sysmon_post_test (int flags); 305a8c51cdSwdenk extern int dsp_post_test (int flags); 3179fa88f3Swdenk extern int codec_post_test (int flags); 32531e3e8bSPavel Kolesnikov extern int ecc_post_test (int flags); 33f6f7395eSMike Frysinger extern int flash_post_test(int flags); 344532cb69Swdenk 3565b20dceSYuri Tikhonov extern int dspic_init_post_test (int flags); 3665b20dceSYuri Tikhonov extern int dspic_post_test (int flags); 3765b20dceSYuri Tikhonov extern int gdc_post_test (int flags); 3865b20dceSYuri Tikhonov extern int fpga_post_test (int flags); 3965b20dceSYuri Tikhonov extern int lwmon5_watchdog_post_test(int flags); 4065b20dceSYuri Tikhonov extern int sysmon1_post_test(int flags); 4129fd7cebSAnatolij Gustschin extern int coprocessor_post_test(int flags); 422151374fSMike Frysinger extern int led_post_test(int flags); 432151374fSMike Frysinger extern int button_post_test(int flags); 448d3fcb5eSValentin Longchamp extern int memory_regions_post_test(int flags); 4565b20dceSYuri Tikhonov 464532cb69Swdenk extern int sysmon_init_f (void); 474532cb69Swdenk 484532cb69Swdenk extern void sysmon_reloc (void); 494532cb69Swdenk 50324f6cfdSwdenk 51324f6cfdSwdenk struct post_test post_list[] = 52324f6cfdSwdenk { 536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_OCM 546e8ec682SYuri Tikhonov { 556e8ec682SYuri Tikhonov "OCM test", 566e8ec682SYuri Tikhonov "ocm", 576e8ec682SYuri Tikhonov "This test checks on chip memory (OCM).", 587845d490SYuri Tikhonov POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, 596e8ec682SYuri Tikhonov &ocm_post_test, 606e8ec682SYuri Tikhonov NULL, 616e8ec682SYuri Tikhonov NULL, 626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_OCM 636e8ec682SYuri Tikhonov }, 646e8ec682SYuri Tikhonov #endif 656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_CACHE 66324f6cfdSwdenk { 67324f6cfdSwdenk "Cache test", 68324f6cfdSwdenk "cache", 69324f6cfdSwdenk "This test verifies the CPU cache operation.", 70324f6cfdSwdenk POST_RAM | POST_ALWAYS, 71228f29acSwdenk &cache_post_test, 724532cb69Swdenk NULL, 734532cb69Swdenk NULL, 746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_CACHE 75324f6cfdSwdenk }, 76324f6cfdSwdenk #endif 776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG 7865b20dceSYuri Tikhonov #if defined(CONFIG_POST_WATCHDOG) 7965b20dceSYuri Tikhonov CONFIG_POST_WATCHDOG, 8065b20dceSYuri Tikhonov #else 81324f6cfdSwdenk { 82324f6cfdSwdenk "Watchdog timer test", 83324f6cfdSwdenk "watchdog", 84324f6cfdSwdenk "This test checks the watchdog timer.", 858564acf9Swdenk POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, 86228f29acSwdenk &watchdog_post_test, 874532cb69Swdenk NULL, 884532cb69Swdenk NULL, 896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_WATCHDOG 90324f6cfdSwdenk }, 91324f6cfdSwdenk #endif 9265b20dceSYuri Tikhonov #endif 936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_I2C 94324f6cfdSwdenk { 95324f6cfdSwdenk "I2C test", 96324f6cfdSwdenk "i2c", 97324f6cfdSwdenk "This test verifies the I2C operation.", 98324f6cfdSwdenk POST_RAM | POST_ALWAYS, 99228f29acSwdenk &i2c_post_test, 1004532cb69Swdenk NULL, 1014532cb69Swdenk NULL, 1026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_I2C 103324f6cfdSwdenk }, 104324f6cfdSwdenk #endif 1056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_RTC 106324f6cfdSwdenk { 107324f6cfdSwdenk "RTC test", 108324f6cfdSwdenk "rtc", 109324f6cfdSwdenk "This test verifies the RTC operation.", 1108564acf9Swdenk POST_RAM | POST_SLOWTEST | POST_MANUAL, 111228f29acSwdenk &rtc_post_test, 1124532cb69Swdenk NULL, 1134532cb69Swdenk NULL, 1146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_RTC 115324f6cfdSwdenk }, 116324f6cfdSwdenk #endif 1176d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_MEMORY 118324f6cfdSwdenk { 119324f6cfdSwdenk "Memory test", 120324f6cfdSwdenk "memory", 121324f6cfdSwdenk "This test checks RAM.", 1228564acf9Swdenk POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, 123228f29acSwdenk &memory_post_test, 1244532cb69Swdenk NULL, 1254532cb69Swdenk NULL, 1266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_MEMORY 127324f6cfdSwdenk }, 128324f6cfdSwdenk #endif 1296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_CPU 130324f6cfdSwdenk { 131324f6cfdSwdenk "CPU test", 132324f6cfdSwdenk "cpu", 133324f6cfdSwdenk "This test verifies the arithmetic logic unit of" 134324f6cfdSwdenk " CPU.", 135324f6cfdSwdenk POST_RAM | POST_ALWAYS, 136228f29acSwdenk &cpu_post_test, 1374532cb69Swdenk NULL, 1384532cb69Swdenk NULL, 1396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_CPU 140324f6cfdSwdenk }, 141324f6cfdSwdenk #endif 1426d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_FPU 143a11e0696SIgor Lisitsin { 144a11e0696SIgor Lisitsin "FPU test", 145a11e0696SIgor Lisitsin "fpu", 146a11e0696SIgor Lisitsin "This test verifies the arithmetic logic unit of" 147a11e0696SIgor Lisitsin " FPU.", 148a11e0696SIgor Lisitsin POST_RAM | POST_ALWAYS, 149a11e0696SIgor Lisitsin &fpu_post_test, 150a11e0696SIgor Lisitsin NULL, 151a11e0696SIgor Lisitsin NULL, 1526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_FPU 153a11e0696SIgor Lisitsin }, 154a11e0696SIgor Lisitsin #endif 1556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_UART 156834a45d7SStefan Roese #if defined(CONFIG_POST_UART) 157834a45d7SStefan Roese CONFIG_POST_UART, 158834a45d7SStefan Roese #else 159324f6cfdSwdenk { 160324f6cfdSwdenk "UART test", 161324f6cfdSwdenk "uart", 162324f6cfdSwdenk "This test verifies the UART operation.", 1638564acf9Swdenk POST_RAM | POST_SLOWTEST | POST_MANUAL, 164228f29acSwdenk &uart_post_test, 1654532cb69Swdenk NULL, 1664532cb69Swdenk NULL, 1676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_UART 168324f6cfdSwdenk }, 169834a45d7SStefan Roese #endif /* CONFIG_POST_UART */ 170324f6cfdSwdenk #endif 1716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_ETHER 172324f6cfdSwdenk { 173324f6cfdSwdenk "ETHERNET test", 174324f6cfdSwdenk "ethernet", 175324f6cfdSwdenk "This test verifies the ETHERNET operation.", 176*5735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 177228f29acSwdenk ðer_post_test, 1784532cb69Swdenk NULL, 1794532cb69Swdenk NULL, 1806d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_ETHER 181324f6cfdSwdenk }, 182324f6cfdSwdenk #endif 1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_SPI 184324f6cfdSwdenk { 185324f6cfdSwdenk "SPI test", 186324f6cfdSwdenk "spi", 187324f6cfdSwdenk "This test verifies the SPI operation.", 188*5735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 189228f29acSwdenk &spi_post_test, 1904532cb69Swdenk NULL, 1914532cb69Swdenk NULL, 1926d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_SPI 193324f6cfdSwdenk }, 194324f6cfdSwdenk #endif 1956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_USB 196324f6cfdSwdenk { 197324f6cfdSwdenk "USB test", 198324f6cfdSwdenk "usb", 199324f6cfdSwdenk "This test verifies the USB operation.", 200*5735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 201228f29acSwdenk &usb_post_test, 2024532cb69Swdenk NULL, 2034532cb69Swdenk NULL, 2046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_USB 205324f6cfdSwdenk }, 206324f6cfdSwdenk #endif 2076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_SPR 208324f6cfdSwdenk { 209324f6cfdSwdenk "SPR test", 210324f6cfdSwdenk "spr", 211324f6cfdSwdenk "This test checks SPR contents.", 212b2e2142cSStefan Roese POST_RAM | POST_ALWAYS, 213228f29acSwdenk &spr_post_test, 2144532cb69Swdenk NULL, 2154532cb69Swdenk NULL, 2166d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_SPR 217324f6cfdSwdenk }, 218324f6cfdSwdenk #endif 2196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_SYSMON 2204532cb69Swdenk { 2214532cb69Swdenk "SYSMON test", 2224532cb69Swdenk "sysmon", 2234532cb69Swdenk "This test monitors system hardware.", 2244532cb69Swdenk POST_RAM | POST_ALWAYS, 2254532cb69Swdenk &sysmon_post_test, 2264532cb69Swdenk &sysmon_init_f, 2274532cb69Swdenk &sysmon_reloc, 2286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_SYSMON 2294532cb69Swdenk }, 2304532cb69Swdenk #endif 2316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_DSP 2325a8c51cdSwdenk { 2335a8c51cdSwdenk "DSP test", 2345a8c51cdSwdenk "dsp", 2355a8c51cdSwdenk "This test checks any connected DSP(s).", 236*5735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 2375a8c51cdSwdenk &dsp_post_test, 2385a8c51cdSwdenk NULL, 2395a8c51cdSwdenk NULL, 2406d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_DSP 2415a8c51cdSwdenk }, 2425a8c51cdSwdenk #endif 2436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_CODEC 24479fa88f3Swdenk { 24579fa88f3Swdenk "CODEC test", 24679fa88f3Swdenk "codec", 24779fa88f3Swdenk "This test checks any connected codec(s).", 24879fa88f3Swdenk POST_RAM | POST_MANUAL, 24979fa88f3Swdenk &codec_post_test, 25079fa88f3Swdenk NULL, 25179fa88f3Swdenk NULL, 2526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_CODEC 25379fa88f3Swdenk }, 25479fa88f3Swdenk #endif 2556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_ECC 256531e3e8bSPavel Kolesnikov { 257531e3e8bSPavel Kolesnikov "ECC test", 258531e3e8bSPavel Kolesnikov "ecc", 2598dafa874SLarry Johnson "This test checks the ECC facility of memory.", 2608dafa874SLarry Johnson POST_ROM | POST_ALWAYS | POST_PREREL, 261531e3e8bSPavel Kolesnikov &ecc_post_test, 262531e3e8bSPavel Kolesnikov NULL, 263531e3e8bSPavel Kolesnikov NULL, 2646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_ECC 265531e3e8bSPavel Kolesnikov }, 266531e3e8bSPavel Kolesnikov #endif 2676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC1 26865b20dceSYuri Tikhonov CONFIG_POST_BSPEC1, 26965b20dceSYuri Tikhonov #endif 2706d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC2 27165b20dceSYuri Tikhonov CONFIG_POST_BSPEC2, 27265b20dceSYuri Tikhonov #endif 2736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC3 27465b20dceSYuri Tikhonov CONFIG_POST_BSPEC3, 27565b20dceSYuri Tikhonov #endif 2766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC4 27765b20dceSYuri Tikhonov CONFIG_POST_BSPEC4, 27865b20dceSYuri Tikhonov #endif 2796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 28065b20dceSYuri Tikhonov CONFIG_POST_BSPEC5, 28165b20dceSYuri Tikhonov #endif 28229fd7cebSAnatolij Gustschin #if CONFIG_POST & CONFIG_SYS_POST_COPROC 28329fd7cebSAnatolij Gustschin { 28429fd7cebSAnatolij Gustschin "Coprocessors communication test", 28529fd7cebSAnatolij Gustschin "coproc_com", 28629fd7cebSAnatolij Gustschin "This test checks communication with coprocessors.", 28729fd7cebSAnatolij Gustschin POST_RAM | POST_ALWAYS | POST_CRITICAL, 28829fd7cebSAnatolij Gustschin &coprocessor_post_test, 28929fd7cebSAnatolij Gustschin NULL, 29029fd7cebSAnatolij Gustschin NULL, 29129fd7cebSAnatolij Gustschin CONFIG_SYS_POST_COPROC 292f6f7395eSMike Frysinger }, 293f6f7395eSMike Frysinger #endif 294f6f7395eSMike Frysinger #if CONFIG_POST & CONFIG_SYS_POST_FLASH 295f6f7395eSMike Frysinger { 296f6f7395eSMike Frysinger "Parallel NOR flash test", 297f6f7395eSMike Frysinger "flash", 298f6f7395eSMike Frysinger "This test verifies parallel flash operations.", 299f6f7395eSMike Frysinger POST_RAM | POST_SLOWTEST | POST_MANUAL, 300f6f7395eSMike Frysinger &flash_post_test, 301f6f7395eSMike Frysinger NULL, 302f6f7395eSMike Frysinger NULL, 303f6f7395eSMike Frysinger CONFIG_SYS_POST_FLASH 304f6f7395eSMike Frysinger }, 30529fd7cebSAnatolij Gustschin #endif 3068d3fcb5eSValentin Longchamp #if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS 3078d3fcb5eSValentin Longchamp { 3088d3fcb5eSValentin Longchamp "Memory regions test", 3098d3fcb5eSValentin Longchamp "mem_regions", 3108d3fcb5eSValentin Longchamp "This test checks regularly placed regions of the RAM.", 3118d3fcb5eSValentin Longchamp POST_ROM | POST_SLOWTEST | POST_PREREL, 3128d3fcb5eSValentin Longchamp &memory_regions_post_test, 3138d3fcb5eSValentin Longchamp NULL, 3148d3fcb5eSValentin Longchamp NULL, 3158d3fcb5eSValentin Longchamp CONFIG_SYS_POST_MEM_REGIONS 3168d3fcb5eSValentin Longchamp }, 3178d3fcb5eSValentin Longchamp #endif 318324f6cfdSwdenk }; 319324f6cfdSwdenk 320d2397817SMike Frysinger unsigned int post_list_size = ARRAY_SIZE(post_list); 321