1324f6cfdSwdenk /* 2324f6cfdSwdenk * (C) Copyright 2002 3324f6cfdSwdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4324f6cfdSwdenk * 5324f6cfdSwdenk * See file CREDITS for list of people who contributed to this 6324f6cfdSwdenk * project. 7324f6cfdSwdenk * 8324f6cfdSwdenk * This program is free software; you can redistribute it and/or 9324f6cfdSwdenk * modify it under the terms of the GNU General Public License as 10324f6cfdSwdenk * published by the Free Software Foundation; either version 2 of 11324f6cfdSwdenk * the License, or (at your option) any later version. 12324f6cfdSwdenk * 13324f6cfdSwdenk * This program is distributed in the hope that it will be useful, 14324f6cfdSwdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 15324f6cfdSwdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16324f6cfdSwdenk * GNU General Public License for more details. 17324f6cfdSwdenk * 18324f6cfdSwdenk * You should have received a copy of the GNU General Public License 19324f6cfdSwdenk * along with this program; if not, write to the Free Software 20324f6cfdSwdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21324f6cfdSwdenk * MA 02111-1307 USA 22228f29acSwdenk * 23228f29acSwdenk * Be sure to mark tests to be run before relocation as such with the 24228f29acSwdenk * CFG_POST_PREREL flag so that logging is done correctly if the 25228f29acSwdenk * logbuffer support is enabled. 26324f6cfdSwdenk */ 27324f6cfdSwdenk 28324f6cfdSwdenk #include <common.h> 29324f6cfdSwdenk 30324f6cfdSwdenk #ifdef CONFIG_POST 31324f6cfdSwdenk 32324f6cfdSwdenk #include <post.h> 33324f6cfdSwdenk 34324f6cfdSwdenk extern int cache_post_test (int flags); 35324f6cfdSwdenk extern int watchdog_post_test (int flags); 36324f6cfdSwdenk extern int i2c_post_test (int flags); 37324f6cfdSwdenk extern int rtc_post_test (int flags); 38324f6cfdSwdenk extern int memory_post_test (int flags); 39324f6cfdSwdenk extern int cpu_post_test (int flags); 40324f6cfdSwdenk extern int uart_post_test (int flags); 41324f6cfdSwdenk extern int ether_post_test (int flags); 42324f6cfdSwdenk extern int spi_post_test (int flags); 43324f6cfdSwdenk extern int usb_post_test (int flags); 44324f6cfdSwdenk extern int spr_post_test (int flags); 45*4532cb69Swdenk extern int sysmon_post_test (int flags); 46*4532cb69Swdenk 47*4532cb69Swdenk extern int sysmon_init_f (void); 48*4532cb69Swdenk 49*4532cb69Swdenk extern void sysmon_reloc (void); 50*4532cb69Swdenk 51324f6cfdSwdenk 52324f6cfdSwdenk struct post_test post_list[] = 53324f6cfdSwdenk { 54324f6cfdSwdenk #if CONFIG_POST & CFG_POST_CACHE 55324f6cfdSwdenk { 56324f6cfdSwdenk "Cache test", 57324f6cfdSwdenk "cache", 58324f6cfdSwdenk "This test verifies the CPU cache operation.", 59324f6cfdSwdenk POST_RAM | POST_ALWAYS, 60228f29acSwdenk &cache_post_test, 61*4532cb69Swdenk NULL, 62*4532cb69Swdenk NULL, 63228f29acSwdenk CFG_POST_CACHE 64324f6cfdSwdenk }, 65324f6cfdSwdenk #endif 66324f6cfdSwdenk #if CONFIG_POST & CFG_POST_WATCHDOG 67324f6cfdSwdenk { 68324f6cfdSwdenk "Watchdog timer test", 69324f6cfdSwdenk "watchdog", 70324f6cfdSwdenk "This test checks the watchdog timer.", 71324f6cfdSwdenk POST_RAM | POST_POWERON | POST_POWERFAIL | POST_MANUAL | POST_REBOOT, 72228f29acSwdenk &watchdog_post_test, 73*4532cb69Swdenk NULL, 74*4532cb69Swdenk NULL, 75228f29acSwdenk CFG_POST_WATCHDOG 76324f6cfdSwdenk }, 77324f6cfdSwdenk #endif 78324f6cfdSwdenk #if CONFIG_POST & CFG_POST_I2C 79324f6cfdSwdenk { 80324f6cfdSwdenk "I2C test", 81324f6cfdSwdenk "i2c", 82324f6cfdSwdenk "This test verifies the I2C operation.", 83324f6cfdSwdenk POST_RAM | POST_ALWAYS, 84228f29acSwdenk &i2c_post_test, 85*4532cb69Swdenk NULL, 86*4532cb69Swdenk NULL, 87228f29acSwdenk CFG_POST_I2C 88324f6cfdSwdenk }, 89324f6cfdSwdenk #endif 90324f6cfdSwdenk #if CONFIG_POST & CFG_POST_RTC 91324f6cfdSwdenk { 92324f6cfdSwdenk "RTC test", 93324f6cfdSwdenk "rtc", 94324f6cfdSwdenk "This test verifies the RTC operation.", 95324f6cfdSwdenk POST_RAM | POST_POWERFAIL | POST_MANUAL, 96228f29acSwdenk &rtc_post_test, 97*4532cb69Swdenk NULL, 98*4532cb69Swdenk NULL, 99228f29acSwdenk CFG_POST_RTC 100324f6cfdSwdenk }, 101324f6cfdSwdenk #endif 102324f6cfdSwdenk #if CONFIG_POST & CFG_POST_MEMORY 103324f6cfdSwdenk { 104324f6cfdSwdenk "Memory test", 105324f6cfdSwdenk "memory", 106324f6cfdSwdenk "This test checks RAM.", 107228f29acSwdenk POST_ROM | POST_POWERON | POST_POWERFAIL | POST_PREREL, 108228f29acSwdenk &memory_post_test, 109*4532cb69Swdenk NULL, 110*4532cb69Swdenk NULL, 111228f29acSwdenk CFG_POST_MEMORY 112324f6cfdSwdenk }, 113324f6cfdSwdenk #endif 114324f6cfdSwdenk #if CONFIG_POST & CFG_POST_CPU 115324f6cfdSwdenk { 116324f6cfdSwdenk "CPU test", 117324f6cfdSwdenk "cpu", 118324f6cfdSwdenk "This test verifies the arithmetic logic unit of" 119324f6cfdSwdenk " CPU.", 120324f6cfdSwdenk POST_RAM | POST_ALWAYS, 121228f29acSwdenk &cpu_post_test, 122*4532cb69Swdenk NULL, 123*4532cb69Swdenk NULL, 124228f29acSwdenk CFG_POST_CPU 125324f6cfdSwdenk }, 126324f6cfdSwdenk #endif 127324f6cfdSwdenk #if CONFIG_POST & CFG_POST_UART 128324f6cfdSwdenk { 129324f6cfdSwdenk "UART test", 130324f6cfdSwdenk "uart", 131324f6cfdSwdenk "This test verifies the UART operation.", 132324f6cfdSwdenk POST_RAM | POST_POWERFAIL | POST_MANUAL, 133228f29acSwdenk &uart_post_test, 134*4532cb69Swdenk NULL, 135*4532cb69Swdenk NULL, 136228f29acSwdenk CFG_POST_UART 137324f6cfdSwdenk }, 138324f6cfdSwdenk #endif 139324f6cfdSwdenk #if CONFIG_POST & CFG_POST_ETHER 140324f6cfdSwdenk { 141324f6cfdSwdenk "ETHERNET test", 142324f6cfdSwdenk "ethernet", 143324f6cfdSwdenk "This test verifies the ETHERNET operation.", 144324f6cfdSwdenk POST_RAM | POST_ALWAYS | POST_MANUAL, 145228f29acSwdenk ðer_post_test, 146*4532cb69Swdenk NULL, 147*4532cb69Swdenk NULL, 148228f29acSwdenk CFG_POST_ETHER 149324f6cfdSwdenk }, 150324f6cfdSwdenk #endif 151324f6cfdSwdenk #if CONFIG_POST & CFG_POST_SPI 152324f6cfdSwdenk { 153324f6cfdSwdenk "SPI test", 154324f6cfdSwdenk "spi", 155324f6cfdSwdenk "This test verifies the SPI operation.", 156324f6cfdSwdenk POST_RAM | POST_ALWAYS | POST_MANUAL, 157228f29acSwdenk &spi_post_test, 158*4532cb69Swdenk NULL, 159*4532cb69Swdenk NULL, 160228f29acSwdenk CFG_POST_SPI 161324f6cfdSwdenk }, 162324f6cfdSwdenk #endif 163324f6cfdSwdenk #if CONFIG_POST & CFG_POST_USB 164324f6cfdSwdenk { 165324f6cfdSwdenk "USB test", 166324f6cfdSwdenk "usb", 167324f6cfdSwdenk "This test verifies the USB operation.", 168324f6cfdSwdenk POST_RAM | POST_ALWAYS | POST_MANUAL, 169228f29acSwdenk &usb_post_test, 170*4532cb69Swdenk NULL, 171*4532cb69Swdenk NULL, 172228f29acSwdenk CFG_POST_USB 173324f6cfdSwdenk }, 174324f6cfdSwdenk #endif 175324f6cfdSwdenk #if CONFIG_POST & CFG_POST_SPR 176324f6cfdSwdenk { 177324f6cfdSwdenk "SPR test", 178324f6cfdSwdenk "spr", 179324f6cfdSwdenk "This test checks SPR contents.", 180228f29acSwdenk POST_ROM | POST_ALWAYS | POST_PREREL, 181228f29acSwdenk &spr_post_test, 182*4532cb69Swdenk NULL, 183*4532cb69Swdenk NULL, 184228f29acSwdenk CFG_POST_SPR 185324f6cfdSwdenk }, 186324f6cfdSwdenk #endif 187*4532cb69Swdenk #if CONFIG_POST & CFG_POST_SYSMON 188*4532cb69Swdenk { 189*4532cb69Swdenk "SYSMON test", 190*4532cb69Swdenk "sysmon", 191*4532cb69Swdenk "This test monitors system hardware.", 192*4532cb69Swdenk POST_RAM | POST_ALWAYS, 193*4532cb69Swdenk &sysmon_post_test, 194*4532cb69Swdenk &sysmon_init_f, 195*4532cb69Swdenk &sysmon_reloc, 196*4532cb69Swdenk CFG_POST_SYSMON 197*4532cb69Swdenk }, 198*4532cb69Swdenk #endif 199324f6cfdSwdenk }; 200324f6cfdSwdenk 201324f6cfdSwdenk unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test); 202324f6cfdSwdenk 203324f6cfdSwdenk #endif /* CONFIG_POST */ 204