1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2324f6cfdSwdenk /* 3324f6cfdSwdenk * (C) Copyright 2002 4324f6cfdSwdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5324f6cfdSwdenk */ 6324f6cfdSwdenk 7324f6cfdSwdenk #include <common.h> 8324f6cfdSwdenk 9324f6cfdSwdenk #include <post.h> 10324f6cfdSwdenk 116e8ec682SYuri Tikhonov extern int ocm_post_test (int flags); 12324f6cfdSwdenk extern int cache_post_test (int flags); 13324f6cfdSwdenk extern int watchdog_post_test (int flags); 14324f6cfdSwdenk extern int i2c_post_test (int flags); 15324f6cfdSwdenk extern int rtc_post_test (int flags); 16324f6cfdSwdenk extern int memory_post_test (int flags); 17324f6cfdSwdenk extern int cpu_post_test (int flags); 18a11e0696SIgor Lisitsin extern int fpu_post_test (int flags); 19324f6cfdSwdenk extern int uart_post_test (int flags); 20324f6cfdSwdenk extern int ether_post_test (int flags); 21324f6cfdSwdenk extern int spi_post_test (int flags); 22324f6cfdSwdenk extern int usb_post_test (int flags); 23324f6cfdSwdenk extern int spr_post_test (int flags); 244532cb69Swdenk extern int sysmon_post_test (int flags); 255a8c51cdSwdenk extern int dsp_post_test (int flags); 2679fa88f3Swdenk extern int codec_post_test (int flags); 27531e3e8bSPavel Kolesnikov extern int ecc_post_test (int flags); 28f6f7395eSMike Frysinger extern int flash_post_test(int flags); 294532cb69Swdenk 3065b20dceSYuri Tikhonov extern int dspic_init_post_test (int flags); 3165b20dceSYuri Tikhonov extern int dspic_post_test (int flags); 3265b20dceSYuri Tikhonov extern int gdc_post_test (int flags); 3365b20dceSYuri Tikhonov extern int fpga_post_test (int flags); 3465b20dceSYuri Tikhonov extern int lwmon5_watchdog_post_test(int flags); 3565b20dceSYuri Tikhonov extern int sysmon1_post_test(int flags); 3629fd7cebSAnatolij Gustschin extern int coprocessor_post_test(int flags); 372151374fSMike Frysinger extern int led_post_test(int flags); 382151374fSMike Frysinger extern int button_post_test(int flags); 398d3fcb5eSValentin Longchamp extern int memory_regions_post_test(int flags); 4065b20dceSYuri Tikhonov 414532cb69Swdenk extern int sysmon_init_f (void); 424532cb69Swdenk 434532cb69Swdenk extern void sysmon_reloc (void); 444532cb69Swdenk 45324f6cfdSwdenk 46324f6cfdSwdenk struct post_test post_list[] = 47324f6cfdSwdenk { 486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_OCM 496e8ec682SYuri Tikhonov { 506e8ec682SYuri Tikhonov "OCM test", 516e8ec682SYuri Tikhonov "ocm", 526e8ec682SYuri Tikhonov "This test checks on chip memory (OCM).", 537845d490SYuri Tikhonov POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, 546e8ec682SYuri Tikhonov &ocm_post_test, 556e8ec682SYuri Tikhonov NULL, 566e8ec682SYuri Tikhonov NULL, 576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_OCM 586e8ec682SYuri Tikhonov }, 596e8ec682SYuri Tikhonov #endif 606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_CACHE 61324f6cfdSwdenk { 62324f6cfdSwdenk "Cache test", 63324f6cfdSwdenk "cache", 64324f6cfdSwdenk "This test verifies the CPU cache operation.", 65324f6cfdSwdenk POST_RAM | POST_ALWAYS, 66228f29acSwdenk &cache_post_test, 674532cb69Swdenk NULL, 684532cb69Swdenk NULL, 696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_CACHE 70324f6cfdSwdenk }, 71324f6cfdSwdenk #endif 726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG 7365b20dceSYuri Tikhonov #if defined(CONFIG_POST_WATCHDOG) 7465b20dceSYuri Tikhonov CONFIG_POST_WATCHDOG, 7565b20dceSYuri Tikhonov #else 76324f6cfdSwdenk { 77324f6cfdSwdenk "Watchdog timer test", 78324f6cfdSwdenk "watchdog", 79324f6cfdSwdenk "This test checks the watchdog timer.", 808564acf9Swdenk POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, 81228f29acSwdenk &watchdog_post_test, 824532cb69Swdenk NULL, 834532cb69Swdenk NULL, 846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_WATCHDOG 85324f6cfdSwdenk }, 86324f6cfdSwdenk #endif 8765b20dceSYuri Tikhonov #endif 886d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_I2C 89324f6cfdSwdenk { 90324f6cfdSwdenk "I2C test", 91324f6cfdSwdenk "i2c", 92324f6cfdSwdenk "This test verifies the I2C operation.", 93324f6cfdSwdenk POST_RAM | POST_ALWAYS, 94228f29acSwdenk &i2c_post_test, 954532cb69Swdenk NULL, 964532cb69Swdenk NULL, 976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_I2C 98324f6cfdSwdenk }, 99324f6cfdSwdenk #endif 1006d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_RTC 101324f6cfdSwdenk { 102324f6cfdSwdenk "RTC test", 103324f6cfdSwdenk "rtc", 104324f6cfdSwdenk "This test verifies the RTC operation.", 1058564acf9Swdenk POST_RAM | POST_SLOWTEST | POST_MANUAL, 106228f29acSwdenk &rtc_post_test, 1074532cb69Swdenk NULL, 1084532cb69Swdenk NULL, 1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_RTC 110324f6cfdSwdenk }, 111324f6cfdSwdenk #endif 1126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_MEMORY 113324f6cfdSwdenk { 114324f6cfdSwdenk "Memory test", 115324f6cfdSwdenk "memory", 116324f6cfdSwdenk "This test checks RAM.", 1178564acf9Swdenk POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, 118228f29acSwdenk &memory_post_test, 1194532cb69Swdenk NULL, 1204532cb69Swdenk NULL, 1216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_MEMORY 122324f6cfdSwdenk }, 123324f6cfdSwdenk #endif 1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_CPU 125324f6cfdSwdenk { 126324f6cfdSwdenk "CPU test", 127324f6cfdSwdenk "cpu", 128324f6cfdSwdenk "This test verifies the arithmetic logic unit of" 129324f6cfdSwdenk " CPU.", 130324f6cfdSwdenk POST_RAM | POST_ALWAYS, 131228f29acSwdenk &cpu_post_test, 1324532cb69Swdenk NULL, 1334532cb69Swdenk NULL, 1346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_CPU 135324f6cfdSwdenk }, 136324f6cfdSwdenk #endif 1376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_FPU 138a11e0696SIgor Lisitsin { 139a11e0696SIgor Lisitsin "FPU test", 140a11e0696SIgor Lisitsin "fpu", 141a11e0696SIgor Lisitsin "This test verifies the arithmetic logic unit of" 142a11e0696SIgor Lisitsin " FPU.", 143a11e0696SIgor Lisitsin POST_RAM | POST_ALWAYS, 144a11e0696SIgor Lisitsin &fpu_post_test, 145a11e0696SIgor Lisitsin NULL, 146a11e0696SIgor Lisitsin NULL, 1476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_FPU 148a11e0696SIgor Lisitsin }, 149a11e0696SIgor Lisitsin #endif 1506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_UART 151834a45d7SStefan Roese #if defined(CONFIG_POST_UART) 152834a45d7SStefan Roese CONFIG_POST_UART, 153834a45d7SStefan Roese #else 154324f6cfdSwdenk { 155324f6cfdSwdenk "UART test", 156324f6cfdSwdenk "uart", 157324f6cfdSwdenk "This test verifies the UART operation.", 1588564acf9Swdenk POST_RAM | POST_SLOWTEST | POST_MANUAL, 159228f29acSwdenk &uart_post_test, 1604532cb69Swdenk NULL, 1614532cb69Swdenk NULL, 1626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_UART 163324f6cfdSwdenk }, 164834a45d7SStefan Roese #endif /* CONFIG_POST_UART */ 165324f6cfdSwdenk #endif 1666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_ETHER 167324f6cfdSwdenk { 168324f6cfdSwdenk "ETHERNET test", 169324f6cfdSwdenk "ethernet", 170324f6cfdSwdenk "This test verifies the ETHERNET operation.", 1715735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 172228f29acSwdenk ðer_post_test, 1734532cb69Swdenk NULL, 1744532cb69Swdenk NULL, 1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_ETHER 176324f6cfdSwdenk }, 177324f6cfdSwdenk #endif 1786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_USB 179324f6cfdSwdenk { 180324f6cfdSwdenk "USB test", 181324f6cfdSwdenk "usb", 182324f6cfdSwdenk "This test verifies the USB operation.", 1835735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 184228f29acSwdenk &usb_post_test, 1854532cb69Swdenk NULL, 1864532cb69Swdenk NULL, 1876d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_USB 188324f6cfdSwdenk }, 189324f6cfdSwdenk #endif 1906d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_SPR 191324f6cfdSwdenk { 192324f6cfdSwdenk "SPR test", 193324f6cfdSwdenk "spr", 194324f6cfdSwdenk "This test checks SPR contents.", 195b2e2142cSStefan Roese POST_RAM | POST_ALWAYS, 196228f29acSwdenk &spr_post_test, 1974532cb69Swdenk NULL, 1984532cb69Swdenk NULL, 1996d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_SPR 200324f6cfdSwdenk }, 201324f6cfdSwdenk #endif 2026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_SYSMON 2034532cb69Swdenk { 2044532cb69Swdenk "SYSMON test", 2054532cb69Swdenk "sysmon", 2064532cb69Swdenk "This test monitors system hardware.", 2074532cb69Swdenk POST_RAM | POST_ALWAYS, 2084532cb69Swdenk &sysmon_post_test, 2094532cb69Swdenk &sysmon_init_f, 2104532cb69Swdenk &sysmon_reloc, 2116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_SYSMON 2124532cb69Swdenk }, 2134532cb69Swdenk #endif 2146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_DSP 2155a8c51cdSwdenk { 2165a8c51cdSwdenk "DSP test", 2175a8c51cdSwdenk "dsp", 2185a8c51cdSwdenk "This test checks any connected DSP(s).", 2195735bca5SRobert P. J. Day POST_RAM | POST_ALWAYS, 2205a8c51cdSwdenk &dsp_post_test, 2215a8c51cdSwdenk NULL, 2225a8c51cdSwdenk NULL, 2236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_DSP 2245a8c51cdSwdenk }, 2255a8c51cdSwdenk #endif 2266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_CODEC 22779fa88f3Swdenk { 22879fa88f3Swdenk "CODEC test", 22979fa88f3Swdenk "codec", 23079fa88f3Swdenk "This test checks any connected codec(s).", 23179fa88f3Swdenk POST_RAM | POST_MANUAL, 23279fa88f3Swdenk &codec_post_test, 23379fa88f3Swdenk NULL, 23479fa88f3Swdenk NULL, 2356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_CODEC 23679fa88f3Swdenk }, 23779fa88f3Swdenk #endif 2386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_ECC 239531e3e8bSPavel Kolesnikov { 240531e3e8bSPavel Kolesnikov "ECC test", 241531e3e8bSPavel Kolesnikov "ecc", 2428dafa874SLarry Johnson "This test checks the ECC facility of memory.", 2438dafa874SLarry Johnson POST_ROM | POST_ALWAYS | POST_PREREL, 244531e3e8bSPavel Kolesnikov &ecc_post_test, 245531e3e8bSPavel Kolesnikov NULL, 246531e3e8bSPavel Kolesnikov NULL, 2476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_POST_ECC 248531e3e8bSPavel Kolesnikov }, 249531e3e8bSPavel Kolesnikov #endif 2506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC1 25165b20dceSYuri Tikhonov CONFIG_POST_BSPEC1, 25265b20dceSYuri Tikhonov #endif 2536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC2 25465b20dceSYuri Tikhonov CONFIG_POST_BSPEC2, 25565b20dceSYuri Tikhonov #endif 2566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC3 25765b20dceSYuri Tikhonov CONFIG_POST_BSPEC3, 25865b20dceSYuri Tikhonov #endif 2596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC4 26065b20dceSYuri Tikhonov CONFIG_POST_BSPEC4, 26165b20dceSYuri Tikhonov #endif 2626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 26365b20dceSYuri Tikhonov CONFIG_POST_BSPEC5, 26465b20dceSYuri Tikhonov #endif 26529fd7cebSAnatolij Gustschin #if CONFIG_POST & CONFIG_SYS_POST_COPROC 26629fd7cebSAnatolij Gustschin { 26729fd7cebSAnatolij Gustschin "Coprocessors communication test", 26829fd7cebSAnatolij Gustschin "coproc_com", 26929fd7cebSAnatolij Gustschin "This test checks communication with coprocessors.", 27029fd7cebSAnatolij Gustschin POST_RAM | POST_ALWAYS | POST_CRITICAL, 27129fd7cebSAnatolij Gustschin &coprocessor_post_test, 27229fd7cebSAnatolij Gustschin NULL, 27329fd7cebSAnatolij Gustschin NULL, 27429fd7cebSAnatolij Gustschin CONFIG_SYS_POST_COPROC 275f6f7395eSMike Frysinger }, 276f6f7395eSMike Frysinger #endif 277f6f7395eSMike Frysinger #if CONFIG_POST & CONFIG_SYS_POST_FLASH 278f6f7395eSMike Frysinger { 279f6f7395eSMike Frysinger "Parallel NOR flash test", 280f6f7395eSMike Frysinger "flash", 281f6f7395eSMike Frysinger "This test verifies parallel flash operations.", 282f6f7395eSMike Frysinger POST_RAM | POST_SLOWTEST | POST_MANUAL, 283f6f7395eSMike Frysinger &flash_post_test, 284f6f7395eSMike Frysinger NULL, 285f6f7395eSMike Frysinger NULL, 286f6f7395eSMike Frysinger CONFIG_SYS_POST_FLASH 287f6f7395eSMike Frysinger }, 28829fd7cebSAnatolij Gustschin #endif 2898d3fcb5eSValentin Longchamp #if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS 2908d3fcb5eSValentin Longchamp { 2918d3fcb5eSValentin Longchamp "Memory regions test", 2928d3fcb5eSValentin Longchamp "mem_regions", 2938d3fcb5eSValentin Longchamp "This test checks regularly placed regions of the RAM.", 2948d3fcb5eSValentin Longchamp POST_ROM | POST_SLOWTEST | POST_PREREL, 2958d3fcb5eSValentin Longchamp &memory_regions_post_test, 2968d3fcb5eSValentin Longchamp NULL, 2978d3fcb5eSValentin Longchamp NULL, 2988d3fcb5eSValentin Longchamp CONFIG_SYS_POST_MEM_REGIONS 2998d3fcb5eSValentin Longchamp }, 3008d3fcb5eSValentin Longchamp #endif 301324f6cfdSwdenk }; 302324f6cfdSwdenk 303d2397817SMike Frysinger unsigned int post_list_size = ARRAY_SIZE(post_list); 304