1d677bfe2SMiquel Raynal /* SPDX-License-Identifier: GPL-2.0+ */ 2d677bfe2SMiquel Raynal /* 3d677bfe2SMiquel Raynal * Copyright (c) 2013 The Chromium OS Authors. 4d677bfe2SMiquel Raynal * Coypright (c) 2013 Guntermann & Drunck GmbH 5d677bfe2SMiquel Raynal */ 6d677bfe2SMiquel Raynal 7d677bfe2SMiquel Raynal #ifndef __TPM_V1_H 8d677bfe2SMiquel Raynal #define __TPM_V1_H 9d677bfe2SMiquel Raynal 10d677bfe2SMiquel Raynal #include <tpm-common.h> 11*d7869cecSEddie James #include <linux/bitops.h> 12*d7869cecSEddie James 13*d7869cecSEddie James struct udevice; 14d677bfe2SMiquel Raynal 15d677bfe2SMiquel Raynal /* Useful constants */ 16d677bfe2SMiquel Raynal enum { 17d677bfe2SMiquel Raynal TPM_REQUEST_HEADER_LENGTH = 10, 18d677bfe2SMiquel Raynal TPM_RESPONSE_HEADER_LENGTH = 10, 19d677bfe2SMiquel Raynal PCR_DIGEST_LENGTH = 20, 20d677bfe2SMiquel Raynal DIGEST_LENGTH = 20, 21d677bfe2SMiquel Raynal TPM_REQUEST_AUTH_LENGTH = 45, 22d677bfe2SMiquel Raynal TPM_RESPONSE_AUTH_LENGTH = 41, 23d677bfe2SMiquel Raynal /* some max lengths, valid for RSA keys <= 2048 bits */ 24d677bfe2SMiquel Raynal TPM_KEY12_MAX_LENGTH = 618, 25d677bfe2SMiquel Raynal TPM_PUBKEY_MAX_LENGTH = 288, 26d677bfe2SMiquel Raynal }; 27d677bfe2SMiquel Raynal 28d677bfe2SMiquel Raynal enum tpm_startup_type { 29d677bfe2SMiquel Raynal TPM_ST_CLEAR = 0x0001, 30d677bfe2SMiquel Raynal TPM_ST_STATE = 0x0002, 31d677bfe2SMiquel Raynal TPM_ST_DEACTIVATED = 0x0003, 32d677bfe2SMiquel Raynal }; 33d677bfe2SMiquel Raynal 34d677bfe2SMiquel Raynal enum tpm_physical_presence { 35d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_HW_DISABLE = 0x0200, 36d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_CMD_DISABLE = 0x0100, 37d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK = 0x0080, 38d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_HW_ENABLE = 0x0040, 39d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_CMD_ENABLE = 0x0020, 40d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_NOTPRESENT = 0x0010, 41d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_PRESENT = 0x0008, 42d677bfe2SMiquel Raynal TPM_PHYSICAL_PRESENCE_LOCK = 0x0004, 43d677bfe2SMiquel Raynal }; 44d677bfe2SMiquel Raynal 45d677bfe2SMiquel Raynal enum tpm_nv_index { 46d677bfe2SMiquel Raynal TPM_NV_INDEX_LOCK = 0xffffffff, 47d677bfe2SMiquel Raynal TPM_NV_INDEX_0 = 0x00000000, 48d677bfe2SMiquel Raynal TPM_NV_INDEX_DIR = 0x10000001, 49d677bfe2SMiquel Raynal }; 50d677bfe2SMiquel Raynal 51d677bfe2SMiquel Raynal enum tpm_resource_type { 52d677bfe2SMiquel Raynal TPM_RT_KEY = 0x00000001, 53d677bfe2SMiquel Raynal TPM_RT_AUTH = 0x00000002, 54d677bfe2SMiquel Raynal TPM_RT_HASH = 0x00000003, 55d677bfe2SMiquel Raynal TPM_RT_TRANS = 0x00000004, 56d677bfe2SMiquel Raynal TPM_RT_CONTEXT = 0x00000005, 57d677bfe2SMiquel Raynal TPM_RT_COUNTER = 0x00000006, 58d677bfe2SMiquel Raynal TPM_RT_DELEGATE = 0x00000007, 59d677bfe2SMiquel Raynal TPM_RT_DAA_TPM = 0x00000008, 60d677bfe2SMiquel Raynal TPM_RT_DAA_V0 = 0x00000009, 61d677bfe2SMiquel Raynal TPM_RT_DAA_V1 = 0x0000000A, 62d677bfe2SMiquel Raynal }; 63d677bfe2SMiquel Raynal 64d677bfe2SMiquel Raynal enum tpm_capability_areas { 65d677bfe2SMiquel Raynal TPM_CAP_ORD = 0x00000001, 66d677bfe2SMiquel Raynal TPM_CAP_ALG = 0x00000002, 67d677bfe2SMiquel Raynal TPM_CAP_PID = 0x00000003, 68d677bfe2SMiquel Raynal TPM_CAP_FLAG = 0x00000004, 69d677bfe2SMiquel Raynal TPM_CAP_PROPERTY = 0x00000005, 70d677bfe2SMiquel Raynal TPM_CAP_VERSION = 0x00000006, 71d677bfe2SMiquel Raynal TPM_CAP_KEY_HANDLE = 0x00000007, 72d677bfe2SMiquel Raynal TPM_CAP_CHECK_LOADED = 0x00000008, 73d677bfe2SMiquel Raynal TPM_CAP_SYM_MODE = 0x00000009, 74d677bfe2SMiquel Raynal TPM_CAP_KEY_STATUS = 0x0000000C, 75d677bfe2SMiquel Raynal TPM_CAP_NV_LIST = 0x0000000D, 76d677bfe2SMiquel Raynal TPM_CAP_MFR = 0x00000010, 77d677bfe2SMiquel Raynal TPM_CAP_NV_INDEX = 0x00000011, 78d677bfe2SMiquel Raynal TPM_CAP_TRANS_ALG = 0x00000012, 79d677bfe2SMiquel Raynal TPM_CAP_HANDLE = 0x00000014, 80d677bfe2SMiquel Raynal TPM_CAP_TRANS_ES = 0x00000015, 81d677bfe2SMiquel Raynal TPM_CAP_AUTH_ENCRYPT = 0x00000017, 82d677bfe2SMiquel Raynal TPM_CAP_SELECT_SIZE = 0x00000018, 83d677bfe2SMiquel Raynal TPM_CAP_DA_LOGIC = 0x00000019, 84d677bfe2SMiquel Raynal TPM_CAP_VERSION_VAL = 0x0000001A, 85d677bfe2SMiquel Raynal }; 86d677bfe2SMiquel Raynal 87998af319SSimon Glass enum tmp_cap_flag { 88998af319SSimon Glass TPM_CAP_FLAG_PERMANENT = 0x108, 89998af319SSimon Glass }; 90998af319SSimon Glass 91998af319SSimon Glass #define TPM_TAG_PERMANENT_FLAGS 0x001f 92998af319SSimon Glass 93d677bfe2SMiquel Raynal #define TPM_NV_PER_GLOBALLOCK BIT(15) 94d677bfe2SMiquel Raynal #define TPM_NV_PER_PPREAD BIT(16) 95d677bfe2SMiquel Raynal #define TPM_NV_PER_PPWRITE BIT(0) 96d677bfe2SMiquel Raynal #define TPM_NV_PER_READ_STCLEAR BIT(31) 97d677bfe2SMiquel Raynal #define TPM_NV_PER_WRITE_STCLEAR BIT(14) 98d677bfe2SMiquel Raynal #define TPM_NV_PER_WRITEDEFINE BIT(13) 99d677bfe2SMiquel Raynal #define TPM_NV_PER_WRITEALL BIT(12) 100d677bfe2SMiquel Raynal 101d677bfe2SMiquel Raynal enum { 102d677bfe2SMiquel Raynal TPM_PUBEK_SIZE = 256, 103d677bfe2SMiquel Raynal }; 104d677bfe2SMiquel Raynal 105998af319SSimon Glass enum { 106998af319SSimon Glass TPM_CMD_EXTEND = 0x14, 107998af319SSimon Glass TPM_CMD_GET_CAPABILITY = 0x65, 108998af319SSimon Glass TPM_CMD_NV_DEFINE_SPACE = 0xcc, 109998af319SSimon Glass TPM_CMD_NV_WRITE_VALUE = 0xcd, 110998af319SSimon Glass TPM_CMD_NV_READ_VALUE = 0xcf, 111998af319SSimon Glass }; 112998af319SSimon Glass 113d677bfe2SMiquel Raynal /** 114d677bfe2SMiquel Raynal * TPM return codes as defined in the TCG Main specification 115d677bfe2SMiquel Raynal * (TPM Main Part 2 Structures; Specification version 1.2) 116d677bfe2SMiquel Raynal */ 117d677bfe2SMiquel Raynal enum tpm_return_code { 118d677bfe2SMiquel Raynal TPM_BASE = 0x00000000, 119d677bfe2SMiquel Raynal TPM_NON_FATAL = 0x00000800, 120d677bfe2SMiquel Raynal TPM_SUCCESS = TPM_BASE, 121d677bfe2SMiquel Raynal /* TPM-defined fatal error codes */ 122d677bfe2SMiquel Raynal TPM_AUTHFAIL = TPM_BASE + 1, 123d677bfe2SMiquel Raynal TPM_BADINDEX = TPM_BASE + 2, 124d677bfe2SMiquel Raynal TPM_BAD_PARAMETER = TPM_BASE + 3, 125d677bfe2SMiquel Raynal TPM_AUDITFAILURE = TPM_BASE + 4, 126d677bfe2SMiquel Raynal TPM_CLEAR_DISABLED = TPM_BASE + 5, 127d677bfe2SMiquel Raynal TPM_DEACTIVATED = TPM_BASE + 6, 128d677bfe2SMiquel Raynal TPM_DISABLED = TPM_BASE + 7, 129d677bfe2SMiquel Raynal TPM_DISABLED_CMD = TPM_BASE + 8, 130d677bfe2SMiquel Raynal TPM_FAIL = TPM_BASE + 9, 131d677bfe2SMiquel Raynal TPM_BAD_ORDINAL = TPM_BASE + 10, 132d677bfe2SMiquel Raynal TPM_INSTALL_DISABLED = TPM_BASE + 11, 133d677bfe2SMiquel Raynal TPM_INVALID_KEYHANDLE = TPM_BASE + 12, 134d677bfe2SMiquel Raynal TPM_KEYNOTFOUND = TPM_BASE + 13, 135d677bfe2SMiquel Raynal TPM_INAPPROPRIATE_ENC = TPM_BASE + 14, 136d677bfe2SMiquel Raynal TPM_MIGRATE_FAIL = TPM_BASE + 15, 137d677bfe2SMiquel Raynal TPM_INVALID_PCR_INFO = TPM_BASE + 16, 138d677bfe2SMiquel Raynal TPM_NOSPACE = TPM_BASE + 17, 139d677bfe2SMiquel Raynal TPM_NOSRK = TPM_BASE + 18, 140d677bfe2SMiquel Raynal TPM_NOTSEALED_BLOB = TPM_BASE + 19, 141d677bfe2SMiquel Raynal TPM_OWNER_SET = TPM_BASE + 20, 142d677bfe2SMiquel Raynal TPM_RESOURCES = TPM_BASE + 21, 143d677bfe2SMiquel Raynal TPM_SHORTRANDOM = TPM_BASE + 22, 144d677bfe2SMiquel Raynal TPM_SIZE = TPM_BASE + 23, 145d677bfe2SMiquel Raynal TPM_WRONGPCRVAL = TPM_BASE + 24, 146d677bfe2SMiquel Raynal TPM_BAD_PARAM_SIZE = TPM_BASE + 25, 147d677bfe2SMiquel Raynal TPM_SHA_THREAD = TPM_BASE + 26, 148d677bfe2SMiquel Raynal TPM_SHA_ERROR = TPM_BASE + 27, 149d677bfe2SMiquel Raynal TPM_FAILEDSELFTEST = TPM_BASE + 28, 150d677bfe2SMiquel Raynal TPM_AUTH2FAIL = TPM_BASE + 29, 151d677bfe2SMiquel Raynal TPM_BADTAG = TPM_BASE + 30, 152d677bfe2SMiquel Raynal TPM_IOERROR = TPM_BASE + 31, 153d677bfe2SMiquel Raynal TPM_ENCRYPT_ERROR = TPM_BASE + 32, 154d677bfe2SMiquel Raynal TPM_DECRYPT_ERROR = TPM_BASE + 33, 155d677bfe2SMiquel Raynal TPM_INVALID_AUTHHANDLE = TPM_BASE + 34, 156d677bfe2SMiquel Raynal TPM_NO_ENDORSEMENT = TPM_BASE + 35, 157d677bfe2SMiquel Raynal TPM_INVALID_KEYUSAGE = TPM_BASE + 36, 158d677bfe2SMiquel Raynal TPM_WRONG_ENTITYTYPE = TPM_BASE + 37, 159d677bfe2SMiquel Raynal TPM_INVALID_POSTINIT = TPM_BASE + 38, 160d677bfe2SMiquel Raynal TPM_INAPPROPRIATE_SIG = TPM_BASE + 39, 161d677bfe2SMiquel Raynal TPM_BAD_KEY_PROPERTY = TPM_BASE + 40, 162d677bfe2SMiquel Raynal TPM_BAD_MIGRATION = TPM_BASE + 41, 163d677bfe2SMiquel Raynal TPM_BAD_SCHEME = TPM_BASE + 42, 164d677bfe2SMiquel Raynal TPM_BAD_DATASIZE = TPM_BASE + 43, 165d677bfe2SMiquel Raynal TPM_BAD_MODE = TPM_BASE + 44, 166d677bfe2SMiquel Raynal TPM_BAD_PRESENCE = TPM_BASE + 45, 167d677bfe2SMiquel Raynal TPM_BAD_VERSION = TPM_BASE + 46, 168d677bfe2SMiquel Raynal TPM_NO_WRAP_TRANSPORT = TPM_BASE + 47, 169d677bfe2SMiquel Raynal TPM_AUDITFAIL_UNSUCCESSFUL = TPM_BASE + 48, 170d677bfe2SMiquel Raynal TPM_AUDITFAIL_SUCCESSFUL = TPM_BASE + 49, 171d677bfe2SMiquel Raynal TPM_NOTRESETABLE = TPM_BASE + 50, 172d677bfe2SMiquel Raynal TPM_NOTLOCAL = TPM_BASE + 51, 173d677bfe2SMiquel Raynal TPM_BAD_TYPE = TPM_BASE + 52, 174d677bfe2SMiquel Raynal TPM_INVALID_RESOURCE = TPM_BASE + 53, 175d677bfe2SMiquel Raynal TPM_NOTFIPS = TPM_BASE + 54, 176d677bfe2SMiquel Raynal TPM_INVALID_FAMILY = TPM_BASE + 55, 177d677bfe2SMiquel Raynal TPM_NO_NV_PERMISSION = TPM_BASE + 56, 178d677bfe2SMiquel Raynal TPM_REQUIRES_SIGN = TPM_BASE + 57, 179d677bfe2SMiquel Raynal TPM_KEY_NOTSUPPORTED = TPM_BASE + 58, 180d677bfe2SMiquel Raynal TPM_AUTH_CONFLICT = TPM_BASE + 59, 181d677bfe2SMiquel Raynal TPM_AREA_LOCKED = TPM_BASE + 60, 182d677bfe2SMiquel Raynal TPM_BAD_LOCALITY = TPM_BASE + 61, 183d677bfe2SMiquel Raynal TPM_READ_ONLY = TPM_BASE + 62, 184d677bfe2SMiquel Raynal TPM_PER_NOWRITE = TPM_BASE + 63, 185d677bfe2SMiquel Raynal TPM_FAMILY_COUNT = TPM_BASE + 64, 186d677bfe2SMiquel Raynal TPM_WRITE_LOCKED = TPM_BASE + 65, 187d677bfe2SMiquel Raynal TPM_BAD_ATTRIBUTES = TPM_BASE + 66, 188d677bfe2SMiquel Raynal TPM_INVALID_STRUCTURE = TPM_BASE + 67, 189d677bfe2SMiquel Raynal TPM_KEY_OWNER_CONTROL = TPM_BASE + 68, 190d677bfe2SMiquel Raynal TPM_BAD_COUNTER = TPM_BASE + 69, 191d677bfe2SMiquel Raynal TPM_NOT_FULLWRITE = TPM_BASE + 70, 192d677bfe2SMiquel Raynal TPM_CONTEXT_GAP = TPM_BASE + 71, 193d677bfe2SMiquel Raynal TPM_MAXNVWRITES = TPM_BASE + 72, 194d677bfe2SMiquel Raynal TPM_NOOPERATOR = TPM_BASE + 73, 195d677bfe2SMiquel Raynal TPM_RESOURCEMISSING = TPM_BASE + 74, 196d677bfe2SMiquel Raynal TPM_DELEGATE_LOCK = TPM_BASE + 75, 197d677bfe2SMiquel Raynal TPM_DELEGATE_FAMILY = TPM_BASE + 76, 198d677bfe2SMiquel Raynal TPM_DELEGATE_ADMIN = TPM_BASE + 77, 199d677bfe2SMiquel Raynal TPM_TRANSPORT_NOTEXCLUSIVE = TPM_BASE + 78, 200d677bfe2SMiquel Raynal TPM_OWNER_CONTROL = TPM_BASE + 79, 201d677bfe2SMiquel Raynal TPM_DAA_RESOURCES = TPM_BASE + 80, 202d677bfe2SMiquel Raynal TPM_DAA_INPUT_DATA0 = TPM_BASE + 81, 203d677bfe2SMiquel Raynal TPM_DAA_INPUT_DATA1 = TPM_BASE + 82, 204d677bfe2SMiquel Raynal TPM_DAA_ISSUER_SETTINGS = TPM_BASE + 83, 205d677bfe2SMiquel Raynal TPM_DAA_TPM_SETTINGS = TPM_BASE + 84, 206d677bfe2SMiquel Raynal TPM_DAA_STAGE = TPM_BASE + 85, 207d677bfe2SMiquel Raynal TPM_DAA_ISSUER_VALIDITY = TPM_BASE + 86, 208d677bfe2SMiquel Raynal TPM_DAA_WRONG_W = TPM_BASE + 87, 209d677bfe2SMiquel Raynal TPM_BAD_HANDLE = TPM_BASE + 88, 210d677bfe2SMiquel Raynal TPM_BAD_DELEGATE = TPM_BASE + 89, 211d677bfe2SMiquel Raynal TPM_BADCONTEXT = TPM_BASE + 90, 212d677bfe2SMiquel Raynal TPM_TOOMANYCONTEXTS = TPM_BASE + 91, 213d677bfe2SMiquel Raynal TPM_MA_TICKET_SIGNATURE = TPM_BASE + 92, 214d677bfe2SMiquel Raynal TPM_MA_DESTINATION = TPM_BASE + 93, 215d677bfe2SMiquel Raynal TPM_MA_SOURCE = TPM_BASE + 94, 216d677bfe2SMiquel Raynal TPM_MA_AUTHORITY = TPM_BASE + 95, 217d677bfe2SMiquel Raynal TPM_PERMANENTEK = TPM_BASE + 97, 218d677bfe2SMiquel Raynal TPM_BAD_SIGNATURE = TPM_BASE + 98, 219d677bfe2SMiquel Raynal TPM_NOCONTEXTSPACE = TPM_BASE + 99, 220d677bfe2SMiquel Raynal /* TPM-defined non-fatal errors */ 221d677bfe2SMiquel Raynal TPM_RETRY = TPM_BASE + TPM_NON_FATAL, 222d677bfe2SMiquel Raynal TPM_NEEDS_SELFTEST = TPM_BASE + TPM_NON_FATAL + 1, 223d677bfe2SMiquel Raynal TPM_DOING_SELFTEST = TPM_BASE + TPM_NON_FATAL + 2, 224d677bfe2SMiquel Raynal TPM_DEFEND_LOCK_RUNNING = TPM_BASE + TPM_NON_FATAL + 3, 225d677bfe2SMiquel Raynal }; 226d677bfe2SMiquel Raynal 227d677bfe2SMiquel Raynal struct tpm_permanent_flags { 228d677bfe2SMiquel Raynal __be16 tag; 229d677bfe2SMiquel Raynal u8 disable; 230d677bfe2SMiquel Raynal u8 ownership; 231d677bfe2SMiquel Raynal u8 deactivated; 232d677bfe2SMiquel Raynal u8 read_pubek; 233d677bfe2SMiquel Raynal u8 disable_owner_clear; 234d677bfe2SMiquel Raynal u8 allow_maintenance; 235d677bfe2SMiquel Raynal u8 physical_presence_lifetime_lock; 236d677bfe2SMiquel Raynal u8 physical_presence_hw_enable; 237d677bfe2SMiquel Raynal u8 physical_presence_cmd_enable; 238d677bfe2SMiquel Raynal u8 cekp_used; 239d677bfe2SMiquel Raynal u8 tpm_post; 240d677bfe2SMiquel Raynal u8 tpm_post_lock; 241d677bfe2SMiquel Raynal u8 fips; 242d677bfe2SMiquel Raynal u8 operator; 243d677bfe2SMiquel Raynal u8 enable_revoke_ek; 244d677bfe2SMiquel Raynal u8 nv_locked; 245d677bfe2SMiquel Raynal u8 read_srk_pub; 246d677bfe2SMiquel Raynal u8 tpm_established; 247d677bfe2SMiquel Raynal u8 maintenance_done; 248d677bfe2SMiquel Raynal u8 disable_full_da_logic_info; 249d677bfe2SMiquel Raynal } __packed; 250d677bfe2SMiquel Raynal 251ef8a2500SSimon Glass #define TPM_SHA1_160_HASH_LEN 0x14 252ef8a2500SSimon Glass 253ef8a2500SSimon Glass struct __packed tpm_composite_hash { 254ef8a2500SSimon Glass u8 digest[TPM_SHA1_160_HASH_LEN]; 255ef8a2500SSimon Glass }; 256ef8a2500SSimon Glass 257ef8a2500SSimon Glass struct __packed tpm_pcr_selection { 258ef8a2500SSimon Glass __be16 size_of_select; 259ef8a2500SSimon Glass u8 pcr_select[3]; /* matches vboot's struct */ 260ef8a2500SSimon Glass }; 261ef8a2500SSimon Glass 262ef8a2500SSimon Glass struct __packed tpm_pcr_info_short { 263ef8a2500SSimon Glass struct tpm_pcr_selection pcr_selection; 264ef8a2500SSimon Glass u8 locality_at_release; 265ef8a2500SSimon Glass struct tpm_composite_hash digest_at_release; 266ef8a2500SSimon Glass }; 267ef8a2500SSimon Glass 268ef8a2500SSimon Glass struct __packed tpm_nv_attributes { 269ef8a2500SSimon Glass __be16 tag; 270ef8a2500SSimon Glass __be32 attributes; 271ef8a2500SSimon Glass }; 272ef8a2500SSimon Glass 273ef8a2500SSimon Glass struct __packed tpm_nv_data_public { 274ef8a2500SSimon Glass __be16 tag; 275ef8a2500SSimon Glass __be32 nv_index; 276ef8a2500SSimon Glass struct tpm_pcr_info_short pcr_info_read; 277ef8a2500SSimon Glass struct tpm_pcr_info_short pcr_info_write; 278ef8a2500SSimon Glass struct tpm_nv_attributes permission; 279ef8a2500SSimon Glass u8 read_st_clear; 280ef8a2500SSimon Glass u8 write_st_clear; 281ef8a2500SSimon Glass u8 write_define; 282ef8a2500SSimon Glass __be32 data_size; 283ef8a2500SSimon Glass }; 284ef8a2500SSimon Glass 285d677bfe2SMiquel Raynal /** 286d677bfe2SMiquel Raynal * Issue a TPM_Startup command. 287d677bfe2SMiquel Raynal * 288abdc7b8aSSimon Glass * @param dev TPM device 289d677bfe2SMiquel Raynal * @param mode TPM startup mode 290*d7869cecSEddie James * Return: return code of the operation 291d677bfe2SMiquel Raynal */ 292*d7869cecSEddie James u32 tpm1_startup(struct udevice *dev, enum tpm_startup_type mode); 293d677bfe2SMiquel Raynal 294d677bfe2SMiquel Raynal /** 295d677bfe2SMiquel Raynal * Issue a TPM_SelfTestFull command. 296d677bfe2SMiquel Raynal * 297abdc7b8aSSimon Glass * @param dev TPM device 298*d7869cecSEddie James * Return: return code of the operation 299d677bfe2SMiquel Raynal */ 300*d7869cecSEddie James u32 tpm1_self_test_full(struct udevice *dev); 301d677bfe2SMiquel Raynal 302d677bfe2SMiquel Raynal /** 303d677bfe2SMiquel Raynal * Issue a TPM_ContinueSelfTest command. 304d677bfe2SMiquel Raynal * 305abdc7b8aSSimon Glass * @param dev TPM device 306*d7869cecSEddie James * Return: return code of the operation 307d677bfe2SMiquel Raynal */ 308*d7869cecSEddie James u32 tpm1_continue_self_test(struct udevice *dev); 309d677bfe2SMiquel Raynal 310d677bfe2SMiquel Raynal /** 311d677bfe2SMiquel Raynal * Issue a TPM_NV_DefineSpace command. The implementation is limited 312d677bfe2SMiquel Raynal * to specify TPM_NV_ATTRIBUTES and size of the area. The area index 313d677bfe2SMiquel Raynal * could be one of the special value listed in enum tpm_nv_index. 314d677bfe2SMiquel Raynal * 315abdc7b8aSSimon Glass * @param dev TPM device 316d677bfe2SMiquel Raynal * @param index index of the area 317d677bfe2SMiquel Raynal * @param perm TPM_NV_ATTRIBUTES of the area 318d677bfe2SMiquel Raynal * @param size size of the area 319*d7869cecSEddie James * Return: return code of the operation 320d677bfe2SMiquel Raynal */ 321*d7869cecSEddie James u32 tpm1_nv_define_space(struct udevice *dev, u32 index, u32 perm, u32 size); 322d677bfe2SMiquel Raynal 323d677bfe2SMiquel Raynal /** 324d677bfe2SMiquel Raynal * Issue a TPM_NV_ReadValue command. This implementation is limited 325d677bfe2SMiquel Raynal * to read the area from offset 0. The area index could be one of 326d677bfe2SMiquel Raynal * the special value listed in enum tpm_nv_index. 327d677bfe2SMiquel Raynal * 328abdc7b8aSSimon Glass * @param dev TPM device 329d677bfe2SMiquel Raynal * @param index index of the area 330d677bfe2SMiquel Raynal * @param data output buffer of the area contents 331d677bfe2SMiquel Raynal * @param count size of output buffer 332*d7869cecSEddie James * Return: return code of the operation 333d677bfe2SMiquel Raynal */ 334*d7869cecSEddie James u32 tpm1_nv_read_value(struct udevice *dev, u32 index, void *data, u32 count); 335d677bfe2SMiquel Raynal 336d677bfe2SMiquel Raynal /** 337d677bfe2SMiquel Raynal * Issue a TPM_NV_WriteValue command. This implementation is limited 338d677bfe2SMiquel Raynal * to write the area from offset 0. The area index could be one of 339d677bfe2SMiquel Raynal * the special value listed in enum tpm_nv_index. 340d677bfe2SMiquel Raynal * 341abdc7b8aSSimon Glass * @param dev TPM device 342d677bfe2SMiquel Raynal * @param index index of the area 343d677bfe2SMiquel Raynal * @param data input buffer to be wrote to the area 344d677bfe2SMiquel Raynal * @param length length of data bytes of input buffer 345*d7869cecSEddie James * Return: return code of the operation 346d677bfe2SMiquel Raynal */ 347*d7869cecSEddie James u32 tpm1_nv_write_value(struct udevice *dev, u32 index, const void *data, 348abdc7b8aSSimon Glass u32 length); 349d677bfe2SMiquel Raynal 350d677bfe2SMiquel Raynal /** 351d677bfe2SMiquel Raynal * Issue a TPM_Extend command. 352d677bfe2SMiquel Raynal * 353abdc7b8aSSimon Glass * @param dev TPM device 354d677bfe2SMiquel Raynal * @param index index of the PCR 355d677bfe2SMiquel Raynal * @param in_digest 160-bit value representing the event to be 356d677bfe2SMiquel Raynal * recorded 357d677bfe2SMiquel Raynal * @param out_digest 160-bit PCR value after execution of the 358d677bfe2SMiquel Raynal * command 359*d7869cecSEddie James * Return: return code of the operation 360d677bfe2SMiquel Raynal */ 361*d7869cecSEddie James u32 tpm1_extend(struct udevice *dev, u32 index, const void *in_digest, 362abdc7b8aSSimon Glass void *out_digest); 363d677bfe2SMiquel Raynal 364d677bfe2SMiquel Raynal /** 365d677bfe2SMiquel Raynal * Issue a TPM_PCRRead command. 366d677bfe2SMiquel Raynal * 367abdc7b8aSSimon Glass * @param dev TPM device 368d677bfe2SMiquel Raynal * @param index index of the PCR 369d677bfe2SMiquel Raynal * @param data output buffer for contents of the named PCR 370d677bfe2SMiquel Raynal * @param count size of output buffer 371*d7869cecSEddie James * Return: return code of the operation 372d677bfe2SMiquel Raynal */ 373*d7869cecSEddie James u32 tpm1_pcr_read(struct udevice *dev, u32 index, void *data, size_t count); 374d677bfe2SMiquel Raynal 375d677bfe2SMiquel Raynal /** 376d677bfe2SMiquel Raynal * Issue a TSC_PhysicalPresence command. TPM physical presence flag 377d677bfe2SMiquel Raynal * is bit-wise OR'ed of flags listed in enum tpm_physical_presence. 378d677bfe2SMiquel Raynal * 379abdc7b8aSSimon Glass * @param dev TPM device 380d677bfe2SMiquel Raynal * @param presence TPM physical presence flag 381*d7869cecSEddie James * Return: return code of the operation 382d677bfe2SMiquel Raynal */ 383*d7869cecSEddie James u32 tpm1_tsc_physical_presence(struct udevice *dev, u16 presence); 384d677bfe2SMiquel Raynal 385d677bfe2SMiquel Raynal /** 386d677bfe2SMiquel Raynal * Issue a TPM_ReadPubek command. 387d677bfe2SMiquel Raynal * 388abdc7b8aSSimon Glass * @param dev TPM device 389d677bfe2SMiquel Raynal * @param data output buffer for the public endorsement key 390d677bfe2SMiquel Raynal * @param count size of output buffer 391*d7869cecSEddie James * Return: return code of the operation 392d677bfe2SMiquel Raynal */ 393*d7869cecSEddie James u32 tpm1_read_pubek(struct udevice *dev, void *data, size_t count); 394d677bfe2SMiquel Raynal 395d677bfe2SMiquel Raynal /** 396d677bfe2SMiquel Raynal * Issue a TPM_ForceClear command. 397d677bfe2SMiquel Raynal * 398abdc7b8aSSimon Glass * @param dev TPM device 399*d7869cecSEddie James * Return: return code of the operation 400d677bfe2SMiquel Raynal */ 401*d7869cecSEddie James u32 tpm1_force_clear(struct udevice *dev); 402d677bfe2SMiquel Raynal 403d677bfe2SMiquel Raynal /** 404d677bfe2SMiquel Raynal * Issue a TPM_PhysicalEnable command. 405d677bfe2SMiquel Raynal * 406abdc7b8aSSimon Glass * @param dev TPM device 407*d7869cecSEddie James * Return: return code of the operation 408d677bfe2SMiquel Raynal */ 409*d7869cecSEddie James u32 tpm1_physical_enable(struct udevice *dev); 410d677bfe2SMiquel Raynal 411d677bfe2SMiquel Raynal /** 412d677bfe2SMiquel Raynal * Issue a TPM_PhysicalDisable command. 413d677bfe2SMiquel Raynal * 414abdc7b8aSSimon Glass * @param dev TPM device 415*d7869cecSEddie James * Return: return code of the operation 416d677bfe2SMiquel Raynal */ 417*d7869cecSEddie James u32 tpm1_physical_disable(struct udevice *dev); 418d677bfe2SMiquel Raynal 419d677bfe2SMiquel Raynal /** 420d677bfe2SMiquel Raynal * Issue a TPM_PhysicalSetDeactivated command. 421d677bfe2SMiquel Raynal * 422abdc7b8aSSimon Glass * @param dev TPM device 423d677bfe2SMiquel Raynal * @param state boolean state of the deactivated flag 424*d7869cecSEddie James * Return: return code of the operation 425d677bfe2SMiquel Raynal */ 426*d7869cecSEddie James u32 tpm1_physical_set_deactivated(struct udevice *dev, u8 state); 427d677bfe2SMiquel Raynal 428d677bfe2SMiquel Raynal /** 429d677bfe2SMiquel Raynal * Issue a TPM_GetCapability command. This implementation is limited 430d677bfe2SMiquel Raynal * to query sub_cap index that is 4-byte wide. 431d677bfe2SMiquel Raynal * 432abdc7b8aSSimon Glass * @param dev TPM device 433d677bfe2SMiquel Raynal * @param cap_area partition of capabilities 434d677bfe2SMiquel Raynal * @param sub_cap further definition of capability, which is 435d677bfe2SMiquel Raynal * limited to be 4-byte wide 436d677bfe2SMiquel Raynal * @param cap output buffer for capability information 437d677bfe2SMiquel Raynal * @param count size of output buffer 438*d7869cecSEddie James * Return: return code of the operation 439d677bfe2SMiquel Raynal */ 440*d7869cecSEddie James u32 tpm1_get_capability(struct udevice *dev, u32 cap_area, u32 sub_cap, 441abdc7b8aSSimon Glass void *cap, size_t count); 442d677bfe2SMiquel Raynal 443d677bfe2SMiquel Raynal /** 444d677bfe2SMiquel Raynal * Issue a TPM_FlushSpecific command for a AUTH resource. 445d677bfe2SMiquel Raynal * 446abdc7b8aSSimon Glass * @param dev TPM device 447d677bfe2SMiquel Raynal * @param auth_handle handle of the auth session 448*d7869cecSEddie James * Return: return code of the operation 449d677bfe2SMiquel Raynal */ 450*d7869cecSEddie James u32 tpm1_terminate_auth_session(struct udevice *dev, u32 auth_handle); 451d677bfe2SMiquel Raynal 452d677bfe2SMiquel Raynal /** 453d677bfe2SMiquel Raynal * Issue a TPM_OIAP command to setup an object independent authorization 454d677bfe2SMiquel Raynal * session. 455d677bfe2SMiquel Raynal * Information about the session is stored internally. 456d677bfe2SMiquel Raynal * If there was already an OIAP session active it is terminated and a new 457d677bfe2SMiquel Raynal * session is set up. 458d677bfe2SMiquel Raynal * 459abdc7b8aSSimon Glass * @param dev TPM device 460d677bfe2SMiquel Raynal * @param auth_handle pointer to the (new) auth handle or NULL. 461*d7869cecSEddie James * Return: return code of the operation 462d677bfe2SMiquel Raynal */ 463*d7869cecSEddie James u32 tpm1_oiap(struct udevice *dev, u32 *auth_handle); 464d677bfe2SMiquel Raynal 465d677bfe2SMiquel Raynal /** 466d677bfe2SMiquel Raynal * Ends an active OIAP session. 467d677bfe2SMiquel Raynal * 468abdc7b8aSSimon Glass * @param dev TPM device 469*d7869cecSEddie James * Return: return code of the operation 470d677bfe2SMiquel Raynal */ 471*d7869cecSEddie James u32 tpm1_end_oiap(struct udevice *dev); 472d677bfe2SMiquel Raynal 473d677bfe2SMiquel Raynal /** 474d677bfe2SMiquel Raynal * Issue a TPM_LoadKey2 (Auth1) command using an OIAP session for authenticating 475d677bfe2SMiquel Raynal * the usage of the parent key. 476d677bfe2SMiquel Raynal * 477abdc7b8aSSimon Glass * @param dev TPM device 478d677bfe2SMiquel Raynal * @param parent_handle handle of the parent key. 479d677bfe2SMiquel Raynal * @param key pointer to the key structure (TPM_KEY or TPM_KEY12). 480d677bfe2SMiquel Raynal * @param key_length size of the key structure 481d677bfe2SMiquel Raynal * @param parent_key_usage_auth usage auth for the parent key 482d677bfe2SMiquel Raynal * @param key_handle pointer to the key handle 483*d7869cecSEddie James * Return: return code of the operation 484d677bfe2SMiquel Raynal */ 485*d7869cecSEddie James u32 tpm1_load_key2_oiap(struct udevice *dev, u32 parent_handle, const void *key, 486abdc7b8aSSimon Glass size_t key_length, const void *parent_key_usage_auth, 487abdc7b8aSSimon Glass u32 *key_handle); 488d677bfe2SMiquel Raynal 489d677bfe2SMiquel Raynal /** 490d677bfe2SMiquel Raynal * Issue a TPM_GetPubKey (Auth1) command using an OIAP session for 491d677bfe2SMiquel Raynal * authenticating the usage of the key. 492d677bfe2SMiquel Raynal * 493abdc7b8aSSimon Glass * @param dev TPM device 494d677bfe2SMiquel Raynal * @param key_handle handle of the key 495d677bfe2SMiquel Raynal * @param usage_auth usage auth for the key 496d677bfe2SMiquel Raynal * @param pubkey pointer to the pub key buffer; may be NULL if the pubkey 497d677bfe2SMiquel Raynal * should not be stored. 498d677bfe2SMiquel Raynal * @param pubkey_len pointer to the pub key buffer len. On entry: the size of 499d677bfe2SMiquel Raynal * the provided pubkey buffer. On successful exit: the size 500d677bfe2SMiquel Raynal * of the stored TPM_PUBKEY structure (iff pubkey != NULL). 501*d7869cecSEddie James * Return: return code of the operation 502d677bfe2SMiquel Raynal */ 503*d7869cecSEddie James u32 tpm1_get_pub_key_oiap(struct udevice *dev, u32 key_handle, 504abdc7b8aSSimon Glass const void *usage_auth, void *pubkey, 505d677bfe2SMiquel Raynal size_t *pubkey_len); 506d677bfe2SMiquel Raynal 507d677bfe2SMiquel Raynal /** 508d677bfe2SMiquel Raynal * Get the TPM permanent flags value 509d677bfe2SMiquel Raynal * 510abdc7b8aSSimon Glass * @param dev TPM device 511d677bfe2SMiquel Raynal * @param pflags Place to put permanent flags 512*d7869cecSEddie James * Return: return code of the operation 513d677bfe2SMiquel Raynal */ 514*d7869cecSEddie James u32 tpm1_get_permanent_flags(struct udevice *dev, 515abdc7b8aSSimon Glass struct tpm_permanent_flags *pflags); 516d677bfe2SMiquel Raynal 517d677bfe2SMiquel Raynal /** 518d677bfe2SMiquel Raynal * Get the TPM permissions 519d677bfe2SMiquel Raynal * 520abdc7b8aSSimon Glass * @param dev TPM device 521d677bfe2SMiquel Raynal * @param perm Returns permissions value 522*d7869cecSEddie James * Return: return code of the operation 523d677bfe2SMiquel Raynal */ 524*d7869cecSEddie James u32 tpm1_get_permissions(struct udevice *dev, u32 index, u32 *perm); 525d677bfe2SMiquel Raynal 526d677bfe2SMiquel Raynal /** 527d677bfe2SMiquel Raynal * Flush a resource with a given handle and type from the TPM 528d677bfe2SMiquel Raynal * 529abdc7b8aSSimon Glass * @param dev TPM device 530d677bfe2SMiquel Raynal * @param key_handle handle of the resource 531d677bfe2SMiquel Raynal * @param resource_type type of the resource 532*d7869cecSEddie James * Return: return code of the operation 533d677bfe2SMiquel Raynal */ 534*d7869cecSEddie James u32 tpm1_flush_specific(struct udevice *dev, u32 key_handle, u32 resource_type); 535d677bfe2SMiquel Raynal 536d677bfe2SMiquel Raynal #ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1 537d677bfe2SMiquel Raynal /** 538d677bfe2SMiquel Raynal * Search for a key by usage AuthData and the hash of the parent's pub key. 539d677bfe2SMiquel Raynal * 540abdc7b8aSSimon Glass * @param dev TPM device 541d677bfe2SMiquel Raynal * @param auth Usage auth of the key to search for 542d677bfe2SMiquel Raynal * @param pubkey_digest SHA1 hash of the pub key structure of the key 543d677bfe2SMiquel Raynal * @param[out] handle The handle of the key (Non-null iff found) 544*d7869cecSEddie James * Return: 0 if key was found in TPM; != 0 if not. 545d677bfe2SMiquel Raynal */ 546*d7869cecSEddie James u32 tpm1_find_key_sha1(struct udevice *dev, const u8 auth[20], 547abdc7b8aSSimon Glass const u8 pubkey_digest[20], u32 *handle); 548d677bfe2SMiquel Raynal #endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */ 549d677bfe2SMiquel Raynal 550d677bfe2SMiquel Raynal /** 551d677bfe2SMiquel Raynal * Read random bytes from the TPM RNG. The implementation deals with the fact 552d677bfe2SMiquel Raynal * that the TPM may legally return fewer bytes than requested by retrying 553d677bfe2SMiquel Raynal * until @p count bytes have been received. 554d677bfe2SMiquel Raynal * 555abdc7b8aSSimon Glass * @param dev TPM device 556d677bfe2SMiquel Raynal * @param data output buffer for the random bytes 557d677bfe2SMiquel Raynal * @param count size of output buffer 558*d7869cecSEddie James * Return: return code of the operation 559d677bfe2SMiquel Raynal */ 560*d7869cecSEddie James u32 tpm1_get_random(struct udevice *dev, void *data, u32 count); 561d677bfe2SMiquel Raynal 5626e64ec12SSimon Glass /** 5636e64ec12SSimon Glass * tpm_finalise_physical_presence() - Finalise physical presence 5646e64ec12SSimon Glass * 565abdc7b8aSSimon Glass * @param dev TPM device 566*d7869cecSEddie James * Return: return code of the operation (0 = success) 5676e64ec12SSimon Glass */ 568*d7869cecSEddie James u32 tpm1_finalise_physical_presence(struct udevice *dev); 5696e64ec12SSimon Glass 5706e64ec12SSimon Glass /** 571*d7869cecSEddie James * tpm_nv_enable_locking() - lock the non-volatile space 5726e64ec12SSimon Glass * 573abdc7b8aSSimon Glass * @param dev TPM device 574*d7869cecSEddie James * Return: return code of the operation (0 = success) 5756e64ec12SSimon Glass */ 576*d7869cecSEddie James u32 tpm1_nv_set_locked(struct udevice *dev); 5776e64ec12SSimon Glass 5786e64ec12SSimon Glass /** 5796e64ec12SSimon Glass * tpm_set_global_lock() - set the global lock 5806e64ec12SSimon Glass * 581abdc7b8aSSimon Glass * @param dev TPM device 582*d7869cecSEddie James * Return: return code of the operation (0 = success) 5836e64ec12SSimon Glass */ 584abdc7b8aSSimon Glass u32 tpm_set_global_lock(struct udevice *dev); 5856e64ec12SSimon Glass 5866e64ec12SSimon Glass /** 5876e64ec12SSimon Glass * tpm_resume() - start up the TPM from resume (after suspend) 5886e64ec12SSimon Glass * 589abdc7b8aSSimon Glass * @param dev TPM device 590*d7869cecSEddie James * Return: return code of the operation (0 = success) 5916e64ec12SSimon Glass */ 592*d7869cecSEddie James u32 tpm1_resume(struct udevice *dev); 5936e64ec12SSimon Glass 594d677bfe2SMiquel Raynal #endif /* __TPM_V1_H */ 595