1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 24678d674SMinkyu Kang /* 34678d674SMinkyu Kang * Copyright (C) 2005-2009 Samsung Electronics 44678d674SMinkyu Kang * Minkyu Kang <mk7.kang@samsung.com> 54678d674SMinkyu Kang * Kyungmin Park <kyungmin.park@samsung.com> 64678d674SMinkyu Kang */ 74678d674SMinkyu Kang 84678d674SMinkyu Kang #ifndef __SAMSUNG_ONENAND_H__ 94678d674SMinkyu Kang #define __SAMSUNG_ONENAND_H__ 104678d674SMinkyu Kang 114678d674SMinkyu Kang /* 124678d674SMinkyu Kang * OneNAND Controller 134678d674SMinkyu Kang */ 144678d674SMinkyu Kang 154678d674SMinkyu Kang #ifndef __ASSEMBLY__ 164678d674SMinkyu Kang struct samsung_onenand { 17f3807374SMinkyu Kang unsigned int mem_cfg; /* 0x0000 */ 184678d674SMinkyu Kang unsigned char res1[0xc]; 19f3807374SMinkyu Kang unsigned int burst_len; /* 0x0010 */ 204678d674SMinkyu Kang unsigned char res2[0xc]; 21f3807374SMinkyu Kang unsigned int mem_reset; /* 0x0020 */ 224678d674SMinkyu Kang unsigned char res3[0xc]; 23f3807374SMinkyu Kang unsigned int int_err_stat; /* 0x0030 */ 244678d674SMinkyu Kang unsigned char res4[0xc]; 25f3807374SMinkyu Kang unsigned int int_err_mask; /* 0x0040 */ 264678d674SMinkyu Kang unsigned char res5[0xc]; 27f3807374SMinkyu Kang unsigned int int_err_ack; /* 0x0050 */ 284678d674SMinkyu Kang unsigned char res6[0xc]; 29f3807374SMinkyu Kang unsigned int ecc_err_stat; /* 0x0060 */ 304678d674SMinkyu Kang unsigned char res7[0xc]; 31f3807374SMinkyu Kang unsigned int manufact_id; /* 0x0070 */ 324678d674SMinkyu Kang unsigned char res8[0xc]; 33f3807374SMinkyu Kang unsigned int device_id; /* 0x0080 */ 344678d674SMinkyu Kang unsigned char res9[0xc]; 35f3807374SMinkyu Kang unsigned int data_buf_size; /* 0x0090 */ 364678d674SMinkyu Kang unsigned char res10[0xc]; 37f3807374SMinkyu Kang unsigned int boot_buf_size; /* 0x00A0 */ 384678d674SMinkyu Kang unsigned char res11[0xc]; 39f3807374SMinkyu Kang unsigned int buf_amount; /* 0x00B0 */ 404678d674SMinkyu Kang unsigned char res12[0xc]; 41f3807374SMinkyu Kang unsigned int tech; /* 0x00C0 */ 424678d674SMinkyu Kang unsigned char res13[0xc]; 43f3807374SMinkyu Kang unsigned int fba; /* 0x00D0 */ 444678d674SMinkyu Kang unsigned char res14[0xc]; 45f3807374SMinkyu Kang unsigned int fpa; /* 0x00E0 */ 464678d674SMinkyu Kang unsigned char res15[0xc]; 47f3807374SMinkyu Kang unsigned int fsa; /* 0x00F0 */ 484678d674SMinkyu Kang unsigned char res16[0x3c]; 49f3807374SMinkyu Kang unsigned int sync_mode; /* 0x0130 */ 504678d674SMinkyu Kang unsigned char res17[0xc]; 51f3807374SMinkyu Kang unsigned int trans_spare; /* 0x0140 */ 524678d674SMinkyu Kang unsigned char res18[0x3c]; 53f3807374SMinkyu Kang unsigned int err_page_addr; /* 0x0180 */ 544678d674SMinkyu Kang unsigned char res19[0x1c]; 55f3807374SMinkyu Kang unsigned int int_pin_en; /* 0x01A0 */ 564678d674SMinkyu Kang unsigned char res20[0x1c]; 57f3807374SMinkyu Kang unsigned int acc_clock; /* 0x01C0 */ 584678d674SMinkyu Kang unsigned char res21[0x1c]; 59f3807374SMinkyu Kang unsigned int err_blk_addr; /* 0x01E0 */ 604678d674SMinkyu Kang unsigned char res22[0xc]; 61f3807374SMinkyu Kang unsigned int flash_ver_id; /* 0x01F0 */ 624678d674SMinkyu Kang unsigned char res23[0x6c]; 63f3807374SMinkyu Kang unsigned int watchdog_cnt_low; /* 0x0260 */ 644678d674SMinkyu Kang unsigned char res24[0xc]; 65f3807374SMinkyu Kang unsigned int watchdog_cnt_hi; /* 0x0270 */ 664678d674SMinkyu Kang unsigned char res25[0xc]; 67f3807374SMinkyu Kang unsigned int sync_write; /* 0x0280 */ 684678d674SMinkyu Kang unsigned char res26[0x1c]; 69f3807374SMinkyu Kang unsigned int cold_reset; /* 0x02A0 */ 704678d674SMinkyu Kang unsigned char res27[0xc]; 71f3807374SMinkyu Kang unsigned int ddp_device; /* 0x02B0 */ 724678d674SMinkyu Kang unsigned char res28[0xc]; 73f3807374SMinkyu Kang unsigned int multi_plane; /* 0x02C0 */ 744678d674SMinkyu Kang unsigned char res29[0x1c]; 75f3807374SMinkyu Kang unsigned int trans_mode; /* 0x02E0 */ 764678d674SMinkyu Kang unsigned char res30[0x1c]; 77f3807374SMinkyu Kang unsigned int ecc_err_stat2; /* 0x0300 */ 784678d674SMinkyu Kang unsigned char res31[0xc]; 79f3807374SMinkyu Kang unsigned int ecc_err_stat3; /* 0x0310 */ 804678d674SMinkyu Kang unsigned char res32[0xc]; 81f3807374SMinkyu Kang unsigned int ecc_err_stat4; /* 0x0320 */ 824678d674SMinkyu Kang unsigned char res33[0x1c]; 83f3807374SMinkyu Kang unsigned int dev_page_size; /* 0x0340 */ 844678d674SMinkyu Kang unsigned char res34[0x4c]; 85f3807374SMinkyu Kang unsigned int int_mon_status; /* 0x0390 */ 864678d674SMinkyu Kang }; 874678d674SMinkyu Kang #endif 884678d674SMinkyu Kang 894678d674SMinkyu Kang #define ONENAND_MEM_RESET_HOT 0x3 904678d674SMinkyu Kang #define ONENAND_MEM_RESET_COLD 0x2 914678d674SMinkyu Kang #define ONENAND_MEM_RESET_WARM 0x1 924678d674SMinkyu Kang 934678d674SMinkyu Kang #define INT_ERR_ALL 0x3fff 944678d674SMinkyu Kang #define CACHE_OP_ERR (1 << 13) 954678d674SMinkyu Kang #define RST_CMP (1 << 12) 964678d674SMinkyu Kang #define RDY_ACT (1 << 11) 974678d674SMinkyu Kang #define INT_ACT (1 << 10) 984678d674SMinkyu Kang #define UNSUP_CMD (1 << 9) 994678d674SMinkyu Kang #define LOCKED_BLK (1 << 8) 1004678d674SMinkyu Kang #define BLK_RW_CMP (1 << 7) 1014678d674SMinkyu Kang #define ERS_CMP (1 << 6) 1024678d674SMinkyu Kang #define PGM_CMP (1 << 5) 1034678d674SMinkyu Kang #define LOAD_CMP (1 << 4) 1044678d674SMinkyu Kang #define ERS_FAIL (1 << 3) 1054678d674SMinkyu Kang #define PGM_FAIL (1 << 2) 1064678d674SMinkyu Kang #define INT_TO (1 << 1) 1074678d674SMinkyu Kang #define LD_FAIL_ECC_ERR (1 << 0) 1084678d674SMinkyu Kang 1094678d674SMinkyu Kang #define TSRF (1 << 0) 1104678d674SMinkyu Kang 1114678d674SMinkyu Kang /* common initialize function */ 1124678d674SMinkyu Kang extern void s3c_onenand_init(struct mtd_info *); 1136b3967bbSLukasz Majewski extern int s5pc110_chip_probe(struct mtd_info *); 1146b3967bbSLukasz Majewski extern int s5pc210_chip_probe(struct mtd_info *); 1154678d674SMinkyu Kang 1164678d674SMinkyu Kang #endif 117