1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2cd9d2305SAnton Vorontsov /* 3cd9d2305SAnton Vorontsov * FSL UPM NAND driver 4cd9d2305SAnton Vorontsov * 5cd9d2305SAnton Vorontsov * Copyright (C) 2007 MontaVista Software, Inc. 6cd9d2305SAnton Vorontsov * Anton Vorontsov <avorontsov@ru.mvista.com> 7cd9d2305SAnton Vorontsov */ 8cd9d2305SAnton Vorontsov 9cd9d2305SAnton Vorontsov #ifndef __LINUX_MTD_NAND_FSL_UPM 10cd9d2305SAnton Vorontsov #define __LINUX_MTD_NAND_FSL_UPM 11cd9d2305SAnton Vorontsov 126ae3900aSMasahiro Yamada #include <linux/mtd/rawnand.h> 13cd9d2305SAnton Vorontsov 1433846df2SWolfgang Grandegger #define FSL_UPM_WAIT_RUN_PATTERN 0x1 1533846df2SWolfgang Grandegger #define FSL_UPM_WAIT_WRITE_BYTE 0x2 1633846df2SWolfgang Grandegger #define FSL_UPM_WAIT_WRITE_BUFFER 0x4 1733846df2SWolfgang Grandegger 18cd9d2305SAnton Vorontsov struct fsl_upm { 19cd9d2305SAnton Vorontsov void __iomem *mdr; 20cd9d2305SAnton Vorontsov void __iomem *mxmr; 21cd9d2305SAnton Vorontsov void __iomem *mar; 22cd9d2305SAnton Vorontsov void __iomem *io_addr; 23cd9d2305SAnton Vorontsov }; 24cd9d2305SAnton Vorontsov 25cd9d2305SAnton Vorontsov struct fsl_upm_nand { 26cd9d2305SAnton Vorontsov struct fsl_upm upm; 27cd9d2305SAnton Vorontsov 28cd9d2305SAnton Vorontsov int width; 29cd9d2305SAnton Vorontsov int upm_cmd_offset; 30cd9d2305SAnton Vorontsov int upm_addr_offset; 3106e9f7dfSWolfgang Grandegger int upm_mar_chip_offset; 3233846df2SWolfgang Grandegger int wait_flags; 33e93c1c16SWolfgang Grandegger int (*dev_ready)(int chip_nr); 34cd9d2305SAnton Vorontsov int chip_delay; 35e93c1c16SWolfgang Grandegger int chip_offset; 36e93c1c16SWolfgang Grandegger int chip_nr; 37e1c3dbadSAnton Vorontsov 38e1c3dbadSAnton Vorontsov /* no need to fill */ 39e1c3dbadSAnton Vorontsov int last_ctrl; 40cd9d2305SAnton Vorontsov }; 41cd9d2305SAnton Vorontsov 42cd9d2305SAnton Vorontsov extern int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun); 43cd9d2305SAnton Vorontsov 44cd9d2305SAnton Vorontsov #endif 45