10f89ba43Swdenk /* 2*72281c5cSChristophe Leroy * definitions for MPC8xxx I/O Ports 30f89ba43Swdenk * 40f89ba43Swdenk * Murray.Jensen@cmst.csiro.au, 20-Oct-00 50f89ba43Swdenk */ 60f89ba43Swdenk 70f89ba43Swdenk /* 80f89ba43Swdenk * this structure mirrors the layout of the five port registers in 9*72281c5cSChristophe Leroy * the internal memory map 100f89ba43Swdenk */ 110f89ba43Swdenk typedef struct { 120f89ba43Swdenk unsigned int pdir; /* Port Data Direction Register (35-3) */ 130f89ba43Swdenk unsigned int ppar; /* Port Pin Assignment Register (35-4) */ 140f89ba43Swdenk unsigned int psor; /* Port Special Options Register (35-5) */ 150f89ba43Swdenk unsigned int podr; /* Port Open Drain Register (35-2) */ 160f89ba43Swdenk unsigned int pdat; /* Port Data Register (35-3) */ 170f89ba43Swdenk } ioport_t; 180f89ba43Swdenk 190f89ba43Swdenk /* 200f89ba43Swdenk * this macro calculates the address within the internal 210f89ba43Swdenk * memory map (im) of the set of registers for a port (idx) 220f89ba43Swdenk * 230f89ba43Swdenk * the internal memory map aligns the above structure on 240f89ba43Swdenk * a 0x20 byte boundary 250f89ba43Swdenk */ 269c4c5ae3SJon Loeliger #ifdef CONFIG_MPC85xx 27aafeefbdSKumar Gala #define ioport_addr(im, idx) (ioport_t *)((uint)&(im->im_cpm_iop) + ((idx)*0x20)) 2842d1f039Swdenk #else 290f89ba43Swdenk #define ioport_addr(im, idx) (ioport_t *)((uint)&(im)->im_ioport + ((idx)*0x20)) 3042d1f039Swdenk #endif 310f89ba43Swdenk 320f89ba43Swdenk /* 330f89ba43Swdenk * this structure provides configuration 340f89ba43Swdenk * information for one port pin 350f89ba43Swdenk */ 360f89ba43Swdenk typedef struct { 370f89ba43Swdenk unsigned char conf:1; /* if 1, configure this port */ 380f89ba43Swdenk unsigned char ppar:1; /* Port Pin Assignment Register (35-4) */ 390f89ba43Swdenk unsigned char psor:1; /* Port Special Options Register (35-2) */ 400f89ba43Swdenk unsigned char pdir:1; /* Port Data Direction Register (35-3) */ 410f89ba43Swdenk unsigned char podr:1; /* Port Open Drain Register (35-2) */ 420f89ba43Swdenk unsigned char pdat:1; /* Port Data Register (35-2) */ 430f89ba43Swdenk } iop_conf_t; 440f89ba43Swdenk 450f89ba43Swdenk /* 460f89ba43Swdenk * a table that contains configuration information for all 32 pins 470f89ba43Swdenk * 480f89ba43Swdenk * NOTE: in the second dimension of this table, index 0 refers to pin 31 490f89ba43Swdenk * and index 31 refers to pin 0. this made the code in the table look more 500f89ba43Swdenk * like the table in the 8260UM (and in the hymod manuals). 510f89ba43Swdenk */ 520f89ba43Swdenk extern const iop_conf_t iop_conf_tab[4][32]; 537737d5c6SDave Liu 547737d5c6SDave Liu typedef struct { 557737d5c6SDave Liu unsigned char port; 567737d5c6SDave Liu unsigned char pin; 577737d5c6SDave Liu int dir; 587737d5c6SDave Liu int open_drain; 597737d5c6SDave Liu int assign; 607737d5c6SDave Liu } qe_iop_conf_t; 617737d5c6SDave Liu 627737d5c6SDave Liu #define QE_IOP_TAB_END (-1) 63