1c3691392SSimon Glass /* 2c3691392SSimon Glass * This header provides constants for binding nvidia,tegra114-car. 3c3691392SSimon Glass * 4c3691392SSimon Glass * The first 160 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB 5c3691392SSimon Glass * registers. These IDs often match those in the CAR's RST_DEVICES registers, 6c3691392SSimon Glass * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In 7c3691392SSimon Glass * this case, those clocks are assigned IDs above 160 in order to highlight 8c3691392SSimon Glass * this issue. Implementations that interpret these clock IDs as bit values 9c3691392SSimon Glass * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to 10c3691392SSimon Glass * explicitly handle these special cases. 11c3691392SSimon Glass * 12c3691392SSimon Glass * The balance of the clocks controlled by the CAR are assigned IDs of 160 and 13c3691392SSimon Glass * above. 14c3691392SSimon Glass */ 15c3691392SSimon Glass 16c3691392SSimon Glass #ifndef _DT_BINDINGS_CLOCK_TEGRA114_CAR_H 17c3691392SSimon Glass #define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H 18c3691392SSimon Glass 19c3691392SSimon Glass /* 0 */ 20c3691392SSimon Glass /* 1 */ 21c3691392SSimon Glass /* 2 */ 22c3691392SSimon Glass /* 3 */ 23c3691392SSimon Glass #define TEGRA114_CLK_RTC 4 24c3691392SSimon Glass #define TEGRA114_CLK_TIMER 5 25c3691392SSimon Glass #define TEGRA114_CLK_UARTA 6 26c3691392SSimon Glass /* 7 (register bit affects uartb and vfir) */ 27c3691392SSimon Glass /* 8 */ 28c3691392SSimon Glass #define TEGRA114_CLK_SDMMC2 9 29c3691392SSimon Glass /* 10 (register bit affects spdif_in and spdif_out) */ 30c3691392SSimon Glass #define TEGRA114_CLK_I2S1 11 31c3691392SSimon Glass #define TEGRA114_CLK_I2C1 12 32c3691392SSimon Glass #define TEGRA114_CLK_NDFLASH 13 33c3691392SSimon Glass #define TEGRA114_CLK_SDMMC1 14 34c3691392SSimon Glass #define TEGRA114_CLK_SDMMC4 15 35c3691392SSimon Glass /* 16 */ 36c3691392SSimon Glass #define TEGRA114_CLK_PWM 17 37c3691392SSimon Glass #define TEGRA114_CLK_I2S2 18 38c3691392SSimon Glass #define TEGRA114_CLK_EPP 19 39c3691392SSimon Glass /* 20 (register bit affects vi and vi_sensor) */ 40c3691392SSimon Glass #define TEGRA114_CLK_GR2D 21 41c3691392SSimon Glass #define TEGRA114_CLK_USBD 22 42c3691392SSimon Glass #define TEGRA114_CLK_ISP 23 43c3691392SSimon Glass #define TEGRA114_CLK_GR3D 24 44c3691392SSimon Glass /* 25 */ 45c3691392SSimon Glass #define TEGRA114_CLK_DISP2 26 46c3691392SSimon Glass #define TEGRA114_CLK_DISP1 27 47c3691392SSimon Glass #define TEGRA114_CLK_HOST1X 28 48c3691392SSimon Glass #define TEGRA114_CLK_VCP 29 49c3691392SSimon Glass #define TEGRA114_CLK_I2S0 30 50c3691392SSimon Glass /* 31 */ 51c3691392SSimon Glass 52*5c31e7abSStephen Warren #define TEGRA114_CLK_MC 32 53c3691392SSimon Glass /* 33 */ 54c3691392SSimon Glass #define TEGRA114_CLK_APBDMA 34 55c3691392SSimon Glass /* 35 */ 56c3691392SSimon Glass #define TEGRA114_CLK_KBC 36 57c3691392SSimon Glass /* 37 */ 58c3691392SSimon Glass /* 38 */ 59c3691392SSimon Glass /* 39 (register bit affects fuse and fuse_burn) */ 60c3691392SSimon Glass #define TEGRA114_CLK_KFUSE 40 61c3691392SSimon Glass #define TEGRA114_CLK_SBC1 41 62c3691392SSimon Glass #define TEGRA114_CLK_NOR 42 63c3691392SSimon Glass /* 43 */ 64c3691392SSimon Glass #define TEGRA114_CLK_SBC2 44 65c3691392SSimon Glass /* 45 */ 66c3691392SSimon Glass #define TEGRA114_CLK_SBC3 46 67c3691392SSimon Glass #define TEGRA114_CLK_I2C5 47 68c3691392SSimon Glass #define TEGRA114_CLK_DSIA 48 69c3691392SSimon Glass /* 49 */ 70c3691392SSimon Glass #define TEGRA114_CLK_MIPI 50 71c3691392SSimon Glass #define TEGRA114_CLK_HDMI 51 72c3691392SSimon Glass #define TEGRA114_CLK_CSI 52 73c3691392SSimon Glass /* 53 */ 74c3691392SSimon Glass #define TEGRA114_CLK_I2C2 54 75c3691392SSimon Glass #define TEGRA114_CLK_UARTC 55 76c3691392SSimon Glass #define TEGRA114_CLK_MIPI_CAL 56 77c3691392SSimon Glass #define TEGRA114_CLK_EMC 57 78c3691392SSimon Glass #define TEGRA114_CLK_USB2 58 79c3691392SSimon Glass #define TEGRA114_CLK_USB3 59 80c3691392SSimon Glass /* 60 */ 81c3691392SSimon Glass #define TEGRA114_CLK_VDE 61 82c3691392SSimon Glass #define TEGRA114_CLK_BSEA 62 83c3691392SSimon Glass #define TEGRA114_CLK_BSEV 63 84c3691392SSimon Glass 85c3691392SSimon Glass /* 64 */ 86c3691392SSimon Glass #define TEGRA114_CLK_UARTD 65 87c3691392SSimon Glass /* 66 */ 88c3691392SSimon Glass #define TEGRA114_CLK_I2C3 67 89c3691392SSimon Glass #define TEGRA114_CLK_SBC4 68 90c3691392SSimon Glass #define TEGRA114_CLK_SDMMC3 69 91c3691392SSimon Glass /* 70 */ 92c3691392SSimon Glass #define TEGRA114_CLK_OWR 71 93c3691392SSimon Glass /* 72 */ 94c3691392SSimon Glass #define TEGRA114_CLK_CSITE 73 95c3691392SSimon Glass /* 74 */ 96c3691392SSimon Glass /* 75 */ 97c3691392SSimon Glass #define TEGRA114_CLK_LA 76 98c3691392SSimon Glass #define TEGRA114_CLK_TRACE 77 99c3691392SSimon Glass #define TEGRA114_CLK_SOC_THERM 78 100c3691392SSimon Glass #define TEGRA114_CLK_DTV 79 101c3691392SSimon Glass #define TEGRA114_CLK_NDSPEED 80 102c3691392SSimon Glass #define TEGRA114_CLK_I2CSLOW 81 103c3691392SSimon Glass #define TEGRA114_CLK_DSIB 82 104c3691392SSimon Glass #define TEGRA114_CLK_TSEC 83 105c3691392SSimon Glass /* 84 */ 106c3691392SSimon Glass /* 85 */ 107c3691392SSimon Glass /* 86 */ 108c3691392SSimon Glass /* 87 */ 109c3691392SSimon Glass /* 88 */ 110c3691392SSimon Glass #define TEGRA114_CLK_XUSB_HOST 89 111c3691392SSimon Glass /* 90 */ 112c3691392SSimon Glass #define TEGRA114_CLK_MSENC 91 113c3691392SSimon Glass #define TEGRA114_CLK_CSUS 92 114c3691392SSimon Glass /* 93 */ 115c3691392SSimon Glass /* 94 */ 116c3691392SSimon Glass /* 95 (bit affects xusb_dev and xusb_dev_src) */ 117c3691392SSimon Glass 118c3691392SSimon Glass /* 96 */ 119c3691392SSimon Glass /* 97 */ 120c3691392SSimon Glass /* 98 */ 121c3691392SSimon Glass #define TEGRA114_CLK_MSELECT 99 122c3691392SSimon Glass #define TEGRA114_CLK_TSENSOR 100 123c3691392SSimon Glass #define TEGRA114_CLK_I2S3 101 124c3691392SSimon Glass #define TEGRA114_CLK_I2S4 102 125c3691392SSimon Glass #define TEGRA114_CLK_I2C4 103 126c3691392SSimon Glass #define TEGRA114_CLK_SBC5 104 127c3691392SSimon Glass #define TEGRA114_CLK_SBC6 105 128c3691392SSimon Glass #define TEGRA114_CLK_D_AUDIO 106 129c3691392SSimon Glass #define TEGRA114_CLK_APBIF 107 130c3691392SSimon Glass #define TEGRA114_CLK_DAM0 108 131c3691392SSimon Glass #define TEGRA114_CLK_DAM1 109 132c3691392SSimon Glass #define TEGRA114_CLK_DAM2 110 133c3691392SSimon Glass #define TEGRA114_CLK_HDA2CODEC_2X 111 134c3691392SSimon Glass /* 112 */ 135c3691392SSimon Glass #define TEGRA114_CLK_AUDIO0_2X 113 136c3691392SSimon Glass #define TEGRA114_CLK_AUDIO1_2X 114 137c3691392SSimon Glass #define TEGRA114_CLK_AUDIO2_2X 115 138c3691392SSimon Glass #define TEGRA114_CLK_AUDIO3_2X 116 139c3691392SSimon Glass #define TEGRA114_CLK_AUDIO4_2X 117 140c3691392SSimon Glass #define TEGRA114_CLK_SPDIF_2X 118 141c3691392SSimon Glass #define TEGRA114_CLK_ACTMON 119 142c3691392SSimon Glass #define TEGRA114_CLK_EXTERN1 120 143c3691392SSimon Glass #define TEGRA114_CLK_EXTERN2 121 144c3691392SSimon Glass #define TEGRA114_CLK_EXTERN3 122 145c3691392SSimon Glass /* 123 */ 146c3691392SSimon Glass /* 124 */ 147c3691392SSimon Glass #define TEGRA114_CLK_HDA 125 148c3691392SSimon Glass /* 126 */ 149c3691392SSimon Glass #define TEGRA114_CLK_SE 127 150c3691392SSimon Glass 151c3691392SSimon Glass #define TEGRA114_CLK_HDA2HDMI 128 152c3691392SSimon Glass /* 129 */ 153c3691392SSimon Glass /* 130 */ 154c3691392SSimon Glass /* 131 */ 155c3691392SSimon Glass /* 132 */ 156c3691392SSimon Glass /* 133 */ 157c3691392SSimon Glass /* 134 */ 158c3691392SSimon Glass /* 135 */ 159c3691392SSimon Glass /* 136 */ 160c3691392SSimon Glass /* 137 */ 161c3691392SSimon Glass /* 138 */ 162c3691392SSimon Glass /* 139 */ 163c3691392SSimon Glass /* 140 */ 164c3691392SSimon Glass /* 141 */ 165c3691392SSimon Glass /* 142 */ 166c3691392SSimon Glass /* 143 (bit affects xusb_falcon_src, xusb_fs_src, */ 167c3691392SSimon Glass /* xusb_host_src and xusb_ss_src) */ 168c3691392SSimon Glass #define TEGRA114_CLK_CILAB 144 169c3691392SSimon Glass #define TEGRA114_CLK_CILCD 145 170c3691392SSimon Glass #define TEGRA114_CLK_CILE 146 171c3691392SSimon Glass #define TEGRA114_CLK_DSIALP 147 172c3691392SSimon Glass #define TEGRA114_CLK_DSIBLP 148 173c3691392SSimon Glass /* 149 */ 174c3691392SSimon Glass #define TEGRA114_CLK_DDS 150 175c3691392SSimon Glass /* 151 */ 176c3691392SSimon Glass #define TEGRA114_CLK_DP2 152 177c3691392SSimon Glass #define TEGRA114_CLK_AMX 153 178c3691392SSimon Glass #define TEGRA114_CLK_ADX 154 179c3691392SSimon Glass /* 155 (bit affects dfll_ref and dfll_soc) */ 180c3691392SSimon Glass #define TEGRA114_CLK_XUSB_SS 156 181c3691392SSimon Glass /* 157 */ 182c3691392SSimon Glass /* 158 */ 183c3691392SSimon Glass /* 159 */ 184c3691392SSimon Glass 185c3691392SSimon Glass /* 160 */ 186c3691392SSimon Glass /* 161 */ 187c3691392SSimon Glass /* 162 */ 188c3691392SSimon Glass /* 163 */ 189c3691392SSimon Glass /* 164 */ 190c3691392SSimon Glass /* 165 */ 191c3691392SSimon Glass /* 166 */ 192c3691392SSimon Glass /* 167 */ 193c3691392SSimon Glass /* 168 */ 194c3691392SSimon Glass /* 169 */ 195c3691392SSimon Glass /* 170 */ 196c3691392SSimon Glass /* 171 */ 197c3691392SSimon Glass /* 172 */ 198c3691392SSimon Glass /* 173 */ 199c3691392SSimon Glass /* 174 */ 200c3691392SSimon Glass /* 175 */ 201c3691392SSimon Glass /* 176 */ 202c3691392SSimon Glass /* 177 */ 203c3691392SSimon Glass /* 178 */ 204c3691392SSimon Glass /* 179 */ 205c3691392SSimon Glass /* 180 */ 206c3691392SSimon Glass /* 181 */ 207c3691392SSimon Glass /* 182 */ 208c3691392SSimon Glass /* 183 */ 209c3691392SSimon Glass /* 184 */ 210c3691392SSimon Glass /* 185 */ 211c3691392SSimon Glass /* 186 */ 212c3691392SSimon Glass /* 187 */ 213c3691392SSimon Glass /* 188 */ 214c3691392SSimon Glass /* 189 */ 215c3691392SSimon Glass /* 190 */ 216c3691392SSimon Glass /* 191 */ 217c3691392SSimon Glass 218c3691392SSimon Glass #define TEGRA114_CLK_UARTB 192 219c3691392SSimon Glass #define TEGRA114_CLK_VFIR 193 220c3691392SSimon Glass #define TEGRA114_CLK_SPDIF_IN 194 221c3691392SSimon Glass #define TEGRA114_CLK_SPDIF_OUT 195 222c3691392SSimon Glass #define TEGRA114_CLK_VI 196 223c3691392SSimon Glass #define TEGRA114_CLK_VI_SENSOR 197 224c3691392SSimon Glass #define TEGRA114_CLK_FUSE 198 225c3691392SSimon Glass #define TEGRA114_CLK_FUSE_BURN 199 226c3691392SSimon Glass #define TEGRA114_CLK_CLK_32K 200 227c3691392SSimon Glass #define TEGRA114_CLK_CLK_M 201 228c3691392SSimon Glass #define TEGRA114_CLK_CLK_M_DIV2 202 229c3691392SSimon Glass #define TEGRA114_CLK_CLK_M_DIV4 203 230c3691392SSimon Glass #define TEGRA114_CLK_PLL_REF 204 231c3691392SSimon Glass #define TEGRA114_CLK_PLL_C 205 232c3691392SSimon Glass #define TEGRA114_CLK_PLL_C_OUT1 206 233c3691392SSimon Glass #define TEGRA114_CLK_PLL_C2 207 234c3691392SSimon Glass #define TEGRA114_CLK_PLL_C3 208 235c3691392SSimon Glass #define TEGRA114_CLK_PLL_M 209 236c3691392SSimon Glass #define TEGRA114_CLK_PLL_M_OUT1 210 237c3691392SSimon Glass #define TEGRA114_CLK_PLL_P 211 238c3691392SSimon Glass #define TEGRA114_CLK_PLL_P_OUT1 212 239c3691392SSimon Glass #define TEGRA114_CLK_PLL_P_OUT2 213 240c3691392SSimon Glass #define TEGRA114_CLK_PLL_P_OUT3 214 241c3691392SSimon Glass #define TEGRA114_CLK_PLL_P_OUT4 215 242c3691392SSimon Glass #define TEGRA114_CLK_PLL_A 216 243c3691392SSimon Glass #define TEGRA114_CLK_PLL_A_OUT0 217 244c3691392SSimon Glass #define TEGRA114_CLK_PLL_D 218 245c3691392SSimon Glass #define TEGRA114_CLK_PLL_D_OUT0 219 246c3691392SSimon Glass #define TEGRA114_CLK_PLL_D2 220 247c3691392SSimon Glass #define TEGRA114_CLK_PLL_D2_OUT0 221 248c3691392SSimon Glass #define TEGRA114_CLK_PLL_U 222 249c3691392SSimon Glass #define TEGRA114_CLK_PLL_U_480M 223 250c3691392SSimon Glass 251c3691392SSimon Glass #define TEGRA114_CLK_PLL_U_60M 224 252c3691392SSimon Glass #define TEGRA114_CLK_PLL_U_48M 225 253c3691392SSimon Glass #define TEGRA114_CLK_PLL_U_12M 226 254c3691392SSimon Glass #define TEGRA114_CLK_PLL_X 227 255c3691392SSimon Glass #define TEGRA114_CLK_PLL_X_OUT0 228 256c3691392SSimon Glass #define TEGRA114_CLK_PLL_RE_VCO 229 257c3691392SSimon Glass #define TEGRA114_CLK_PLL_RE_OUT 230 258c3691392SSimon Glass #define TEGRA114_CLK_PLL_E_OUT0 231 259c3691392SSimon Glass #define TEGRA114_CLK_SPDIF_IN_SYNC 232 260c3691392SSimon Glass #define TEGRA114_CLK_I2S0_SYNC 233 261c3691392SSimon Glass #define TEGRA114_CLK_I2S1_SYNC 234 262c3691392SSimon Glass #define TEGRA114_CLK_I2S2_SYNC 235 263c3691392SSimon Glass #define TEGRA114_CLK_I2S3_SYNC 236 264c3691392SSimon Glass #define TEGRA114_CLK_I2S4_SYNC 237 265c3691392SSimon Glass #define TEGRA114_CLK_VIMCLK_SYNC 238 266c3691392SSimon Glass #define TEGRA114_CLK_AUDIO0 239 267c3691392SSimon Glass #define TEGRA114_CLK_AUDIO1 240 268c3691392SSimon Glass #define TEGRA114_CLK_AUDIO2 241 269c3691392SSimon Glass #define TEGRA114_CLK_AUDIO3 242 270c3691392SSimon Glass #define TEGRA114_CLK_AUDIO4 243 271c3691392SSimon Glass #define TEGRA114_CLK_SPDIF 244 272c3691392SSimon Glass #define TEGRA114_CLK_CLK_OUT_1 245 273c3691392SSimon Glass #define TEGRA114_CLK_CLK_OUT_2 246 274c3691392SSimon Glass #define TEGRA114_CLK_CLK_OUT_3 247 275c3691392SSimon Glass #define TEGRA114_CLK_BLINK 248 276c3691392SSimon Glass /* 249 */ 277c3691392SSimon Glass /* 250 */ 278c3691392SSimon Glass /* 251 */ 279c3691392SSimon Glass #define TEGRA114_CLK_XUSB_HOST_SRC 252 280c3691392SSimon Glass #define TEGRA114_CLK_XUSB_FALCON_SRC 253 281c3691392SSimon Glass #define TEGRA114_CLK_XUSB_FS_SRC 254 282c3691392SSimon Glass #define TEGRA114_CLK_XUSB_SS_SRC 255 283c3691392SSimon Glass 284c3691392SSimon Glass #define TEGRA114_CLK_XUSB_DEV_SRC 256 285c3691392SSimon Glass #define TEGRA114_CLK_XUSB_DEV 257 286c3691392SSimon Glass #define TEGRA114_CLK_XUSB_HS_SRC 258 287c3691392SSimon Glass #define TEGRA114_CLK_SCLK 259 288c3691392SSimon Glass #define TEGRA114_CLK_HCLK 260 289c3691392SSimon Glass #define TEGRA114_CLK_PCLK 261 290c3691392SSimon Glass #define TEGRA114_CLK_CCLK_G 262 291c3691392SSimon Glass #define TEGRA114_CLK_CCLK_LP 263 292c3691392SSimon Glass #define TEGRA114_CLK_DFLL_REF 264 293c3691392SSimon Glass #define TEGRA114_CLK_DFLL_SOC 265 294c3691392SSimon Glass /* 266 */ 295c3691392SSimon Glass /* 267 */ 296c3691392SSimon Glass /* 268 */ 297c3691392SSimon Glass /* 269 */ 298c3691392SSimon Glass /* 270 */ 299c3691392SSimon Glass /* 271 */ 300c3691392SSimon Glass /* 272 */ 301c3691392SSimon Glass /* 273 */ 302c3691392SSimon Glass /* 274 */ 303c3691392SSimon Glass /* 275 */ 304c3691392SSimon Glass /* 276 */ 305c3691392SSimon Glass /* 277 */ 306c3691392SSimon Glass /* 278 */ 307c3691392SSimon Glass /* 279 */ 308c3691392SSimon Glass /* 280 */ 309c3691392SSimon Glass /* 281 */ 310c3691392SSimon Glass /* 282 */ 311c3691392SSimon Glass /* 283 */ 312c3691392SSimon Glass /* 284 */ 313c3691392SSimon Glass /* 285 */ 314c3691392SSimon Glass /* 286 */ 315c3691392SSimon Glass /* 287 */ 316c3691392SSimon Glass 317c3691392SSimon Glass /* 288 */ 318c3691392SSimon Glass /* 289 */ 319c3691392SSimon Glass /* 290 */ 320c3691392SSimon Glass /* 291 */ 321c3691392SSimon Glass /* 292 */ 322c3691392SSimon Glass /* 293 */ 323c3691392SSimon Glass /* 294 */ 324c3691392SSimon Glass /* 295 */ 325c3691392SSimon Glass /* 296 */ 326c3691392SSimon Glass /* 297 */ 327c3691392SSimon Glass /* 298 */ 328c3691392SSimon Glass /* 299 */ 329c3691392SSimon Glass #define TEGRA114_CLK_AUDIO0_MUX 300 330c3691392SSimon Glass #define TEGRA114_CLK_AUDIO1_MUX 301 331c3691392SSimon Glass #define TEGRA114_CLK_AUDIO2_MUX 302 332c3691392SSimon Glass #define TEGRA114_CLK_AUDIO3_MUX 303 333c3691392SSimon Glass #define TEGRA114_CLK_AUDIO4_MUX 304 334c3691392SSimon Glass #define TEGRA114_CLK_SPDIF_MUX 305 335c3691392SSimon Glass #define TEGRA114_CLK_CLK_OUT_1_MUX 306 336c3691392SSimon Glass #define TEGRA114_CLK_CLK_OUT_2_MUX 307 337c3691392SSimon Glass #define TEGRA114_CLK_CLK_OUT_3_MUX 308 338c3691392SSimon Glass #define TEGRA114_CLK_DSIA_MUX 309 339c3691392SSimon Glass #define TEGRA114_CLK_DSIB_MUX 310 340*5c31e7abSStephen Warren #define TEGRA114_CLK_XUSB_SS_DIV2 311 341*5c31e7abSStephen Warren #define TEGRA114_CLK_CLK_MAX 312 342c3691392SSimon Glass 343c3691392SSimon Glass #endif /* _DT_BINDINGS_CLOCK_TEGRA114_CAR_H */ 344