1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2412ae53aSAlbert ARIBAUD \(3ADEV\) /* 3412ae53aSAlbert ARIBAUD \(3ADEV\) * WORK Microwave work_92105 board configuration file 4412ae53aSAlbert ARIBAUD \(3ADEV\) * 5412ae53aSAlbert ARIBAUD \(3ADEV\) * (C) Copyright 2014 DENX Software Engineering GmbH 6412ae53aSAlbert ARIBAUD \(3ADEV\) * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> 7412ae53aSAlbert ARIBAUD \(3ADEV\) */ 8412ae53aSAlbert ARIBAUD \(3ADEV\) 9412ae53aSAlbert ARIBAUD \(3ADEV\) #ifndef __CONFIG_WORK_92105_H__ 10412ae53aSAlbert ARIBAUD \(3ADEV\) #define __CONFIG_WORK_92105_H__ 11412ae53aSAlbert ARIBAUD \(3ADEV\) 12412ae53aSAlbert ARIBAUD \(3ADEV\) /* SoC and board defines */ 13412ae53aSAlbert ARIBAUD \(3ADEV\) #include <linux/sizes.h> 14412ae53aSAlbert ARIBAUD \(3ADEV\) #include <asm/arch/cpu.h> 15412ae53aSAlbert ARIBAUD \(3ADEV\) 16412ae53aSAlbert ARIBAUD \(3ADEV\) /* 17412ae53aSAlbert ARIBAUD \(3ADEV\) * Define work_92105 machine type by hand -- done only for compatibility 18412ae53aSAlbert ARIBAUD \(3ADEV\) * with original board code 19412ae53aSAlbert ARIBAUD \(3ADEV\) */ 20cd7b6344STom Rini #define CONFIG_MACH_TYPE 736 21412ae53aSAlbert ARIBAUD \(3ADEV\) 22412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_ICACHE_OFF 23412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_DCACHE_OFF 24412ae53aSAlbert ARIBAUD \(3ADEV\) #if !defined(CONFIG_SPL_BUILD) 25412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SKIP_LOWLEVEL_INIT 26412ae53aSAlbert ARIBAUD \(3ADEV\) #endif 27412ae53aSAlbert ARIBAUD \(3ADEV\) 28412ae53aSAlbert ARIBAUD \(3ADEV\) /* 29412ae53aSAlbert ARIBAUD \(3ADEV\) * Memory configurations 30412ae53aSAlbert ARIBAUD \(3ADEV\) */ 31412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_MALLOC_LEN SZ_1M 32412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE 33412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_SDRAM_SIZE SZ_128M 34412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) 35412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) 36412ae53aSAlbert ARIBAUD \(3ADEV\) 37412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) 38412ae53aSAlbert ARIBAUD \(3ADEV\) 39412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ 40412ae53aSAlbert ARIBAUD \(3ADEV\) - GENERATED_GBL_DATA_SIZE) 41412ae53aSAlbert ARIBAUD \(3ADEV\) 42412ae53aSAlbert ARIBAUD \(3ADEV\) /* 43412ae53aSAlbert ARIBAUD \(3ADEV\) * Serial Driver 44412ae53aSAlbert ARIBAUD \(3ADEV\) */ 45412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_LPC32XX_UART 5 /* UART5 - NS16550 */ 46412ae53aSAlbert ARIBAUD \(3ADEV\) 47412ae53aSAlbert ARIBAUD \(3ADEV\) /* 48412ae53aSAlbert ARIBAUD \(3ADEV\) * Ethernet Driver 49412ae53aSAlbert ARIBAUD \(3ADEV\) */ 50412ae53aSAlbert ARIBAUD \(3ADEV\) 51412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_PHY_SMSC 52412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_ETH 53412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 54412ae53aSAlbert ARIBAUD \(3ADEV\) /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ 55412ae53aSAlbert ARIBAUD \(3ADEV\) 56412ae53aSAlbert ARIBAUD \(3ADEV\) /* 57412ae53aSAlbert ARIBAUD \(3ADEV\) * I2C driver 58412ae53aSAlbert ARIBAUD \(3ADEV\) */ 59412ae53aSAlbert ARIBAUD \(3ADEV\) 60412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_I2C_LPC32XX 61412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_I2C 62412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_I2C_SPEED 350000 63412ae53aSAlbert ARIBAUD \(3ADEV\) 64412ae53aSAlbert ARIBAUD \(3ADEV\) /* 65412ae53aSAlbert ARIBAUD \(3ADEV\) * I2C EEPROM 66412ae53aSAlbert ARIBAUD \(3ADEV\) */ 67412ae53aSAlbert ARIBAUD \(3ADEV\) 68412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 69412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 70412ae53aSAlbert ARIBAUD \(3ADEV\) 71412ae53aSAlbert ARIBAUD \(3ADEV\) /* 72412ae53aSAlbert ARIBAUD \(3ADEV\) * I2C RTC 73412ae53aSAlbert ARIBAUD \(3ADEV\) */ 74412ae53aSAlbert ARIBAUD \(3ADEV\) 75412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_RTC_DS1374 76412ae53aSAlbert ARIBAUD \(3ADEV\) 77412ae53aSAlbert ARIBAUD \(3ADEV\) /* 78412ae53aSAlbert ARIBAUD \(3ADEV\) * U-Boot General Configurations 79412ae53aSAlbert ARIBAUD \(3ADEV\) */ 80412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_CBSIZE 1024 81412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 82412ae53aSAlbert ARIBAUD \(3ADEV\) 83412ae53aSAlbert ARIBAUD \(3ADEV\) /* 84412ae53aSAlbert ARIBAUD \(3ADEV\) * NAND chip timings for FIXME: which one? 85412ae53aSAlbert ARIBAUD \(3ADEV\) */ 86412ae53aSAlbert ARIBAUD \(3ADEV\) 87412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 88412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 89412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818 90412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 91412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 92412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 93412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 94412ae53aSAlbert ARIBAUD \(3ADEV\) 95412ae53aSAlbert ARIBAUD \(3ADEV\) /* 96412ae53aSAlbert ARIBAUD \(3ADEV\) * NAND 97412ae53aSAlbert ARIBAUD \(3ADEV\) */ 98412ae53aSAlbert ARIBAUD \(3ADEV\) 99412ae53aSAlbert ARIBAUD \(3ADEV\) /* driver configuration */ 100412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_NAND_SELF_INIT 101412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_MAX_NAND_DEVICE 1 102412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_MAX_NAND_CHIPS 1 103412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE 104412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_NAND_LPC32XX_MLC 105412ae53aSAlbert ARIBAUD \(3ADEV\) 106412ae53aSAlbert ARIBAUD \(3ADEV\) /* 107412ae53aSAlbert ARIBAUD \(3ADEV\) * GPIO 108412ae53aSAlbert ARIBAUD \(3ADEV\) */ 109412ae53aSAlbert ARIBAUD \(3ADEV\) 110412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_GPIO 111412ae53aSAlbert ARIBAUD \(3ADEV\) 112412ae53aSAlbert ARIBAUD \(3ADEV\) /* 113412ae53aSAlbert ARIBAUD \(3ADEV\) * SSP/SPI/DISPLAY 114412ae53aSAlbert ARIBAUD \(3ADEV\) */ 115412ae53aSAlbert ARIBAUD \(3ADEV\) 116412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LPC32XX_SSP_TIMEOUT 100000 117412ae53aSAlbert ARIBAUD \(3ADEV\) /* 118412ae53aSAlbert ARIBAUD \(3ADEV\) * Environment 119412ae53aSAlbert ARIBAUD \(3ADEV\) */ 120412ae53aSAlbert ARIBAUD \(3ADEV\) 121412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_ENV_SIZE 0x00020000 122412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_ENV_OFFSET 0x00100000 123412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_ENV_OFFSET_REDUND 0x00120000 124412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_ENV_ADDR 0x80000100 125412ae53aSAlbert ARIBAUD \(3ADEV\) 126412ae53aSAlbert ARIBAUD \(3ADEV\) /* 127412ae53aSAlbert ARIBAUD \(3ADEV\) * Boot Linux 128412ae53aSAlbert ARIBAUD \(3ADEV\) */ 129412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_CMDLINE_TAG 130412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SETUP_MEMORY_TAGS 131412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_INITRD_TAG 132412ae53aSAlbert ARIBAUD \(3ADEV\) 133412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_BOOTFILE "uImage" 134412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_LOADADDR 0x80008000 135412ae53aSAlbert ARIBAUD \(3ADEV\) 136412ae53aSAlbert ARIBAUD \(3ADEV\) /* 137412ae53aSAlbert ARIBAUD \(3ADEV\) * SPL 138412ae53aSAlbert ARIBAUD \(3ADEV\) */ 139412ae53aSAlbert ARIBAUD \(3ADEV\) 140412ae53aSAlbert ARIBAUD \(3ADEV\) /* SPL will be executed at offset 0 */ 141412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SPL_TEXT_BASE 0x00000000 142412ae53aSAlbert ARIBAUD \(3ADEV\) /* SPL will use SRAM as stack */ 143412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SPL_STACK 0x0000FFF8 144412ae53aSAlbert ARIBAUD \(3ADEV\) /* Use the framework and generic lib */ 145412ae53aSAlbert ARIBAUD \(3ADEV\) /* SPL will use serial */ 146412ae53aSAlbert ARIBAUD \(3ADEV\) /* SPL will load U-Boot from NAND offset 0x40000 */ 147412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SPL_NAND_DRIVERS 148412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SPL_NAND_BASE 149412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000 150412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SPL_PAD_TO 0x20000 151412ae53aSAlbert ARIBAUD \(3ADEV\) /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ 152412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ 153412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 154412ae53aSAlbert ARIBAUD \(3ADEV\) #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 155412ae53aSAlbert ARIBAUD \(3ADEV\) 156412ae53aSAlbert ARIBAUD \(3ADEV\) /* 157412ae53aSAlbert ARIBAUD \(3ADEV\) * Include SoC specific configuration 158412ae53aSAlbert ARIBAUD \(3ADEV\) */ 159412ae53aSAlbert ARIBAUD \(3ADEV\) #include <asm/arch/config.h> 160412ae53aSAlbert ARIBAUD \(3ADEV\) 161412ae53aSAlbert ARIBAUD \(3ADEV\) #endif /* __CONFIG_WORK_92105_H__*/ 162