1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 25aaef600SBen Whitten /* 35aaef600SBen Whitten * Configuation settings for the WB45N CPU Module. 45aaef600SBen Whitten */ 55aaef600SBen Whitten 65aaef600SBen Whitten #ifndef __CONFIG_H__ 75aaef600SBen Whitten #define __CONFIG_H__ 85aaef600SBen Whitten 95aaef600SBen Whitten #include <asm/hardware.h> 105aaef600SBen Whitten 115aaef600SBen Whitten /* ARM asynchronous clock */ 125aaef600SBen Whitten #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 135aaef600SBen Whitten #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 145aaef600SBen Whitten 155aaef600SBen Whitten #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 165aaef600SBen Whitten #define CONFIG_SETUP_MEMORY_TAGS 175aaef600SBen Whitten #define CONFIG_INITRD_TAG 185aaef600SBen Whitten #define CONFIG_SKIP_LOWLEVEL_INIT 195aaef600SBen Whitten 205aaef600SBen Whitten /* general purpose I/O */ 215aaef600SBen Whitten #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 225aaef600SBen Whitten #define CONFIG_AT91_GPIO 235aaef600SBen Whitten 245aaef600SBen Whitten /* serial console */ 255aaef600SBen Whitten #define CONFIG_ATMEL_USART 265aaef600SBen Whitten #define CONFIG_USART_BASE ATMEL_BASE_DBGU 275aaef600SBen Whitten #define CONFIG_USART_ID ATMEL_ID_SYS 285aaef600SBen Whitten 295aaef600SBen Whitten /* 305aaef600SBen Whitten * BOOTP options 315aaef600SBen Whitten */ 325aaef600SBen Whitten #define CONFIG_BOOTP_BOOTFILESIZE 335aaef600SBen Whitten 345aaef600SBen Whitten /* SDRAM */ 355aaef600SBen Whitten #define CONFIG_SYS_SDRAM_BASE 0x20000000 365aaef600SBen Whitten #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */ 375aaef600SBen Whitten 385aaef600SBen Whitten #define CONFIG_SYS_INIT_SP_ADDR \ 395aaef600SBen Whitten (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 405aaef600SBen Whitten 415aaef600SBen Whitten /* NAND flash */ 425aaef600SBen Whitten #define CONFIG_SYS_MAX_NAND_DEVICE 1 435aaef600SBen Whitten #define CONFIG_SYS_NAND_BASE 0x40000000 445aaef600SBen Whitten /* our ALE is AD21 */ 455aaef600SBen Whitten #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 465aaef600SBen Whitten /* our CLE is AD22 */ 475aaef600SBen Whitten #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 485aaef600SBen Whitten #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 495aaef600SBen Whitten #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 505aaef600SBen Whitten 515aaef600SBen Whitten #define CONFIG_RBTREE 525aaef600SBen Whitten #define CONFIG_LZO 535aaef600SBen Whitten 545aaef600SBen Whitten /* Ethernet */ 555aaef600SBen Whitten #define CONFIG_MACB 565aaef600SBen Whitten #define CONFIG_RMII 575aaef600SBen Whitten #define CONFIG_NET_RETRY_COUNT 20 585aaef600SBen Whitten #define CONFIG_MACB_SEARCH_PHY 595aaef600SBen Whitten #define CONFIG_ETHADDR C0:EE:40:00:00:00 605aaef600SBen Whitten #define CONFIG_ENV_OVERWRITE 1 615aaef600SBen Whitten 625aaef600SBen Whitten /* System */ 635aaef600SBen Whitten #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 645aaef600SBen Whitten #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 655aaef600SBen Whitten #define CONFIG_SYS_MEMTEST_END 0x23e00000 665aaef600SBen Whitten 675aaef600SBen Whitten #ifdef CONFIG_SYS_USE_NANDFLASH 685aaef600SBen Whitten /* bootstrap + u-boot + env + linux in nandflash */ 695aaef600SBen Whitten #define CONFIG_ENV_OFFSET 0xa0000 705aaef600SBen Whitten #define CONFIG_ENV_OFFSET_REDUND 0xc0000 715aaef600SBen Whitten #define CONFIG_ENV_SIZE 0x20000 /* 1 block = 128 kB */ 725aaef600SBen Whitten 735aaef600SBen Whitten #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \ 745aaef600SBen Whitten "run _mtd; bootm" 755aaef600SBen Whitten 765aaef600SBen Whitten #define MTDIDS_DEFAULT "nand0=atmel_nand" 775aaef600SBen Whitten #define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \ 785aaef600SBen Whitten "128K(at91bs)," \ 795aaef600SBen Whitten "512K(u-boot)," \ 805aaef600SBen Whitten "128K(u-boot-env)," \ 815aaef600SBen Whitten "128K(redund-env)," \ 825aaef600SBen Whitten "2560K(kernel-a)," \ 835aaef600SBen Whitten "2560K(kernel-b)," \ 845aaef600SBen Whitten "38912K(rootfs-a)," \ 855aaef600SBen Whitten "38912K(rootfs-b)," \ 865aaef600SBen Whitten "46208K(user)," \ 875aaef600SBen Whitten "512K(logs)" 885aaef600SBen Whitten 895aaef600SBen Whitten #else 905aaef600SBen Whitten #error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH' 915aaef600SBen Whitten #endif 925aaef600SBen Whitten 935aaef600SBen Whitten #define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk " \ 945aaef600SBen Whitten "rw noinitrd mem=64M " \ 955aaef600SBen Whitten "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6" 965aaef600SBen Whitten 975aaef600SBen Whitten #define CONFIG_EXTRA_ENV_SETTINGS \ 985aaef600SBen Whitten "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \ 995aaef600SBen Whitten "autoload=no\0" \ 1005aaef600SBen Whitten "autostart=no\0" \ 1015aaef600SBen Whitten "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \ 1025aaef600SBen Whitten "\0" 1035aaef600SBen Whitten 1045aaef600SBen Whitten #define CONFIG_SYS_CBSIZE 256 1055aaef600SBen Whitten #define CONFIG_SYS_MAXARGS 16 1065aaef600SBen Whitten 1075aaef600SBen Whitten /* 1085aaef600SBen Whitten * Size of malloc() pool 1095aaef600SBen Whitten */ 1105aaef600SBen Whitten #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 1115aaef600SBen Whitten 1125aaef600SBen Whitten /* SPL */ 1135aaef600SBen Whitten #define CONFIG_SPL_TEXT_BASE 0x300000 1145aaef600SBen Whitten #define CONFIG_SPL_MAX_SIZE 0x6000 1155aaef600SBen Whitten #define CONFIG_SPL_STACK 0x308000 1165aaef600SBen Whitten 1175aaef600SBen Whitten #define CONFIG_SPL_BSS_START_ADDR 0x20000000 1185aaef600SBen Whitten #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 1195aaef600SBen Whitten #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 1205aaef600SBen Whitten #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 1215aaef600SBen Whitten 1225aaef600SBen Whitten #define CONFIG_SYS_MONITOR_LEN (512 << 10) 1235aaef600SBen Whitten 1245aaef600SBen Whitten #define CONFIG_SYS_MASTER_CLOCK 132096000 1255aaef600SBen Whitten #define CONFIG_SYS_AT91_PLLA 0x20c73f03 1265aaef600SBen Whitten #define CONFIG_SYS_MCKR 0x1301 1275aaef600SBen Whitten #define CONFIG_SYS_MCKR_CSS 0x1302 1285aaef600SBen Whitten 1295aaef600SBen Whitten #define CONFIG_SPL_NAND_DRIVERS 1305aaef600SBen Whitten #define CONFIG_SPL_NAND_BASE 1315aaef600SBen Whitten #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 1325aaef600SBen Whitten #define CONFIG_SYS_NAND_5_ADDR_CYCLE 1335aaef600SBen Whitten #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 1345aaef600SBen Whitten #define CONFIG_SYS_NAND_PAGE_COUNT 64 1355aaef600SBen Whitten #define CONFIG_SYS_NAND_OOBSIZE 64 1365aaef600SBen Whitten #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 1375aaef600SBen Whitten #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 1385aaef600SBen Whitten 1395aaef600SBen Whitten #endif /* __CONFIG_H__ */ 140