xref: /openbmc/u-boot/include/configs/warp7.h (revision 699e831e158a5846778d8bd6af054d4276277cb6)
1 /*
2  * Copyright (C) 2016 NXP Semiconductors
3  *
4  * Configuration settings for the i.MX7S Warp board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __WARP7_CONFIG_H
10 #define __WARP7_CONFIG_H
11 
12 #include "mx7_common.h"
13 #include <imximage.h>
14 
15 #define PHYS_SDRAM_SIZE			SZ_512M
16 
17 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
18 
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN		(35 * SZ_1M)
21 
22 /* MMC Config*/
23 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
24 #define CONFIG_SUPPORT_EMMC_BOOT
25 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
26 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
27 
28 /* Switch on SERIAL_TAG */
29 #define CONFIG_SERIAL_TAG
30 
31 #define CONFIG_DFU_ENV_SETTINGS \
32 	"dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
33 
34 #define CONFIG_EXTRA_ENV_SETTINGS \
35 	CONFIG_DFU_ENV_SETTINGS \
36 	"script=boot.scr\0" \
37 	"script_signed=boot.scr.imx-signed\0" \
38 	"image=zImage\0" \
39 	"console=ttymxc0\0" \
40 	"ethact=usb_ether\0" \
41 	"fdt_high=0xffffffff\0" \
42 	"initrd_high=0xffffffff\0" \
43 	"fdt_file=imx7s-warp.dtb\0" \
44 	"fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \
45 	"optee_addr=" __stringify(CONFIG_OPTEE_LOAD_ADDR)"\0" \
46 	"boot_fdt=try\0" \
47 	"ip_dyn=yes\0" \
48 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
49 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
50 	"rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \
51 	"finduuid=part uuid mmc 0:${rootpart} uuid\0" \
52 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
53 		"root=PARTUUID=${uuid} rootwait rw\0" \
54 	"ivt_offset=" __stringify(BOOTROM_IVT_HDR_OFFSET)"\0"\
55 	"warp7_auth_or_fail=hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0;\0" \
56 	"do_bootscript_hab=" \
57 		"if test ${hab_enabled} -eq 1; then " \
58 			"setexpr hab_ivt_addr ${loadaddr} - ${ivt_offset}; " \
59 			"setenv script ${script_signed}; " \
60 			"load mmc ${mmcdev}:${mmcpart} ${hab_ivt_addr} ${script}; " \
61 			"run warp7_auth_or_fail; " \
62 			"run bootscript; "\
63 		"fi;\0" \
64 	"loadbootscript=" \
65 		"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
66 	"bootscript=echo Running bootscript from mmc ...; " \
67 		"source\0" \
68 	"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
69 	"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
70 	"mmcboot=echo Booting from mmc ...; " \
71 		"run finduuid; " \
72 		"run mmcargs; " \
73 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
74 			"if run loadfdt; then " \
75 				"bootz ${loadaddr} - ${fdt_addr}; " \
76 			"else " \
77 				"if test ${boot_fdt} = try; then " \
78 					"bootz; " \
79 				"else " \
80 					"echo WARN: Cannot load the DT; " \
81 				"fi; " \
82 			"fi; " \
83 		"else " \
84 			"bootz; " \
85 		"fi;\0" \
86 
87 #define CONFIG_BOOTCOMMAND \
88 	   "mmc dev ${mmcdev};" \
89 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
90 		   "run do_bootscript_hab;" \
91 		   "if run loadbootscript; then " \
92 			   "run bootscript; " \
93 		   "else " \
94 			   "if run loadimage; then " \
95 				   "run mmcboot; " \
96 			   "fi; " \
97 		   "fi; " \
98 	   "fi"
99 
100 #define CONFIG_SYS_MEMTEST_START	0x80000000
101 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
102 
103 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
104 #define CONFIG_SYS_HZ			1000
105 
106 /* Physical Memory Map */
107 #define CONFIG_NR_DRAM_BANKS		1
108 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
109 
110 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
111 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
112 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
113 
114 #define CONFIG_SYS_INIT_SP_OFFSET \
115 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
116 #define CONFIG_SYS_INIT_SP_ADDR \
117 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
118 
119 /* I2C configs */
120 #define CONFIG_SYS_I2C
121 #define CONFIG_SYS_I2C_MXC
122 #define CONFIG_SYS_I2C_MXC_I2C1
123 #define CONFIG_SYS_I2C_SPEED		100000
124 
125 /* PMIC */
126 #define CONFIG_POWER
127 #define CONFIG_POWER_I2C
128 #define CONFIG_POWER_PFUZE3000
129 #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
130 
131 /* environment organization */
132 #define CONFIG_ENV_SIZE			SZ_8K
133 
134 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
135 #define CONFIG_SYS_FSL_USDHC_NUM	1
136 
137 #define CONFIG_SYS_MMC_ENV_DEV		0
138 #define CONFIG_SYS_MMC_ENV_PART		0
139 
140 /* USB Configs */
141 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
142 
143 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
144 #define CONFIG_MXC_USB_FLAGS		0
145 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
146 
147 #define CONFIG_IMX_THERMAL
148 
149 #define CONFIG_USBD_HS
150 
151 /* USB Device Firmware Update support */
152 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	SZ_16M
153 #define DFU_DEFAULT_POLL_TIMEOUT	300
154 
155 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:af:00:01"
156 
157 /* Environment variable name to represent HAB enable state */
158 #define HAB_ENABLED_ENVNAME		"hab_enabled"
159 
160 #endif
161