xref: /openbmc/u-boot/include/configs/titanium.h (revision f8cb101e1e3f5ee2007b78b6b12e24120385aeac)
1b29ca4a1SStefan Roese /*
2b29ca4a1SStefan Roese  * Copyright (C) 2013 Stefan Roese <sr@denx.de>
3b29ca4a1SStefan Roese  *
4b29ca4a1SStefan Roese  * Configuration settings for the ProjectionDesign / Barco
5b29ca4a1SStefan Roese  * Titanium board.
6b29ca4a1SStefan Roese  *
7b29ca4a1SStefan Roese  * Based on mx6qsabrelite.h which is:
8b29ca4a1SStefan Roese  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
9b29ca4a1SStefan Roese  *
101a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
11b29ca4a1SStefan Roese  */
12b29ca4a1SStefan Roese 
13b29ca4a1SStefan Roese #ifndef __CONFIG_H
14b29ca4a1SStefan Roese #define __CONFIG_H
15b29ca4a1SStefan Roese 
1602824dc7SEric Nelson #include "mx6_common.h"
17b29ca4a1SStefan Roese #include <asm/arch/imx-regs.h>
18b29ca4a1SStefan Roese #include <asm/imx-common/gpio.h>
19b29ca4a1SStefan Roese 
20b29ca4a1SStefan Roese #define CONFIG_MX6
21b29ca4a1SStefan Roese #define CONFIG_MX6Q
22b29ca4a1SStefan Roese #define CONFIG_DISPLAY_CPUINFO
23b29ca4a1SStefan Roese #define CONFIG_DISPLAY_BOARDINFO
24b29ca4a1SStefan Roese 
25b29ca4a1SStefan Roese #define MACH_TYPE_TITANIUM		3769
26b29ca4a1SStefan Roese #define CONFIG_MACH_TYPE		MACH_TYPE_TITANIUM
27b29ca4a1SStefan Roese 
28b29ca4a1SStefan Roese #define CONFIG_CMDLINE_TAG
29b29ca4a1SStefan Roese #define CONFIG_SETUP_MEMORY_TAGS
30b29ca4a1SStefan Roese #define CONFIG_INITRD_TAG
31b29ca4a1SStefan Roese #define CONFIG_REVISION_TAG
32b29ca4a1SStefan Roese 
33b29ca4a1SStefan Roese /* Size of malloc() pool */
34b29ca4a1SStefan Roese #define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
35b29ca4a1SStefan Roese 
36b29ca4a1SStefan Roese #define CONFIG_BOARD_EARLY_INIT_F
37b29ca4a1SStefan Roese #define CONFIG_MISC_INIT_R
38b29ca4a1SStefan Roese #define CONFIG_MXC_GPIO
39b29ca4a1SStefan Roese 
40b29ca4a1SStefan Roese #define CONFIG_MXC_UART
41b29ca4a1SStefan Roese #define CONFIG_MXC_UART_BASE		UART1_BASE
42b29ca4a1SStefan Roese 
43b29ca4a1SStefan Roese /* I2C Configs */
44b29ca4a1SStefan Roese #define CONFIG_CMD_I2C
45b089d039Strem #define CONFIG_SYS_I2C
46b089d039Strem #define CONFIG_SYS_I2C_MXC
47*f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
48b29ca4a1SStefan Roese #define CONFIG_SYS_I2C_SPEED		100000
49b29ca4a1SStefan Roese 
50b29ca4a1SStefan Roese /* MMC Configs */
51b29ca4a1SStefan Roese #define CONFIG_FSL_ESDHC
52b29ca4a1SStefan Roese #define CONFIG_FSL_USDHC
53b29ca4a1SStefan Roese #define CONFIG_SYS_FSL_ESDHC_ADDR	0
54b29ca4a1SStefan Roese #define CONFIG_SYS_FSL_USDHC_NUM	1
55b29ca4a1SStefan Roese 
56b29ca4a1SStefan Roese #define CONFIG_MMC
57b29ca4a1SStefan Roese #define CONFIG_CMD_MMC
58b29ca4a1SStefan Roese #define CONFIG_GENERIC_MMC
59b29ca4a1SStefan Roese #define CONFIG_BOUNCE_BUFFER
60b29ca4a1SStefan Roese #define CONFIG_CMD_EXT2
61b29ca4a1SStefan Roese #define CONFIG_CMD_FAT
62b29ca4a1SStefan Roese #define CONFIG_DOS_PARTITION
63b29ca4a1SStefan Roese 
64b29ca4a1SStefan Roese #define CONFIG_CMD_PING
65b29ca4a1SStefan Roese #define CONFIG_CMD_DHCP
66b29ca4a1SStefan Roese #define CONFIG_CMD_MII
67b29ca4a1SStefan Roese #define CONFIG_CMD_NET
68b29ca4a1SStefan Roese #define CONFIG_FEC_MXC
69b29ca4a1SStefan Roese #define CONFIG_MII
70b29ca4a1SStefan Roese #define IMX_FEC_BASE			ENET_BASE_ADDR
71b29ca4a1SStefan Roese #define CONFIG_FEC_XCV_TYPE		RGMII
72b29ca4a1SStefan Roese #define CONFIG_FEC_MXC_PHYADDR		4
73b29ca4a1SStefan Roese #define CONFIG_PHYLIB
74b29ca4a1SStefan Roese #define CONFIG_PHY_MICREL
75b29ca4a1SStefan Roese #define CONFIG_PHY_MICREL_KSZ9021
76b29ca4a1SStefan Roese 
77b29ca4a1SStefan Roese /* USB Configs */
78b29ca4a1SStefan Roese #define CONFIG_CMD_USB
79b29ca4a1SStefan Roese #define CONFIG_CMD_FAT
80b29ca4a1SStefan Roese #define CONFIG_USB_EHCI
81b29ca4a1SStefan Roese #define CONFIG_USB_EHCI_MX6
82b29ca4a1SStefan Roese #define CONFIG_USB_STORAGE
83b29ca4a1SStefan Roese #define CONFIG_MXC_USB_PORT	1
84b29ca4a1SStefan Roese #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
85b29ca4a1SStefan Roese #define CONFIG_MXC_USB_FLAGS	0
86b29ca4a1SStefan Roese 
87b29ca4a1SStefan Roese /* Miscellaneous commands */
88b29ca4a1SStefan Roese #define CONFIG_CMD_BMODE
89b29ca4a1SStefan Roese 
90b29ca4a1SStefan Roese /* allow to overwrite serial and ethaddr */
91b29ca4a1SStefan Roese #define CONFIG_ENV_OVERWRITE
92b29ca4a1SStefan Roese #define CONFIG_CONS_INDEX		1
93b29ca4a1SStefan Roese #define CONFIG_BAUDRATE			115200
94b29ca4a1SStefan Roese 
95b29ca4a1SStefan Roese /* Command definition */
96b29ca4a1SStefan Roese #include <config_cmd_default.h>
97b29ca4a1SStefan Roese 
98b29ca4a1SStefan Roese #undef CONFIG_CMD_IMLS
99b29ca4a1SStefan Roese 
100b29ca4a1SStefan Roese #define CONFIG_BOOTDELAY		3
101b29ca4a1SStefan Roese 
102b29ca4a1SStefan Roese #define CONFIG_LOADADDR			0x12000000
103b29ca4a1SStefan Roese #define CONFIG_SYS_TEXT_BASE		0x17800000
104b29ca4a1SStefan Roese 
105b29ca4a1SStefan Roese #define CONFIG_SYS_MEMTEST_START	0x10000000
106b29ca4a1SStefan Roese #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (500 << 20))
107b29ca4a1SStefan Roese 
108b29ca4a1SStefan Roese #define CONFIG_HOSTNAME			titanium
109b29ca4a1SStefan Roese #define CONFIG_UBI_PART			ubi
110b29ca4a1SStefan Roese #define CONFIG_UBIFS_VOLUME		rootfs0
111b29ca4a1SStefan Roese 
112b29ca4a1SStefan Roese #define MTDIDS_DEFAULT		"nand0=gpmi-nand"
113b29ca4a1SStefan Roese #define MTDPARTS_DEFAULT	"mtdparts=gpmi-nand:16M(uboot),512k(env1)," \
114b29ca4a1SStefan Roese 				"512k(env2),-(ubi)"
115b29ca4a1SStefan Roese 
116b29ca4a1SStefan Roese #define CONFIG_EXTRA_ENV_SETTINGS \
117b29ca4a1SStefan Roese 	"kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
118b29ca4a1SStefan Roese 	"kernel_fs=/boot/uImage\0"					\
119b29ca4a1SStefan Roese 	"kernel_addr=11000000\0"					\
120b29ca4a1SStefan Roese 	"dtb=" __stringify(CONFIG_HOSTNAME) "/"				\
121b29ca4a1SStefan Roese 		__stringify(CONFIG_HOSTNAME) ".dtb\0"			\
122b29ca4a1SStefan Roese 	"dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0"		\
123b29ca4a1SStefan Roese 	"dtb_addr=12800000\0"						\
124b29ca4a1SStefan Roese 	"script=boot.scr\0" \
125b29ca4a1SStefan Roese 	"uimage=uImage\0" \
126b29ca4a1SStefan Roese 	"console=ttymxc0\0" \
127b29ca4a1SStefan Roese 	"baudrate=115200\0" \
128b29ca4a1SStefan Roese 	"fdt_high=0xffffffff\0"	  \
129b29ca4a1SStefan Roese 	"initrd_high=0xffffffff\0" \
130b29ca4a1SStefan Roese 	"mmcdev=0\0" \
131b29ca4a1SStefan Roese 	"mmcpart=1\0" \
132b29ca4a1SStefan Roese 	"uimage=uImage\0" \
133b29ca4a1SStefan Roese 	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
134b29ca4a1SStefan Roese 		" ${script}\0" \
135b29ca4a1SStefan Roese 	"bootscript=echo Running bootscript from mmc ...; source\0" \
136b29ca4a1SStefan Roese 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
137b29ca4a1SStefan Roese 	"mmcroot=/dev/mmcblk0p2\0" \
138b29ca4a1SStefan Roese 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
139b29ca4a1SStefan Roese 		"root=${mmcroot} rootwait rw\0" \
140b29ca4a1SStefan Roese 	"bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
141b29ca4a1SStefan Roese 		" ${uimage}; bootm\0" \
142b29ca4a1SStefan Roese 	"addip=setenv bootargs ${bootargs} "				\
143b29ca4a1SStefan Roese 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
144b29ca4a1SStefan Roese 		":${hostname}:${netdev}:off panic=1\0"			\
145b29ca4a1SStefan Roese 	"addcon=setenv bootargs ${bootargs} console=ttymxc0,"		\
146b29ca4a1SStefan Roese 		"${baudrate}\0"						\
147b29ca4a1SStefan Roese 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
148b29ca4a1SStefan Roese 	"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0"	\
149b29ca4a1SStefan Roese 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
150b29ca4a1SStefan Roese 		"nfsroot=${serverip}:${rootpath}\0"			\
151b29ca4a1SStefan Roese 	"ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0"		\
152b29ca4a1SStefan Roese 	"part=" __stringify(CONFIG_UBI_PART) "\0"			\
153b29ca4a1SStefan Roese 	"boot_vol=0\0"							\
154b29ca4a1SStefan Roese 	"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"			\
155b29ca4a1SStefan Roese 	"load_ubifs=tftp ${kernel_addr} ${ubifs}\0"			\
156b29ca4a1SStefan Roese 	"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}"	\
157b29ca4a1SStefan Roese 		" ${filesize}\0"					\
158b29ca4a1SStefan Roese 	"upd_ubifs=run load_ubifs update_ubifs\0"			\
159b29ca4a1SStefan Roese 	"init_ubi=nand erase.part ubi;ubi part ${part};"		\
160b29ca4a1SStefan Roese 		"ubi create ${vol} c800000\0"				\
161b29ca4a1SStefan Roese 	"mtdids=" MTDIDS_DEFAULT "\0"					\
162b29ca4a1SStefan Roese 	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
163b29ca4a1SStefan Roese 	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"		\
164b29ca4a1SStefan Roese 		" addcon addmtd;"					\
165b29ca4a1SStefan Roese 		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
166b29ca4a1SStefan Roese 	"ubifsargs=set bootargs ubi.mtd=ubi "				\
167b29ca4a1SStefan Roese 		"root=ubi:rootfs${boot_vol} rootfstype=ubifs\0"		\
168b29ca4a1SStefan Roese 	"ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0"	\
169b29ca4a1SStefan Roese 	"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"		\
170b29ca4a1SStefan Roese 		"ubifsload ${dtb_addr} ${dtb_fs};\0"			\
171b29ca4a1SStefan Roese 	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon "	\
172b29ca4a1SStefan Roese 		"addmtd;bootm ${kernel_addr} - ${dtb_addr}\0"		\
173b29ca4a1SStefan Roese 	"load_kernel=tftp ${kernel_addr} ${kernel}\0"			\
174b29ca4a1SStefan Roese 	"load_dtb=tftp ${dtb_addr} ${dtb}\0"				\
175b29ca4a1SStefan Roese 	"net_nfs=run load_dtb load_kernel; "				\
176b29ca4a1SStefan Roese 		"run nfsargs addip addcon addmtd;"			\
177b29ca4a1SStefan Roese 		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
178b29ca4a1SStefan Roese 	"delenv=env default -a -f; saveenv; reset\0"
179b29ca4a1SStefan Roese 
180b29ca4a1SStefan Roese #define CONFIG_BOOTCOMMAND		"run nand_ubifs"
181b29ca4a1SStefan Roese 
182b29ca4a1SStefan Roese /* Miscellaneous configurable options */
183b29ca4a1SStefan Roese #define CONFIG_SYS_LONGHELP
184b29ca4a1SStefan Roese #define CONFIG_SYS_HUSH_PARSER
185b29ca4a1SStefan Roese #define CONFIG_SYS_PROMPT		"Titanium > "
186b29ca4a1SStefan Roese #define CONFIG_AUTO_COMPLETE
187b29ca4a1SStefan Roese #define CONFIG_CMDLINE_EDITING
188b29ca4a1SStefan Roese #define CONFIG_SYS_CONSOLE_INFO_QUIET	/* don't print console @ startup */
189b29ca4a1SStefan Roese 
190b29ca4a1SStefan Roese #define CONFIG_SYS_CBSIZE		256
191b29ca4a1SStefan Roese 
192b29ca4a1SStefan Roese /* Print Buffer Size */
193b29ca4a1SStefan Roese #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
194b29ca4a1SStefan Roese 					 sizeof(CONFIG_SYS_PROMPT) + 16)
195b29ca4a1SStefan Roese #define CONFIG_SYS_MAXARGS		16
196b29ca4a1SStefan Roese #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
197b29ca4a1SStefan Roese 
198b29ca4a1SStefan Roese #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
199b29ca4a1SStefan Roese 
200b29ca4a1SStefan Roese /* Physical Memory Map */
201b29ca4a1SStefan Roese #define CONFIG_NR_DRAM_BANKS		1
202b29ca4a1SStefan Roese #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
203b29ca4a1SStefan Roese #define PHYS_SDRAM_SIZE			(512 << 20)
204b29ca4a1SStefan Roese 
205b29ca4a1SStefan Roese #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
206b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
207b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
208b29ca4a1SStefan Roese 
209b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_SP_OFFSET \
210b29ca4a1SStefan Roese 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
211b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_SP_ADDR \
212b29ca4a1SStefan Roese 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
213b29ca4a1SStefan Roese 
214b29ca4a1SStefan Roese /* FLASH and environment organization */
215b29ca4a1SStefan Roese #define CONFIG_SYS_NO_FLASH
216b29ca4a1SStefan Roese 
217b29ca4a1SStefan Roese /* Enable NAND support */
218b29ca4a1SStefan Roese #define CONFIG_CMD_NAND
219b29ca4a1SStefan Roese #define CONFIG_CMD_NAND_TRIMFFS
220b29ca4a1SStefan Roese #define CONFIG_CMD_TIME
221b29ca4a1SStefan Roese 
222b29ca4a1SStefan Roese #ifdef CONFIG_CMD_NAND
223b29ca4a1SStefan Roese 
224b29ca4a1SStefan Roese /* NAND stuff */
225b29ca4a1SStefan Roese #define CONFIG_NAND_MXS
226b29ca4a1SStefan Roese #define CONFIG_SYS_MAX_NAND_DEVICE	1
227b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_BASE		0x40000000
228b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_5_ADDR_CYCLE
229b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_ONFI_DETECTION
230b29ca4a1SStefan Roese 
231b29ca4a1SStefan Roese /* DMA stuff, needed for GPMI/MXS NAND support */
232b29ca4a1SStefan Roese #define CONFIG_APBH_DMA
233b29ca4a1SStefan Roese #define CONFIG_APBH_DMA_BURST
234b29ca4a1SStefan Roese #define CONFIG_APBH_DMA_BURST8
235b29ca4a1SStefan Roese 
236b29ca4a1SStefan Roese /* Environment in NAND */
237b29ca4a1SStefan Roese #define CONFIG_ENV_IS_IN_NAND
238b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET		(16 << 20)
239b29ca4a1SStefan Roese #define CONFIG_ENV_SECT_SIZE		(128 << 10)
240b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
241b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + (512 << 10))
242b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
243b29ca4a1SStefan Roese 
244b29ca4a1SStefan Roese #else /* CONFIG_CMD_NAND */
245b29ca4a1SStefan Roese 
246b29ca4a1SStefan Roese /* Environment in MMC */
247b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE			(8 << 10)
248b29ca4a1SStefan Roese #define CONFIG_ENV_IS_IN_MMC
249b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
250b29ca4a1SStefan Roese #define CONFIG_SYS_MMC_ENV_DEV		0
251b29ca4a1SStefan Roese 
252b29ca4a1SStefan Roese #endif /* CONFIG_CMD_NAND */
253b29ca4a1SStefan Roese 
254b29ca4a1SStefan Roese /* UBI/UBIFS config options */
255b29ca4a1SStefan Roese #define CONFIG_LZO
256b29ca4a1SStefan Roese #define CONFIG_MTD_DEVICE
257b29ca4a1SStefan Roese #define CONFIG_MTD_PARTITIONS
258b29ca4a1SStefan Roese #define CONFIG_RBTREE
259b29ca4a1SStefan Roese #define CONFIG_CMD_MTDPARTS
260b29ca4a1SStefan Roese #define CONFIG_CMD_UBI
261b29ca4a1SStefan Roese #define CONFIG_CMD_UBIFS
262b29ca4a1SStefan Roese 
263b29ca4a1SStefan Roese #define CONFIG_OF_LIBFDT
264b29ca4a1SStefan Roese #define CONFIG_CMD_BOOTZ
265b29ca4a1SStefan Roese 
266b29ca4a1SStefan Roese #ifndef CONFIG_SYS_DCACHE_OFF
267b29ca4a1SStefan Roese #define CONFIG_CMD_CACHE
268b29ca4a1SStefan Roese #endif
269b29ca4a1SStefan Roese 
270b29ca4a1SStefan Roese #endif			       /* __CONFIG_H */
271