1*b29ca4a1SStefan Roese /* 2*b29ca4a1SStefan Roese * Copyright (C) 2013 Stefan Roese <sr@denx.de> 3*b29ca4a1SStefan Roese * 4*b29ca4a1SStefan Roese * Configuration settings for the ProjectionDesign / Barco 5*b29ca4a1SStefan Roese * Titanium board. 6*b29ca4a1SStefan Roese * 7*b29ca4a1SStefan Roese * Based on mx6qsabrelite.h which is: 8*b29ca4a1SStefan Roese * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 9*b29ca4a1SStefan Roese * 10*b29ca4a1SStefan Roese * This program is free software; you can redistribute it and/or 11*b29ca4a1SStefan Roese * modify it under the terms of the GNU General Public License as 12*b29ca4a1SStefan Roese * published by the Free Software Foundation; either version 2 of 13*b29ca4a1SStefan Roese * the License, or (at your option) any later version. 14*b29ca4a1SStefan Roese * 15*b29ca4a1SStefan Roese * This program is distributed in the hope that it will be useful, 16*b29ca4a1SStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*b29ca4a1SStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*b29ca4a1SStefan Roese * GNU General Public License for more details. 19*b29ca4a1SStefan Roese */ 20*b29ca4a1SStefan Roese 21*b29ca4a1SStefan Roese #ifndef __CONFIG_H 22*b29ca4a1SStefan Roese #define __CONFIG_H 23*b29ca4a1SStefan Roese 24*b29ca4a1SStefan Roese #include <asm/arch/imx-regs.h> 25*b29ca4a1SStefan Roese #include <asm/imx-common/gpio.h> 26*b29ca4a1SStefan Roese 27*b29ca4a1SStefan Roese #define CONFIG_MX6 28*b29ca4a1SStefan Roese #define CONFIG_MX6Q 29*b29ca4a1SStefan Roese #define CONFIG_DISPLAY_CPUINFO 30*b29ca4a1SStefan Roese #define CONFIG_DISPLAY_BOARDINFO 31*b29ca4a1SStefan Roese 32*b29ca4a1SStefan Roese #define MACH_TYPE_TITANIUM 3769 33*b29ca4a1SStefan Roese #define CONFIG_MACH_TYPE MACH_TYPE_TITANIUM 34*b29ca4a1SStefan Roese 35*b29ca4a1SStefan Roese #define CONFIG_CMDLINE_TAG 36*b29ca4a1SStefan Roese #define CONFIG_SETUP_MEMORY_TAGS 37*b29ca4a1SStefan Roese #define CONFIG_INITRD_TAG 38*b29ca4a1SStefan Roese #define CONFIG_REVISION_TAG 39*b29ca4a1SStefan Roese 40*b29ca4a1SStefan Roese /* Size of malloc() pool */ 41*b29ca4a1SStefan Roese #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) 42*b29ca4a1SStefan Roese 43*b29ca4a1SStefan Roese #define CONFIG_BOARD_EARLY_INIT_F 44*b29ca4a1SStefan Roese #define CONFIG_MISC_INIT_R 45*b29ca4a1SStefan Roese #define CONFIG_MXC_GPIO 46*b29ca4a1SStefan Roese 47*b29ca4a1SStefan Roese #define CONFIG_MXC_UART 48*b29ca4a1SStefan Roese #define CONFIG_MXC_UART_BASE UART1_BASE 49*b29ca4a1SStefan Roese 50*b29ca4a1SStefan Roese /* I2C Configs */ 51*b29ca4a1SStefan Roese #define CONFIG_CMD_I2C 52*b29ca4a1SStefan Roese #define CONFIG_I2C_MULTI_BUS 53*b29ca4a1SStefan Roese #define CONFIG_I2C_MXC 54*b29ca4a1SStefan Roese #define CONFIG_SYS_I2C_SPEED 100000 55*b29ca4a1SStefan Roese 56*b29ca4a1SStefan Roese /* MMC Configs */ 57*b29ca4a1SStefan Roese #define CONFIG_FSL_ESDHC 58*b29ca4a1SStefan Roese #define CONFIG_FSL_USDHC 59*b29ca4a1SStefan Roese #define CONFIG_SYS_FSL_ESDHC_ADDR 0 60*b29ca4a1SStefan Roese #define CONFIG_SYS_FSL_USDHC_NUM 1 61*b29ca4a1SStefan Roese 62*b29ca4a1SStefan Roese #define CONFIG_MMC 63*b29ca4a1SStefan Roese #define CONFIG_CMD_MMC 64*b29ca4a1SStefan Roese #define CONFIG_GENERIC_MMC 65*b29ca4a1SStefan Roese #define CONFIG_BOUNCE_BUFFER 66*b29ca4a1SStefan Roese #define CONFIG_CMD_EXT2 67*b29ca4a1SStefan Roese #define CONFIG_CMD_FAT 68*b29ca4a1SStefan Roese #define CONFIG_DOS_PARTITION 69*b29ca4a1SStefan Roese 70*b29ca4a1SStefan Roese #define CONFIG_CMD_PING 71*b29ca4a1SStefan Roese #define CONFIG_CMD_DHCP 72*b29ca4a1SStefan Roese #define CONFIG_CMD_MII 73*b29ca4a1SStefan Roese #define CONFIG_CMD_NET 74*b29ca4a1SStefan Roese #define CONFIG_FEC_MXC 75*b29ca4a1SStefan Roese #define CONFIG_MII 76*b29ca4a1SStefan Roese #define IMX_FEC_BASE ENET_BASE_ADDR 77*b29ca4a1SStefan Roese #define CONFIG_FEC_XCV_TYPE RGMII 78*b29ca4a1SStefan Roese #define CONFIG_FEC_MXC_PHYADDR 4 79*b29ca4a1SStefan Roese #define CONFIG_PHYLIB 80*b29ca4a1SStefan Roese #define CONFIG_PHY_MICREL 81*b29ca4a1SStefan Roese #define CONFIG_PHY_MICREL_KSZ9021 82*b29ca4a1SStefan Roese 83*b29ca4a1SStefan Roese /* USB Configs */ 84*b29ca4a1SStefan Roese #define CONFIG_CMD_USB 85*b29ca4a1SStefan Roese #define CONFIG_CMD_FAT 86*b29ca4a1SStefan Roese #define CONFIG_USB_EHCI 87*b29ca4a1SStefan Roese #define CONFIG_USB_EHCI_MX6 88*b29ca4a1SStefan Roese #define CONFIG_USB_STORAGE 89*b29ca4a1SStefan Roese #define CONFIG_MXC_USB_PORT 1 90*b29ca4a1SStefan Roese #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 91*b29ca4a1SStefan Roese #define CONFIG_MXC_USB_FLAGS 0 92*b29ca4a1SStefan Roese 93*b29ca4a1SStefan Roese /* Miscellaneous commands */ 94*b29ca4a1SStefan Roese #define CONFIG_CMD_BMODE 95*b29ca4a1SStefan Roese 96*b29ca4a1SStefan Roese /* allow to overwrite serial and ethaddr */ 97*b29ca4a1SStefan Roese #define CONFIG_ENV_OVERWRITE 98*b29ca4a1SStefan Roese #define CONFIG_CONS_INDEX 1 99*b29ca4a1SStefan Roese #define CONFIG_BAUDRATE 115200 100*b29ca4a1SStefan Roese 101*b29ca4a1SStefan Roese /* Command definition */ 102*b29ca4a1SStefan Roese #include <config_cmd_default.h> 103*b29ca4a1SStefan Roese 104*b29ca4a1SStefan Roese #undef CONFIG_CMD_IMLS 105*b29ca4a1SStefan Roese 106*b29ca4a1SStefan Roese #define CONFIG_BOOTDELAY 3 107*b29ca4a1SStefan Roese 108*b29ca4a1SStefan Roese #define CONFIG_LOADADDR 0x12000000 109*b29ca4a1SStefan Roese #define CONFIG_SYS_TEXT_BASE 0x17800000 110*b29ca4a1SStefan Roese 111*b29ca4a1SStefan Roese #define CONFIG_SYS_MEMTEST_START 0x10000000 112*b29ca4a1SStefan Roese #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20)) 113*b29ca4a1SStefan Roese 114*b29ca4a1SStefan Roese #define CONFIG_HOSTNAME titanium 115*b29ca4a1SStefan Roese #define CONFIG_UBI_PART ubi 116*b29ca4a1SStefan Roese #define CONFIG_UBIFS_VOLUME rootfs0 117*b29ca4a1SStefan Roese 118*b29ca4a1SStefan Roese #define MTDIDS_DEFAULT "nand0=gpmi-nand" 119*b29ca4a1SStefan Roese #define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \ 120*b29ca4a1SStefan Roese "512k(env2),-(ubi)" 121*b29ca4a1SStefan Roese 122*b29ca4a1SStefan Roese #define CONFIG_EXTRA_ENV_SETTINGS \ 123*b29ca4a1SStefan Roese "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 124*b29ca4a1SStefan Roese "kernel_fs=/boot/uImage\0" \ 125*b29ca4a1SStefan Roese "kernel_addr=11000000\0" \ 126*b29ca4a1SStefan Roese "dtb=" __stringify(CONFIG_HOSTNAME) "/" \ 127*b29ca4a1SStefan Roese __stringify(CONFIG_HOSTNAME) ".dtb\0" \ 128*b29ca4a1SStefan Roese "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \ 129*b29ca4a1SStefan Roese "dtb_addr=12800000\0" \ 130*b29ca4a1SStefan Roese "script=boot.scr\0" \ 131*b29ca4a1SStefan Roese "uimage=uImage\0" \ 132*b29ca4a1SStefan Roese "console=ttymxc0\0" \ 133*b29ca4a1SStefan Roese "baudrate=115200\0" \ 134*b29ca4a1SStefan Roese "fdt_high=0xffffffff\0" \ 135*b29ca4a1SStefan Roese "initrd_high=0xffffffff\0" \ 136*b29ca4a1SStefan Roese "mmcdev=0\0" \ 137*b29ca4a1SStefan Roese "mmcpart=1\0" \ 138*b29ca4a1SStefan Roese "uimage=uImage\0" \ 139*b29ca4a1SStefan Roese "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ 140*b29ca4a1SStefan Roese " ${script}\0" \ 141*b29ca4a1SStefan Roese "bootscript=echo Running bootscript from mmc ...; source\0" \ 142*b29ca4a1SStefan Roese "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 143*b29ca4a1SStefan Roese "mmcroot=/dev/mmcblk0p2\0" \ 144*b29ca4a1SStefan Roese "mmcargs=setenv bootargs console=${console},${baudrate} " \ 145*b29ca4a1SStefan Roese "root=${mmcroot} rootwait rw\0" \ 146*b29ca4a1SStefan Roese "bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ 147*b29ca4a1SStefan Roese " ${uimage}; bootm\0" \ 148*b29ca4a1SStefan Roese "addip=setenv bootargs ${bootargs} " \ 149*b29ca4a1SStefan Roese "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 150*b29ca4a1SStefan Roese ":${hostname}:${netdev}:off panic=1\0" \ 151*b29ca4a1SStefan Roese "addcon=setenv bootargs ${bootargs} console=ttymxc0," \ 152*b29ca4a1SStefan Roese "${baudrate}\0" \ 153*b29ca4a1SStefan Roese "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 154*b29ca4a1SStefan Roese "rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \ 155*b29ca4a1SStefan Roese "nfsargs=setenv bootargs root=/dev/nfs rw " \ 156*b29ca4a1SStefan Roese "nfsroot=${serverip}:${rootpath}\0" \ 157*b29ca4a1SStefan Roese "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \ 158*b29ca4a1SStefan Roese "part=" __stringify(CONFIG_UBI_PART) "\0" \ 159*b29ca4a1SStefan Roese "boot_vol=0\0" \ 160*b29ca4a1SStefan Roese "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \ 161*b29ca4a1SStefan Roese "load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \ 162*b29ca4a1SStefan Roese "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \ 163*b29ca4a1SStefan Roese " ${filesize}\0" \ 164*b29ca4a1SStefan Roese "upd_ubifs=run load_ubifs update_ubifs\0" \ 165*b29ca4a1SStefan Roese "init_ubi=nand erase.part ubi;ubi part ${part};" \ 166*b29ca4a1SStefan Roese "ubi create ${vol} c800000\0" \ 167*b29ca4a1SStefan Roese "mtdids=" MTDIDS_DEFAULT "\0" \ 168*b29ca4a1SStefan Roese "mtdparts=" MTDPARTS_DEFAULT "\0" \ 169*b29ca4a1SStefan Roese "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \ 170*b29ca4a1SStefan Roese " addcon addmtd;" \ 171*b29ca4a1SStefan Roese "bootm ${kernel_addr} - ${dtb_addr}\0" \ 172*b29ca4a1SStefan Roese "ubifsargs=set bootargs ubi.mtd=ubi " \ 173*b29ca4a1SStefan Roese "root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \ 174*b29ca4a1SStefan Roese "ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \ 175*b29ca4a1SStefan Roese "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \ 176*b29ca4a1SStefan Roese "ubifsload ${dtb_addr} ${dtb_fs};\0" \ 177*b29ca4a1SStefan Roese "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \ 178*b29ca4a1SStefan Roese "addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \ 179*b29ca4a1SStefan Roese "load_kernel=tftp ${kernel_addr} ${kernel}\0" \ 180*b29ca4a1SStefan Roese "load_dtb=tftp ${dtb_addr} ${dtb}\0" \ 181*b29ca4a1SStefan Roese "net_nfs=run load_dtb load_kernel; " \ 182*b29ca4a1SStefan Roese "run nfsargs addip addcon addmtd;" \ 183*b29ca4a1SStefan Roese "bootm ${kernel_addr} - ${dtb_addr}\0" \ 184*b29ca4a1SStefan Roese "delenv=env default -a -f; saveenv; reset\0" 185*b29ca4a1SStefan Roese 186*b29ca4a1SStefan Roese #define CONFIG_BOOTCOMMAND "run nand_ubifs" 187*b29ca4a1SStefan Roese 188*b29ca4a1SStefan Roese /* Miscellaneous configurable options */ 189*b29ca4a1SStefan Roese #define CONFIG_SYS_LONGHELP 190*b29ca4a1SStefan Roese #define CONFIG_SYS_HUSH_PARSER 191*b29ca4a1SStefan Roese #define CONFIG_SYS_PROMPT "Titanium > " 192*b29ca4a1SStefan Roese #define CONFIG_AUTO_COMPLETE 193*b29ca4a1SStefan Roese #define CONFIG_CMDLINE_EDITING 194*b29ca4a1SStefan Roese #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ 195*b29ca4a1SStefan Roese 196*b29ca4a1SStefan Roese #define CONFIG_SYS_CBSIZE 256 197*b29ca4a1SStefan Roese 198*b29ca4a1SStefan Roese /* Print Buffer Size */ 199*b29ca4a1SStefan Roese #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 200*b29ca4a1SStefan Roese sizeof(CONFIG_SYS_PROMPT) + 16) 201*b29ca4a1SStefan Roese #define CONFIG_SYS_MAXARGS 16 202*b29ca4a1SStefan Roese #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 203*b29ca4a1SStefan Roese 204*b29ca4a1SStefan Roese #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 205*b29ca4a1SStefan Roese #define CONFIG_SYS_HZ 1000 206*b29ca4a1SStefan Roese 207*b29ca4a1SStefan Roese /* Physical Memory Map */ 208*b29ca4a1SStefan Roese #define CONFIG_NR_DRAM_BANKS 1 209*b29ca4a1SStefan Roese #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 210*b29ca4a1SStefan Roese #define PHYS_SDRAM_SIZE (512 << 20) 211*b29ca4a1SStefan Roese 212*b29ca4a1SStefan Roese #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 213*b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 214*b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 215*b29ca4a1SStefan Roese 216*b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_SP_OFFSET \ 217*b29ca4a1SStefan Roese (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 218*b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_SP_ADDR \ 219*b29ca4a1SStefan Roese (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 220*b29ca4a1SStefan Roese 221*b29ca4a1SStefan Roese /* FLASH and environment organization */ 222*b29ca4a1SStefan Roese #define CONFIG_SYS_NO_FLASH 223*b29ca4a1SStefan Roese 224*b29ca4a1SStefan Roese /* Enable NAND support */ 225*b29ca4a1SStefan Roese #define CONFIG_CMD_NAND 226*b29ca4a1SStefan Roese #define CONFIG_CMD_NAND_TRIMFFS 227*b29ca4a1SStefan Roese #define CONFIG_CMD_TIME 228*b29ca4a1SStefan Roese 229*b29ca4a1SStefan Roese #ifdef CONFIG_CMD_NAND 230*b29ca4a1SStefan Roese 231*b29ca4a1SStefan Roese /* NAND stuff */ 232*b29ca4a1SStefan Roese #define CONFIG_NAND_MXS 233*b29ca4a1SStefan Roese #define CONFIG_SYS_MAX_NAND_DEVICE 1 234*b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_BASE 0x40000000 235*b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_5_ADDR_CYCLE 236*b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_ONFI_DETECTION 237*b29ca4a1SStefan Roese 238*b29ca4a1SStefan Roese /* DMA stuff, needed for GPMI/MXS NAND support */ 239*b29ca4a1SStefan Roese #define CONFIG_APBH_DMA 240*b29ca4a1SStefan Roese #define CONFIG_APBH_DMA_BURST 241*b29ca4a1SStefan Roese #define CONFIG_APBH_DMA_BURST8 242*b29ca4a1SStefan Roese 243*b29ca4a1SStefan Roese /* Environment in NAND */ 244*b29ca4a1SStefan Roese #define CONFIG_ENV_IS_IN_NAND 245*b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET (16 << 20) 246*b29ca4a1SStefan Roese #define CONFIG_ENV_SECT_SIZE (128 << 10) 247*b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 248*b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10)) 249*b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 250*b29ca4a1SStefan Roese 251*b29ca4a1SStefan Roese #else /* CONFIG_CMD_NAND */ 252*b29ca4a1SStefan Roese 253*b29ca4a1SStefan Roese /* Environment in MMC */ 254*b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE (8 << 10) 255*b29ca4a1SStefan Roese #define CONFIG_ENV_IS_IN_MMC 256*b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 257*b29ca4a1SStefan Roese #define CONFIG_SYS_MMC_ENV_DEV 0 258*b29ca4a1SStefan Roese 259*b29ca4a1SStefan Roese #endif /* CONFIG_CMD_NAND */ 260*b29ca4a1SStefan Roese 261*b29ca4a1SStefan Roese /* UBI/UBIFS config options */ 262*b29ca4a1SStefan Roese #define CONFIG_LZO 263*b29ca4a1SStefan Roese #define CONFIG_MTD_DEVICE 264*b29ca4a1SStefan Roese #define CONFIG_MTD_PARTITIONS 265*b29ca4a1SStefan Roese #define CONFIG_RBTREE 266*b29ca4a1SStefan Roese #define CONFIG_CMD_MTDPARTS 267*b29ca4a1SStefan Roese #define CONFIG_CMD_UBI 268*b29ca4a1SStefan Roese #define CONFIG_CMD_UBIFS 269*b29ca4a1SStefan Roese 270*b29ca4a1SStefan Roese #define CONFIG_OF_LIBFDT 271*b29ca4a1SStefan Roese #define CONFIG_CMD_BOOTZ 272*b29ca4a1SStefan Roese 273*b29ca4a1SStefan Roese #ifndef CONFIG_SYS_DCACHE_OFF 274*b29ca4a1SStefan Roese #define CONFIG_CMD_CACHE 275*b29ca4a1SStefan Roese #endif 276*b29ca4a1SStefan Roese 277*b29ca4a1SStefan Roese #endif /* __CONFIG_H */ 278