183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2f7dc4ac3STom Warren /* 3f7dc4ac3STom Warren * (C) Copyright 2013 4f7dc4ac3STom Warren * NVIDIA Corporation <www.nvidia.com> 5f7dc4ac3STom Warren */ 6f7dc4ac3STom Warren 7f7dc4ac3STom Warren #ifndef _TEGRA124_COMMON_H_ 8f7dc4ac3STom Warren #define _TEGRA124_COMMON_H_ 9f7dc4ac3STom Warren 10f7dc4ac3STom Warren #include "tegra-common.h" 11f7dc4ac3STom Warren 12f7dc4ac3STom Warren /* 13f7dc4ac3STom Warren * NS16550 Configuration 14f7dc4ac3STom Warren */ 15f7dc4ac3STom Warren #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ 16f7dc4ac3STom Warren 17f7dc4ac3STom Warren /* 18f7dc4ac3STom Warren * Miscellaneous configurable options 19f7dc4ac3STom Warren */ 20*f16e3115SJonathan Hunter #define CONFIG_STACKBASE 0x83800000 /* 56MB */ 21f7dc4ac3STom Warren 22f7dc4ac3STom Warren /*----------------------------------------------------------------------- 23f7dc4ac3STom Warren * Physical Memory Map 24f7dc4ac3STom Warren */ 25f7dc4ac3STom Warren 26f7dc4ac3STom Warren /* 27f7dc4ac3STom Warren * Memory layout for where various images get loaded by boot scripts: 28f7dc4ac3STom Warren * 29f7dc4ac3STom Warren * scriptaddr can be pretty much anywhere that doesn't conflict with something 30f7dc4ac3STom Warren * else. Put it above BOOTMAPSZ to eliminate conflicts. 31f7dc4ac3STom Warren * 32f7dc4ac3STom Warren * pxefile_addr_r can be pretty much anywhere that doesn't conflict with 33f7dc4ac3STom Warren * something else. Put it above BOOTMAPSZ to eliminate conflicts. 34f7dc4ac3STom Warren * 35f7dc4ac3STom Warren * kernel_addr_r must be within the first 128M of RAM in order for the 36f7dc4ac3STom Warren * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will 37f7dc4ac3STom Warren * decompress itself to 0x8000 after the start of RAM, kernel_addr_r 38f7dc4ac3STom Warren * should not overlap that area, or the kernel will have to copy itself 39f7dc4ac3STom Warren * somewhere else before decompression. Similarly, the address of any other 40f7dc4ac3STom Warren * data passed to the kernel shouldn't overlap the start of RAM. Pushing 41*f16e3115SJonathan Hunter * this up to 32M allows for a sizable kernel to be decompressed below the 42f7dc4ac3STom Warren * compressed load address. 43f7dc4ac3STom Warren * 44*f16e3115SJonathan Hunter * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for 45*f16e3115SJonathan Hunter * the compressed kernel to be up to 32M too. 46f7dc4ac3STom Warren * 47*f16e3115SJonathan Hunter * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows 48f7dc4ac3STom Warren * for the FDT/DTB to be up to 1M, which is hopefully plenty. 49f7dc4ac3STom Warren */ 5048cfca24SStephen Warren #define CONFIG_LOADADDR 0x81000000 51f7dc4ac3STom Warren #define MEM_LAYOUT_ENV_SETTINGS \ 52f7dc4ac3STom Warren "scriptaddr=0x90000000\0" \ 53f7dc4ac3STom Warren "pxefile_addr_r=0x90100000\0" \ 5448cfca24SStephen Warren "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 55*f16e3115SJonathan Hunter "fdt_addr_r=0x83000000\0" \ 56*f16e3115SJonathan Hunter "ramdisk_addr_r=0x83100000\0" 57f7dc4ac3STom Warren 58f7dc4ac3STom Warren /* Defines for SPL */ 59f7dc4ac3STom Warren #define CONFIG_SPL_TEXT_BASE 0x80108000 60f7dc4ac3STom Warren #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 61f7dc4ac3STom Warren #define CONFIG_SPL_STACK 0x800ffffc 62f7dc4ac3STom Warren 63f7dc4ac3STom Warren /* For USB EHCI controller */ 64f7dc4ac3STom Warren #define CONFIG_EHCI_IS_TDI 657bc5c8c9SJim Lin #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 66f7dc4ac3STom Warren 67871d78edSAlexandre Courbot /* GPU needs setup */ 68871d78edSAlexandre Courbot #define CONFIG_TEGRA_GPU 69871d78edSAlexandre Courbot 70f7dc4ac3STom Warren #endif /* _TEGRA124_COMMON_H_ */ 71