1 /* 2 * Copyright (C) 2011 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4 * 5 * Copyright (C) 2009 TechNexion Ltd. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __TAM3517_H 11 #define __TAM3517_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_OMAP /* in a TI OMAP core */ 17 #define CONFIG_OMAP_GPIO 18 #define CONFIG_OMAP_COMMON 19 /* Common ARM Erratas */ 20 #define CONFIG_ARM_ERRATA_454179 21 #define CONFIG_ARM_ERRATA_430973 22 #define CONFIG_ARM_ERRATA_621766 23 24 #define CONFIG_SYS_TEXT_BASE 0x80008000 25 26 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 27 28 #include <asm/arch/cpu.h> /* get chip and board defs */ 29 #include <asm/arch/omap.h> 30 31 /* Clock Defines */ 32 #define V_OSCK 26000000 /* Clock output from T2 */ 33 #define V_SCLK (V_OSCK >> 1) 34 35 #define CONFIG_MISC_INIT_R 36 37 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 38 #define CONFIG_SETUP_MEMORY_TAGS 39 #define CONFIG_INITRD_TAG 40 #define CONFIG_REVISION_TAG 41 42 /* 43 * Size of malloc() pool 44 */ 45 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 47 2 * 1024 * 1024) 48 /* 49 * DDR related 50 */ 51 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ 52 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 53 54 /* 55 * Hardware drivers 56 */ 57 58 /* 59 * NS16550 Configuration 60 */ 61 #define CONFIG_SYS_NS16550_SERIAL 62 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 63 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 64 65 /* 66 * select serial console configuration 67 */ 68 #define CONFIG_CONS_INDEX 1 69 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 70 #define CONFIG_SERIAL1 /* UART1 */ 71 72 /* allow to overwrite serial and ethaddr */ 73 #define CONFIG_ENV_OVERWRITE 74 #define CONFIG_BAUDRATE 115200 75 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 76 115200} 77 #define CONFIG_MMC 78 #define CONFIG_OMAP_HSMMC 79 #define CONFIG_GENERIC_MMC 80 #define CONFIG_DOS_PARTITION 81 82 /* EHCI */ 83 #define CONFIG_OMAP3_GPIO_5 84 #define CONFIG_USB_EHCI 85 #define CONFIG_USB_EHCI_OMAP 86 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 87 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 88 89 /* commands to include */ 90 #define CONFIG_CMD_NAND /* NAND support */ 91 #define CONFIG_CMD_EEPROM 92 93 #define CONFIG_SYS_NO_FLASH 94 #define CONFIG_SYS_I2C 95 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 96 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 97 #define CONFIG_SYS_I2C_OMAP34XX 98 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 99 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 100 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 101 102 /* 103 * Board NAND Info. 104 */ 105 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 106 /* to access */ 107 /* nand at CS0 */ 108 109 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 110 /* NAND devices */ 111 112 #define CONFIG_AUTO_COMPLETE 113 114 /* 115 * Miscellaneous configurable options 116 */ 117 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 118 #define CONFIG_CMDLINE_EDITING 119 #define CONFIG_AUTO_COMPLETE 120 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 121 122 /* Print Buffer Size */ 123 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 124 sizeof(CONFIG_SYS_PROMPT) + 16) 125 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 126 /* args */ 127 /* Boot Argument Buffer Size */ 128 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 129 /* memtest works on */ 130 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 131 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 132 0x01F00000) /* 31MB */ 133 134 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 135 /* address */ 136 137 /* 138 * AM3517 has 12 GP timers, they can be driven by the system clock 139 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 140 * This rate is divided by a local divisor. 141 */ 142 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 143 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 144 145 /* 146 * Physical Memory Map 147 */ 148 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 149 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 150 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 151 152 /* 153 * FLASH and environment organization 154 */ 155 156 /* **** PISMO SUPPORT *** */ 157 #define CONFIG_NAND 158 #define CONFIG_NAND_OMAP_GPMC 159 #define CONFIG_ENV_IS_IN_NAND 160 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ 161 162 /* Redundant Environment */ 163 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 164 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 165 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 166 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 167 2 * CONFIG_SYS_ENV_SECT_SIZE) 168 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 169 170 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 171 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 172 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 173 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 174 CONFIG_SYS_INIT_RAM_SIZE - \ 175 GENERATED_GBL_DATA_SIZE) 176 177 /* 178 * ethernet support, EMAC 179 * 180 */ 181 #define CONFIG_DRIVER_TI_EMAC 182 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 183 #define CONFIG_MII 184 #define CONFIG_EMAC_MDIO_PHY_NUM 0 185 #define CONFIG_BOOTP_DNS 186 #define CONFIG_BOOTP_DNS2 187 #define CONFIG_BOOTP_SEND_HOSTNAME 188 #define CONFIG_NET_RETRY_COUNT 10 189 190 /* Defines for SPL */ 191 #define CONFIG_SPL_FRAMEWORK 192 #define CONFIG_SPL_BOARD_INIT 193 #define CONFIG_SPL_CONSOLE 194 #define CONFIG_SPL_NAND_SIMPLE 195 #define CONFIG_SPL_NAND_SOFTECC 196 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 197 198 #define CONFIG_SPL_NAND_BASE 199 #define CONFIG_SPL_NAND_DRIVERS 200 #define CONFIG_SPL_NAND_ECC 201 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 202 203 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 204 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 205 CONFIG_SPL_TEXT_BASE) 206 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 207 208 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 209 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 210 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 211 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 212 213 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 214 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 215 216 /* FAT */ 217 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 218 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 219 220 /* RAW SD card / eMMC */ 221 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 222 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 223 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 224 225 /* NAND boot config */ 226 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 227 #define CONFIG_SYS_NAND_PAGE_COUNT 64 228 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 229 #define CONFIG_SYS_NAND_OOBSIZE 64 230 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 231 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 232 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 233 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 234 48, 49, 50, 51, 52, 53, 54, 55,\ 235 56, 57, 58, 59, 60, 61, 62, 63} 236 #define CONFIG_SYS_NAND_ECCSIZE 256 237 #define CONFIG_SYS_NAND_ECCBYTES 3 238 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 239 #define CONFIG_NAND_OMAP_GPMC_PREFETCH 240 241 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 242 243 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 244 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 245 246 #define CONFIG_CMD_UBIFS 247 #define CONFIG_RBTREE 248 #define CONFIG_LZO 249 #define CONFIG_MTD_PARTITIONS 250 #define CONFIG_MTD_DEVICE 251 #define CONFIG_CMD_MTDPARTS 252 253 /* Setup MTD for NAND on the SOM */ 254 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 255 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 256 "1m(u-boot),256k(env1)," \ 257 "256k(env2),6m(kernel),-(rootfs)" 258 259 #define CONFIG_TAM3517_SETTINGS \ 260 "netdev=eth0\0" \ 261 "nandargs=setenv bootargs root=${nandroot} " \ 262 "rootfstype=${nandrootfstype}\0" \ 263 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 264 "nfsroot=${serverip}:${rootpath}\0" \ 265 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 266 "addip_sta=setenv bootargs ${bootargs} " \ 267 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 268 ":${hostname}:${netdev}:off panic=1\0" \ 269 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 270 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 271 "else run addip_sta;fi\0" \ 272 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 273 "addtty=setenv bootargs ${bootargs}" \ 274 " console=ttyO0,${baudrate}\0" \ 275 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 276 "loadaddr=82000000\0" \ 277 "kernel_addr_r=82000000\0" \ 278 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 279 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 280 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 281 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 282 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 283 "bootm ${kernel_addr}\0" \ 284 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 285 "nand read ${kernel_addr_r} kernel\0" \ 286 "bootm ${kernel_addr_r}\0" \ 287 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 288 "run nfsargs addip addtty addmtd addmisc;" \ 289 "bootm ${kernel_addr_r}\0" \ 290 "net_self=if run net_self_load;then " \ 291 "run ramargs addip addtty addmtd addmisc;" \ 292 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 293 "else echo Images not loades;fi\0" \ 294 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 295 "load=tftp ${loadaddr} ${u-boot}\0" \ 296 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 297 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 298 "uboot_addr=0x80000\0" \ 299 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 300 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 301 "updatemlo=nandecc hw;nand erase 0 20000;" \ 302 "nand write ${loadaddr} 0 20000\0" \ 303 "upd=if run load;then echo Updating u-boot;if run update;" \ 304 "then echo U-Boot updated;" \ 305 "else echo Error updating u-boot !;" \ 306 "echo Board without bootloader !!;" \ 307 "fi;" \ 308 "else echo U-Boot not downloaded..exiting;fi\0" \ 309 310 /* 311 * this is common code for all TAM3517 boards. 312 * MAC address is stored from manufacturer in 313 * I2C EEPROM 314 */ 315 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 316 /* 317 * The I2C EEPROM on the TAM3517 contains 318 * mac address and production data 319 */ 320 struct tam3517_module_info { 321 char customer[48]; 322 char product[48]; 323 324 /* 325 * bit 0~47 : sequence number 326 * bit 48~55 : week of year, from 0. 327 * bit 56~63 : year 328 */ 329 unsigned long long sequence_number; 330 331 /* 332 * bit 0~7 : revision fixed 333 * bit 8~15 : revision major 334 * bit 16~31 : TNxxx 335 */ 336 unsigned int revision; 337 unsigned char eth_addr[4][8]; 338 unsigned char _rev[100]; 339 }; 340 341 #define TAM3517_READ_EEPROM(info, ret) \ 342 do { \ 343 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 344 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 345 (void *)info, sizeof(*info))) \ 346 ret = 1; \ 347 else \ 348 ret = 0; \ 349 } while (0) 350 351 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 352 do { \ 353 char buf[80], ethname[20]; \ 354 int i; \ 355 memset(buf, 0, sizeof(buf)); \ 356 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 357 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 358 (info)->eth_addr[i][5], \ 359 (info)->eth_addr[i][4], \ 360 (info)->eth_addr[i][3], \ 361 (info)->eth_addr[i][2], \ 362 (info)->eth_addr[i][1], \ 363 (info)->eth_addr[i][0]); \ 364 \ 365 if (i) \ 366 sprintf(ethname, "eth%daddr", i); \ 367 else \ 368 strcpy(ethname, "ethaddr"); \ 369 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 370 setenv(ethname, buf); \ 371 } \ 372 } while (0) 373 374 /* The following macros are taken from Technexion's documentation */ 375 #define TAM3517_sequence_number(info) \ 376 ((info)->sequence_number % 0x1000000000000LL) 377 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 378 #define TAM3517_year(info) ((info)->sequence_number >> 56) 379 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 380 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 381 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 382 383 #define TAM3517_PRINT_SOM_INFO(info) \ 384 do { \ 385 printf("Vendor:%s\n", (info)->customer); \ 386 printf("SOM: %s\n", (info)->product); \ 387 printf("SeqNr: %02llu%02llu%012llu\n", \ 388 TAM3517_year(info), \ 389 TAM3517_week_of_year(info), \ 390 TAM3517_sequence_number(info)); \ 391 printf("Rev: TN%u %u.%u\n", \ 392 TAM3517_revision_tn(info), \ 393 TAM3517_revision_major(info), \ 394 TAM3517_revision_fixed(info)); \ 395 } while (0) 396 397 #endif 398 399 #endif /* __TAM3517_H */ 400