1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 29fa32b12SVikas Manocha /* 31537d386SPatrice Chotard * Copyright (C) 2014, STMicroelectronics - All Rights Reserved 41537d386SPatrice Chotard * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 59fa32b12SVikas Manocha */ 69fa32b12SVikas Manocha 79fa32b12SVikas Manocha #ifndef __CONFIG_STV0991_H 89fa32b12SVikas Manocha #define __CONFIG_STV0991_H 99fa32b12SVikas Manocha #define CONFIG_SYS_DCACHE_OFF 109fa32b12SVikas Manocha #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 112ce4eaf4SVikas Manocha 129fa32b12SVikas Manocha /* ram memory-related information */ 139fa32b12SVikas Manocha #define PHYS_SDRAM_1 0x00000000 149fa32b12SVikas Manocha #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 159fa32b12SVikas Manocha #define PHYS_SDRAM_1_SIZE 0x00198000 169fa32b12SVikas Manocha 179fa32b12SVikas Manocha #define CONFIG_ENV_SIZE 0x10000 18137d5b91SVikas Manocha #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 19137d5b91SVikas Manocha #define CONFIG_ENV_OFFSET 0x30000 209fa32b12SVikas Manocha #define CONFIG_ENV_ADDR \ 219fa32b12SVikas Manocha (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) 229fa32b12SVikas Manocha #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 239fa32b12SVikas Manocha 249fa32b12SVikas Manocha /* user interface */ 25c55e7591SVikas Manocha #define CONFIG_SYS_CBSIZE 1024 269fa32b12SVikas Manocha 279fa32b12SVikas Manocha /* MISC */ 289fa32b12SVikas Manocha #define CONFIG_SYS_LOAD_ADDR 0x00000000 29498b7c2eSVikas Manocha #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 309fa32b12SVikas Manocha #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 319fa32b12SVikas Manocha #define CONFIG_SYS_INIT_SP_OFFSET \ 329fa32b12SVikas Manocha (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 33a187559eSBin Meng /* U-Boot Load Address */ 349fa32b12SVikas Manocha #define CONFIG_SYS_INIT_SP_ADDR \ 359fa32b12SVikas Manocha (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 369fa32b12SVikas Manocha 372ce4eaf4SVikas Manocha /* GMAC related configs */ 382ce4eaf4SVikas Manocha 392ce4eaf4SVikas Manocha #define CONFIG_DW_ALTDESCRIPTOR 402ce4eaf4SVikas Manocha 412ce4eaf4SVikas Manocha /* Command support defines */ 422ce4eaf4SVikas Manocha #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 432ce4eaf4SVikas Manocha 44c55e7591SVikas Manocha #define CONFIG_SYS_MEMTEST_START 0x0000 45c55e7591SVikas Manocha #define CONFIG_SYS_MEMTEST_END 1024*1024 46c55e7591SVikas Manocha 47c55e7591SVikas Manocha /* Misc configuration */ 48c55e7591SVikas Manocha 49c55e7591SVikas Manocha #define CONFIG_BOOTCOMMAND "go 0x40040000" 50d126e016SStefan Roese 51e67abcaaSVikas Manocha /* 52e67abcaaSVikas Manocha + * QSPI support 53e67abcaaSVikas Manocha + */ 54e67abcaaSVikas Manocha #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 55e67abcaaSVikas Manocha #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 56e67abcaaSVikas Manocha 57e67abcaaSVikas Manocha #endif 58e67abcaaSVikas Manocha 599fa32b12SVikas Manocha #endif /* __CONFIG_H */ 60