14549e789STom Rini /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ 2f8598d98SPatrick Delaunay /* 3f8598d98SPatrick Delaunay * Copyright (C) 2018, STMicroelectronics - All Rights Reserved 4f8598d98SPatrick Delaunay * 5f8598d98SPatrick Delaunay * Configuration settings for the STM32MP15x CPU 6f8598d98SPatrick Delaunay */ 7f8598d98SPatrick Delaunay 8f8598d98SPatrick Delaunay #ifndef __CONFIG_H 9f8598d98SPatrick Delaunay #define __CONFIG_H 10f8598d98SPatrick Delaunay #include <linux/sizes.h> 11f8598d98SPatrick Delaunay #include <asm/arch/stm32.h> 12f8598d98SPatrick Delaunay 13f8598d98SPatrick Delaunay #define CONFIG_PREBOOT 14f8598d98SPatrick Delaunay 15f8598d98SPatrick Delaunay /* 16f8598d98SPatrick Delaunay * Number of clock ticks in 1 sec 17f8598d98SPatrick Delaunay */ 18f8598d98SPatrick Delaunay #define CONFIG_SYS_HZ 1000 19f8598d98SPatrick Delaunay 20*41c79775SPatrick Delaunay /* PSCI support */ 21*41c79775SPatrick Delaunay #define CONFIG_ARMV7_PSCI_1_0 22*41c79775SPatrick Delaunay #define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE 23*41c79775SPatrick Delaunay #define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE 24*41c79775SPatrick Delaunay 25f8598d98SPatrick Delaunay /* 26f8598d98SPatrick Delaunay * malloc() pool size 27f8598d98SPatrick Delaunay */ 28f8598d98SPatrick Delaunay #define CONFIG_SYS_MALLOC_LEN SZ_32M 29f8598d98SPatrick Delaunay 30f8598d98SPatrick Delaunay /* 31f8598d98SPatrick Delaunay * Configuration of the external SRAM memory used by U-Boot 32f8598d98SPatrick Delaunay */ 33f8598d98SPatrick Delaunay #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE 34f8598d98SPatrick Delaunay #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE 35f8598d98SPatrick Delaunay 36f8598d98SPatrick Delaunay /* 37f8598d98SPatrick Delaunay * Console I/O buffer size 38f8598d98SPatrick Delaunay */ 39f8598d98SPatrick Delaunay #define CONFIG_SYS_CBSIZE SZ_1K 40f8598d98SPatrick Delaunay 41f8598d98SPatrick Delaunay /* 42f8598d98SPatrick Delaunay * Needed by "loadb" 43f8598d98SPatrick Delaunay */ 44f8598d98SPatrick Delaunay #define CONFIG_SYS_LOAD_ADDR STM32_DDR_BASE 45f8598d98SPatrick Delaunay 46f8598d98SPatrick Delaunay /* 47f8598d98SPatrick Delaunay * Env parameters 48f8598d98SPatrick Delaunay */ 49f8598d98SPatrick Delaunay #define CONFIG_ENV_SIZE SZ_4K 50f8598d98SPatrick Delaunay 51f8598d98SPatrick Delaunay /* ATAGs */ 52f8598d98SPatrick Delaunay #define CONFIG_CMDLINE_TAG 53f8598d98SPatrick Delaunay #define CONFIG_SETUP_MEMORY_TAGS 54f8598d98SPatrick Delaunay #define CONFIG_INITRD_TAG 55f8598d98SPatrick Delaunay 56f8598d98SPatrick Delaunay /* SPL support */ 57f8598d98SPatrick Delaunay #ifdef CONFIG_SPL 58f8598d98SPatrick Delaunay /* BOOTROM load address */ 59f8598d98SPatrick Delaunay #define CONFIG_SPL_TEXT_BASE 0x2FFC2500 60f8598d98SPatrick Delaunay /* SPL use DDR */ 61f8598d98SPatrick Delaunay #define CONFIG_SPL_BSS_START_ADDR 0xC0200000 62f8598d98SPatrick Delaunay #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 63f8598d98SPatrick Delaunay #define CONFIG_SYS_SPL_MALLOC_START 0xC0300000 64f8598d98SPatrick Delaunay #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 65f8598d98SPatrick Delaunay 66f8598d98SPatrick Delaunay /* limit SYSRAM usage to first 128 KB */ 67f8598d98SPatrick Delaunay #define CONFIG_SPL_MAX_SIZE 0x00020000 68f8598d98SPatrick Delaunay #define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \ 69f8598d98SPatrick Delaunay STM32_SYSRAM_SIZE) 70f8598d98SPatrick Delaunay #endif /* #ifdef CONFIG_SPL */ 71f8598d98SPatrick Delaunay 72f8598d98SPatrick Delaunay /*MMC SD*/ 73f8598d98SPatrick Delaunay #define CONFIG_SYS_MMC_MAX_DEVICE 3 740ed232b1SPatrick Delaunay #define CONFIG_SUPPORT_EMMC_BOOT 75f8598d98SPatrick Delaunay 76f8598d98SPatrick Delaunay #if !defined(CONFIG_SPL) || !defined(CONFIG_SPL_BUILD) 77f8598d98SPatrick Delaunay 78f8598d98SPatrick Delaunay #define BOOT_TARGET_DEVICES(func) \ 79f8598d98SPatrick Delaunay func(MMC, mmc, 1) \ 80f8598d98SPatrick Delaunay func(MMC, mmc, 0) \ 81f8598d98SPatrick Delaunay func(MMC, mmc, 2) 82f8598d98SPatrick Delaunay 83f8598d98SPatrick Delaunay #include <config_distro_bootcmd.h> 84f8598d98SPatrick Delaunay 8511dfd1a3SPatrick Delaunay #define STM32MP_PREBOOT \ 8611dfd1a3SPatrick Delaunay "echo \"Boot over ${boot_device}${boot_instance}!\"; " \ 8711dfd1a3SPatrick Delaunay "if test \"${boot_device}\" = \"mmc\"; then " \ 8811dfd1a3SPatrick Delaunay "env set boot_targets \"mmc${boot_instance}\"; "\ 8911dfd1a3SPatrick Delaunay "fi;" 9011dfd1a3SPatrick Delaunay 91f8598d98SPatrick Delaunay #define CONFIG_EXTRA_ENV_SETTINGS \ 92f8598d98SPatrick Delaunay "scriptaddr=0xC0000000\0" \ 93f8598d98SPatrick Delaunay "pxefile_addr_r=0xC0000000\0" \ 94f8598d98SPatrick Delaunay "kernel_addr_r=0xC1000000\0" \ 95f8598d98SPatrick Delaunay "fdt_addr_r=0xC4000000\0" \ 96f8598d98SPatrick Delaunay "ramdisk_addr_r=0xC4100000\0" \ 97f8598d98SPatrick Delaunay "fdt_high=0xffffffff\0" \ 98f8598d98SPatrick Delaunay "initrd_high=0xffffffff\0" \ 9911dfd1a3SPatrick Delaunay "preboot=" STM32MP_PREBOOT "\0" \ 100f8598d98SPatrick Delaunay BOOTENV 101f8598d98SPatrick Delaunay 102f8598d98SPatrick Delaunay #endif /* ifndef CONFIG_SPL_BUILD */ 103f8598d98SPatrick Delaunay 104f8598d98SPatrick Delaunay #endif /* __CONFIG_H */ 105