183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 23b7f0e10SVladimir Barinov /* 33b7f0e10SVladimir Barinov * include/configs/silk.h 43b7f0e10SVladimir Barinov * This file is silk board configuration. 53b7f0e10SVladimir Barinov * 63b7f0e10SVladimir Barinov * Copyright (C) 2015 Renesas Electronics Corporation 73b7f0e10SVladimir Barinov * Copyright (C) 2015 Cogent Embedded, Inc. 83b7f0e10SVladimir Barinov */ 93b7f0e10SVladimir Barinov 103b7f0e10SVladimir Barinov #ifndef __SILK_H 113b7f0e10SVladimir Barinov #define __SILK_H 123b7f0e10SVladimir Barinov 133b7f0e10SVladimir Barinov #include "rcar-gen2-common.h" 143b7f0e10SVladimir Barinov 15f7aa3cd4SMarek Vasut #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 16f7aa3cd4SMarek Vasut #define STACK_AREA_SIZE 0x00100000 173b7f0e10SVladimir Barinov #define LOW_LEVEL_MERAM_STACK \ 183b7f0e10SVladimir Barinov (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 193b7f0e10SVladimir Barinov 203b7f0e10SVladimir Barinov /* MEMORY */ 213b7f0e10SVladimir Barinov #define RCAR_GEN2_SDRAM_BASE 0x40000000 223b7f0e10SVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 233b7f0e10SVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 243b7f0e10SVladimir Barinov 253b7f0e10SVladimir Barinov /* FLASH */ 263b7f0e10SVladimir Barinov #define CONFIG_SPI_FLASH_QUAD 273b7f0e10SVladimir Barinov 283b7f0e10SVladimir Barinov /* SH Ether */ 293b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT 0 303b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR 0x1 313b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 323b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK 333b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE 343b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 353b7f0e10SVladimir Barinov #define CONFIG_BITBANGMII 363b7f0e10SVladimir Barinov #define CONFIG_BITBANGMII_MULTI 373b7f0e10SVladimir Barinov 383b7f0e10SVladimir Barinov /* Board Clock */ 393b7f0e10SVladimir Barinov #define RMOBILE_XTAL_CLK 20000000u 403b7f0e10SVladimir Barinov #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 413b7f0e10SVladimir Barinov 42f7aa3cd4SMarek Vasut #define CONFIG_EXTRA_ENV_SETTINGS \ 43*07a8060aSMarek Vasut "bootm_size=0x10000000\0" 443b7f0e10SVladimir Barinov 45f7aa3cd4SMarek Vasut /* SPL support */ 46f7aa3cd4SMarek Vasut #define CONFIG_SPL_TEXT_BASE 0xe6300000 47f7aa3cd4SMarek Vasut #define CONFIG_SPL_STACK 0xe6340000 48f7aa3cd4SMarek Vasut #define CONFIG_SPL_MAX_SIZE 0x4000 49f7aa3cd4SMarek Vasut #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 50f7aa3cd4SMarek Vasut #ifdef CONFIG_SPL_BUILD 51f7aa3cd4SMarek Vasut #define CONFIG_CONS_SCIF2 52f7aa3cd4SMarek Vasut #define CONFIG_SH_SCIF_CLK_FREQ 65000000 53f7aa3cd4SMarek Vasut #endif 543b7f0e10SVladimir Barinov 553b7f0e10SVladimir Barinov #endif /* __SILK_H */ 56