1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2927b901bSBo Shen /* 3927b901bSBo Shen * Configuration settings for the SAMA5D4EK board. 4927b901bSBo Shen * 5927b901bSBo Shen * Copyright (C) 2014 Atmel 6927b901bSBo Shen * Bo Shen <voice.shen@atmel.com> 7927b901bSBo Shen */ 8927b901bSBo Shen 9927b901bSBo Shen #ifndef __CONFIG_H 10927b901bSBo Shen #define __CONFIG_H 11927b901bSBo Shen 12b2d387bcSWu, Josh #include "at91-sama5_common.h" 13927b901bSBo Shen 14927b901bSBo Shen /* SDRAM */ 15e61ed48fSWenyou Yang #define CONFIG_SYS_SDRAM_BASE 0x20000000 16927b901bSBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x20000000 17927b901bSBo Shen 185a4c9c22SBo Shen #ifdef CONFIG_SPL_BUILD 19ef33aa3dSWenyou Yang #define CONFIG_SYS_INIT_SP_ADDR 0x218000 205a4c9c22SBo Shen #else 21927b901bSBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 22ef33aa3dSWenyou Yang (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 235a4c9c22SBo Shen #endif 24927b901bSBo Shen 25927b901bSBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 26927b901bSBo Shen 27927b901bSBo Shen /* NAND flash */ 28927b901bSBo Shen #ifdef CONFIG_CMD_NAND 29927b901bSBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 30e61ed48fSWenyou Yang #define CONFIG_SYS_NAND_BASE 0x80000000 31927b901bSBo Shen /* our ALE is AD21 */ 32927b901bSBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 33927b901bSBo Shen /* our CLE is AD22 */ 34927b901bSBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 35927b901bSBo Shen #define CONFIG_SYS_NAND_ONFI_DETECTION 36927b901bSBo Shen #endif 37927b901bSBo Shen 385a4c9c22SBo Shen /* SPL */ 395a4c9c22SBo Shen #define CONFIG_SPL_TEXT_BASE 0x200000 40ef33aa3dSWenyou Yang #define CONFIG_SPL_MAX_SIZE 0x18000 415a4c9c22SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x20000000 425a4c9c22SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 435a4c9c22SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 445a4c9c22SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 455a4c9c22SBo Shen 465a4c9c22SBo Shen #define CONFIG_SYS_MONITOR_LEN (512 << 10) 475a4c9c22SBo Shen 485541543fSWenyou Yang #ifdef CONFIG_SD_BOOT 495a4c9c22SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 505a4c9c22SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 515a4c9c22SBo Shen 525541543fSWenyou Yang #elif CONFIG_SPI_BOOT 535541543fSWenyou Yang #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000 545541543fSWenyou Yang 555541543fSWenyou Yang #elif CONFIG_NAND_BOOT 565a4c9c22SBo Shen #define CONFIG_SPL_NAND_DRIVERS 575a4c9c22SBo Shen #define CONFIG_SPL_NAND_BASE 585541543fSWenyou Yang #endif 595a4c9c22SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 605a4c9c22SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 615a4c9c22SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 625a4c9c22SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 635a4c9c22SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 224 645a4c9c22SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 655a4c9c22SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 665a4c9c22SBo Shen 67927b901bSBo Shen #endif 68