xref: /openbmc/u-boot/include/configs/s32v234evb.h (revision 699e831e158a5846778d8bd6af054d4276277cb6)
1 /*
2  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  *
6  * Configuration settings for the Freescale S32V234 EVB board.
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 
14 #define CONFIG_S32V234
15 
16 /* Config GIC */
17 #define CONFIG_GICV2
18 #define GICD_BASE 0x7D001000
19 #define GICC_BASE 0x7D002000
20 
21 #define CONFIG_REMAKE_ELF
22 #undef CONFIG_RUN_FROM_IRAM_ONLY
23 
24 #define CONFIG_RUN_FROM_DDR1
25 #undef CONFIG_RUN_FROM_DDR0
26 
27 /* Run by default from DDR1  */
28 #ifdef CONFIG_RUN_FROM_DDR0
29 #define DDR_BASE_ADDR		0x80000000
30 #else
31 #define DDR_BASE_ADDR		0xC0000000
32 #endif
33 
34 #define CONFIG_MACH_TYPE		4146
35 
36 #define CONFIG_SKIP_LOWLEVEL_INIT
37 
38 /* Config CACHE */
39 #define CONFIG_CMD_CACHE
40 
41 #define CONFIG_SYS_FULL_VA
42 
43 /* Enable passing of ATAGs */
44 #define CONFIG_CMDLINE_TAG
45 
46 /* SMP Spin Table Definitions */
47 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
48 
49 /* Generic Timer Definitions */
50 #define COUNTER_FREQUENCY               (1000000000)	/* 1000MHz */
51 #define CONFIG_SYS_FSL_ERRATUM_A008585
52 
53 /* Size of malloc() pool */
54 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
55 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1 * 1024 * 1024)
56 #else
57 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
58 #endif
59 
60 #define LINFLEXUART_BASE		LINFLEXD0_BASE_ADDR
61 
62 #define CONFIG_DEBUG_UART_LINFLEXUART
63 #define CONFIG_DEBUG_UART_BASE		LINFLEXUART_BASE
64 
65 /* Allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_SYS_UART_PORT		(1)
68 
69 #define CONFIG_FSL_USDHC
70 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC_BASE_ADDR
71 #define CONFIG_SYS_FSL_ESDHC_NUM	1
72 
73 #define CONFIG_CMD_MMC
74 /* #define CONFIG_CMD_EXT2 EXT2 Support */
75 
76 #if 0
77 
78 /* Ethernet config */
79 #define CONFIG_CMD_MII
80 #define CONFIG_FEC_MXC
81 #define CONFIG_MII
82 #define IMX_FEC_BASE            ENET_BASE_ADDR
83 #define CONFIG_FEC_XCV_TYPE     RMII
84 #define CONFIG_FEC_MXC_PHYADDR  0
85 #endif
86 
87 #if 0				/* Disable until the FLASH will be implemented */
88 #define CONFIG_SYS_USE_NAND
89 #endif
90 
91 #ifdef CONFIG_SYS_USE_NAND
92 /* Nand Flash Configs */
93 #define CONFIG_JFFS2_NAND
94 #define MTD_NAND_FSL_NFC_SWECC 1
95 #define CONFIG_NAND_FSL_NFC
96 #define CONFIG_SYS_NAND_BASE		0x400E0000
97 #define CONFIG_SYS_MAX_NAND_DEVICE	1
98 #define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
99 #define CONFIG_SYS_NAND_SELECT_DEVICE
100 #define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
101 #endif
102 
103 #define CONFIG_LOADADDR			0xC307FFC0
104 
105 #define CONFIG_EXTRA_ENV_SETTINGS \
106 	"boot_scripts=boot.scr.uimg boot.scr\0" \
107 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
108 	"console=ttyLF0,115200\0" \
109 	"fdt_file=s32v234-evb.dtb\0" \
110 	"fdt_high=0xffffffff\0" \
111 	"initrd_high=0xffffffff\0" \
112 	"fdt_addr_r=0xC2000000\0" \
113 	"kernel_addr_r=0xC307FFC0\0" \
114 	"ramdisk_addr_r=0xC4000000\0" \
115 	"ramdisk=rootfs.uimg\0"\
116 	"ip_dyn=yes\0" \
117 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
118 	"update_sd_firmware_filename=u-boot.imx\0" \
119 	"update_sd_firmware=" \
120 		"if test ${ip_dyn} = yes; then " \
121 			"setenv get_cmd dhcp; " \
122 		"else " \
123 			"setenv get_cmd tftp; " \
124 		"fi; " \
125 		"if mmc dev ${mmcdev}; then "	\
126 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
127 				"setexpr fw_sz ${filesize} / 0x200; " \
128 				"setexpr fw_sz ${fw_sz} + 1; "	\
129 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
130 			"fi; "	\
131 		"fi\0" \
132 	"loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
133 	"jtagboot=echo Booting using jtag...; " \
134 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
135 	"jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
136 		"run loaduimage; run loadramdisk; run loadfdt;"\
137 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
138 	"boot_net_usb_start=true\0" \
139 	BOOTENV
140 
141 #define BOOT_TARGET_DEVICES(func) \
142 	func(MMC, mmc, 1) \
143 	func(MMC, mmc, 0) \
144 	func(DHCP, dhcp, na)
145 
146 #define CONFIG_BOOTCOMMAND \
147 	"run distro_bootcmd"
148 
149 #include <config_distro_bootcmd.h>
150 
151 /* Miscellaneous configurable options */
152 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
153 #define CONFIG_SYS_PROMPT		"=> "
154 
155 #define CONFIG_SYS_MEMTEST_START	(DDR_BASE_ADDR)
156 #define CONFIG_SYS_MEMTEST_END		(DDR_BASE_ADDR + 0x7C00000)
157 
158 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
159 #define CONFIG_SYS_HZ				1000
160 
161 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
162 #define CONFIG_SYS_MALLOC_BASE		(DDR_BASE_ADDR)
163 #endif
164 
165 #if 0
166 /* Configure PXE */
167 #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
168 #endif
169 
170 /* Physical memory map */
171 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
172 #define CONFIG_NR_DRAM_BANKS		1
173 #define PHYS_SDRAM			(DDR_BASE_ADDR)
174 #define PHYS_SDRAM_SIZE			(256 * 1024 * 1024)
175 
176 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
177 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
178 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
179 
180 #define CONFIG_SYS_INIT_SP_OFFSET \
181 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
182 #define CONFIG_SYS_INIT_SP_ADDR \
183 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
184 
185 /* environment organization */
186 #define CONFIG_ENV_SIZE			(8 * 1024)
187 
188 #define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
189 #define CONFIG_SYS_MMC_ENV_DEV		0
190 
191 
192 #define CONFIG_BOOTP_BOOTFILESIZE
193 
194 #endif
195