1 /* 2 * Copyright (C) Stefano Babic <sbabic@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 8 #ifndef __PCM058_CONFIG_H 9 #define __PCM058_CONFIG_H 10 11 #include <config_distro_defaults.h> 12 13 #ifdef CONFIG_SPL 14 #define CONFIG_SPL_YMODEM_SUPPORT 15 #define CONFIG_SPL_SPI_SUPPORT 16 #define CONFIG_SPL_SPI_FLASH_SUPPORT 17 #define CONFIG_SPL_SPI_LOAD 18 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 19 #include "imx6_spl.h" 20 #endif 21 22 #include "mx6_common.h" 23 24 /* Thermal */ 25 #define CONFIG_IMX_THERMAL 26 27 /* Serial */ 28 #define CONFIG_MXC_UART 29 #define CONFIG_MXC_UART_BASE UART2_BASE 30 #define CONFIG_CONSOLE_DEV "ttymxc1" 31 32 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 33 34 /* Early setup */ 35 #define CONFIG_BOARD_EARLY_INIT_F 36 #define CONFIG_BOARD_LATE_INIT 37 #define CONFIG_DISPLAY_BOARDINFO_LATE 38 39 40 /* Size of malloc() pool */ 41 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) 42 43 /* Ethernet */ 44 #define CONFIG_FEC_MXC 45 #define CONFIG_MII 46 #define IMX_FEC_BASE ENET_BASE_ADDR 47 #define CONFIG_FEC_XCV_TYPE RGMII 48 #define CONFIG_ETHPRIME "FEC" 49 #define CONFIG_FEC_MXC_PHYADDR 3 50 51 #define CONFIG_PHYLIB 52 #define CONFIG_PHY_MICREL 53 #define CONFIG_PHY_KSZ9031 54 55 /* SPI Flash */ 56 #define CONFIG_MXC_SPI 57 #define CONFIG_SF_DEFAULT_BUS 0 58 #define CONFIG_SF_DEFAULT_CS 0 59 #define CONFIG_SF_DEFAULT_SPEED 20000000 60 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 61 62 /* I2C Configs */ 63 #define CONFIG_SYS_I2C 64 #define CONFIG_SYS_I2C_MXC 65 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */ 66 #define CONFIG_SYS_I2C_SPEED 100000 67 68 #ifndef CONFIG_SPL_BUILD 69 #define CONFIG_CMD_NAND 70 /* Enable NAND support */ 71 #define CONFIG_CMD_NAND_TRIMFFS 72 #define CONFIG_NAND_MXS 73 #define CONFIG_SYS_MAX_NAND_DEVICE 1 74 #define CONFIG_SYS_NAND_BASE 0x40000000 75 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 76 #define CONFIG_SYS_NAND_ONFI_DETECTION 77 #endif 78 79 /* DMA stuff, needed for GPMI/MXS NAND support */ 80 #define CONFIG_APBH_DMA 81 #define CONFIG_APBH_DMA_BURST 82 #define CONFIG_APBH_DMA_BURST8 83 84 /* Filesystem support */ 85 #define CONFIG_LZO 86 #define CONFIG_CMD_UBIFS 87 #define CONFIG_CMD_MTDPARTS 88 #define CONFIG_MTD_PARTITIONS 89 #define CONFIG_MTD_DEVICE 90 #define MTDIDS_DEFAULT "nand0=nand" 91 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" 92 93 /* Various command support */ 94 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ 95 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ 96 #define CONFIG_CMD_GSC 97 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ 98 #define CONFIG_CMD_UBI 99 #define CONFIG_RBTREE 100 101 /* Physical Memory Map */ 102 #define CONFIG_NR_DRAM_BANKS 1 103 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 104 105 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 106 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 107 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 108 109 #define CONFIG_SYS_INIT_SP_OFFSET \ 110 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 111 #define CONFIG_SYS_INIT_SP_ADDR \ 112 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 113 114 /* MMC Configs */ 115 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 116 #define CONFIG_SYS_FSL_USDHC_NUM 1 117 118 /* Environment organization */ 119 #define CONFIG_ENV_IS_IN_SPI_FLASH 120 #define CONFIG_ENV_SIZE (16 * 1024) 121 #define CONFIG_ENV_OFFSET (1024 * SZ_1K) 122 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) 123 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 124 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 125 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 126 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 127 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 128 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 129 CONFIG_ENV_SECT_SIZE) 130 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 131 132 #ifdef CONFIG_ENV_IS_IN_NAND 133 #define CONFIG_ENV_OFFSET (0x1E0000) 134 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) 135 #endif 136 137 #endif 138