1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 239d09733SChristian Gmeiner /* 339d09733SChristian Gmeiner * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 439d09733SChristian Gmeiner * Copyright (C) 2014 Bachmann electronic GmbH 539d09733SChristian Gmeiner */ 639d09733SChristian Gmeiner 739d09733SChristian Gmeiner #ifndef __CONFIG_H 839d09733SChristian Gmeiner #define __CONFIG_H 939d09733SChristian Gmeiner 1039d09733SChristian Gmeiner #include "mx6_common.h" 1139d09733SChristian Gmeiner 1239d09733SChristian Gmeiner /* Size of malloc() pool */ 1339d09733SChristian Gmeiner #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 1439d09733SChristian Gmeiner 1539d09733SChristian Gmeiner /* UART Configs */ 1639d09733SChristian Gmeiner #define CONFIG_MXC_UART 1739d09733SChristian Gmeiner #define CONFIG_MXC_UART_BASE UART1_BASE 1839d09733SChristian Gmeiner 1939d09733SChristian Gmeiner /* SF Configs */ 2039d09733SChristian Gmeiner 2139d09733SChristian Gmeiner /* IO expander */ 2239d09733SChristian Gmeiner #define CONFIG_PCA953X 2339d09733SChristian Gmeiner #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 2439d09733SChristian Gmeiner #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 2539d09733SChristian Gmeiner 2639d09733SChristian Gmeiner /* I2C Configs */ 2739d09733SChristian Gmeiner #define CONFIG_SYS_I2C 2839d09733SChristian Gmeiner #define CONFIG_SYS_I2C_MXC 2903544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 3003544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 31f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 3239d09733SChristian Gmeiner #define CONFIG_SYS_I2C_SPEED 100000 3339d09733SChristian Gmeiner 3439d09733SChristian Gmeiner /* OCOTP Configs */ 3539d09733SChristian Gmeiner #define CONFIG_IMX_OTP 3639d09733SChristian Gmeiner #define IMX_OTP_BASE OCOTP_BASE_ADDR 3739d09733SChristian Gmeiner #define IMX_OTP_ADDR_MAX 0x7F 3839d09733SChristian Gmeiner #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA 3939d09733SChristian Gmeiner #define IMX_OTPWRITE_ENABLED 4039d09733SChristian Gmeiner 4139d09733SChristian Gmeiner /* MMC Configs */ 4239d09733SChristian Gmeiner #define CONFIG_SYS_FSL_ESDHC_ADDR 0 4339d09733SChristian Gmeiner #define CONFIG_SYS_FSL_USDHC_NUM 2 4439d09733SChristian Gmeiner 4539c7d5a2SChristian Gmeiner /* USB Configs */ 4639c7d5a2SChristian Gmeiner #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 4739c7d5a2SChristian Gmeiner #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 4839c7d5a2SChristian Gmeiner 4939d09733SChristian Gmeiner /* 5039d09733SChristian Gmeiner * SATA Configs 5139d09733SChristian Gmeiner */ 5239d09733SChristian Gmeiner #ifdef CONFIG_CMD_SATA 5339d09733SChristian Gmeiner #define CONFIG_SYS_SATA_MAX_DEVICE 1 5439d09733SChristian Gmeiner #define CONFIG_DWC_AHSATA_PORT_ID 0 5539d09733SChristian Gmeiner #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 5639d09733SChristian Gmeiner #define CONFIG_LBA48 5739d09733SChristian Gmeiner #endif 5839d09733SChristian Gmeiner 5968a3664aSChristian Gmeiner /* SPL */ 6068a3664aSChristian Gmeiner #ifdef CONFIG_SPL 6168a3664aSChristian Gmeiner #include "imx6_spl.h" 6268a3664aSChristian Gmeiner #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 6368a3664aSChristian Gmeiner #endif 6468a3664aSChristian Gmeiner 6539d09733SChristian Gmeiner #define CONFIG_FEC_MXC 6639d09733SChristian Gmeiner #define IMX_FEC_BASE ENET_BASE_ADDR 6739d09733SChristian Gmeiner #define CONFIG_FEC_XCV_TYPE MII100 6839d09733SChristian Gmeiner #define CONFIG_ETHPRIME "FEC" 6939d09733SChristian Gmeiner #define CONFIG_FEC_MXC_PHYADDR 0x5 7039d09733SChristian Gmeiner #define CONFIG_PHY_SMSC 7139d09733SChristian Gmeiner 72fb2589b3SChristian Gmeiner #ifndef CONFIG_SPL 73fb2589b3SChristian Gmeiner #define CONFIG_ENV_EEPROM_IS_ON_I2C 74fb2589b3SChristian Gmeiner #define CONFIG_SYS_I2C_EEPROM_BUS 1 75fb2589b3SChristian Gmeiner #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 76fb2589b3SChristian Gmeiner #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 77fb2589b3SChristian Gmeiner #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 78fb2589b3SChristian Gmeiner #endif 79fb2589b3SChristian Gmeiner 8039d09733SChristian Gmeiner #define CONFIG_PREBOOT "" 8139d09733SChristian Gmeiner 828be70bb4SChristian Gmeiner /* Thermal support */ 838be70bb4SChristian Gmeiner #define CONFIG_IMX_THERMAL 848be70bb4SChristian Gmeiner 8539d09733SChristian Gmeiner /* Physical Memory Map */ 8639d09733SChristian Gmeiner #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 8739d09733SChristian Gmeiner 8839d09733SChristian Gmeiner #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 8939d09733SChristian Gmeiner #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 9039d09733SChristian Gmeiner #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 9139d09733SChristian Gmeiner 9239d09733SChristian Gmeiner #define CONFIG_SYS_INIT_SP_OFFSET \ 9339d09733SChristian Gmeiner (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 9439d09733SChristian Gmeiner #define CONFIG_SYS_INIT_SP_ADDR \ 9539d09733SChristian Gmeiner (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 9639d09733SChristian Gmeiner 97056845c2SPeter Robinson /* Environment organization */ 9839d09733SChristian Gmeiner #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */ 9939d09733SChristian Gmeiner #define CONFIG_ENV_OFFSET (1024 * 1024) 10039d09733SChristian Gmeiner /* M25P16 has an erase size of 64 KiB */ 10139d09733SChristian Gmeiner #define CONFIG_ENV_SECT_SIZE (64 * 1024) 10239d09733SChristian Gmeiner 10339d09733SChristian Gmeiner #define CONFIG_BOOTP_SERVERIP 10439d09733SChristian Gmeiner #define CONFIG_BOOTP_BOOTFILE 10539d09733SChristian Gmeiner 10639d09733SChristian Gmeiner #endif /* __CONFIG_H */ 107